a48[([L (,hardkernel,odroid-c2amlogic,meson-gxbb7Hardkernel ODROID-C2reserved-memory =hwrom@0DHsecmon@10000000D Hsecmon@5000000D0Hlinux,cma,shared-dma-poolOX]@gchosen =yserial0:115200n8framebuffer-cvbs.,amlogic,simple-framebuffersimple-framebuffer vpu-cvbs disabledframebuffer-hdmi.,amlogic,simple-framebuffersimple-framebuffer vpu-hdmi disabled? Mcpus cpu@0cpu,arm,cortex-a53Dpscicpu@1cpu,arm,cortex-a53Dpscicpu@2cpu,arm,cortex-a53Dpscicpu@3cpu,arm,cortex-a53Dpsci l2-cache0,cachearm-pmu,arm,cortex-a53-pmu0 psci ,arm,psci-0.2smctimer,arm,armv8-timer0   xtal-clk ,fixed-clockn6xtal& firmwaresecure-monitor*,amlogic,meson-gx-smamlogic,meson-gxbb-smefuse0,amlogic,meson-gx-efuseamlogic,meson-gxbb-efuse 3:sn@14Deth_mac@34D4bid@46DF0scpi),amlogic,meson-gxbb-scpiarm,scpi-pre-1.0=  D clocks,arm,scpi-clocks disabledscpi_clocks@0,arm,scpi-dvfs-clocks&Jvcpusensors1,amlogic,meson-gxbb-scpi-sensorsarm,scpi-sensorsXsoc ,simple-bus =bus@c1100000 ,simple-busD =interrupt-controller@98805,amlogic,meson-gpio-intcamlogic,meson-gxbb-gpio-intcDn @ABCDEFGokayreset-controller@4404,amlogic,meson-gxbb-resetDDserial@84c0,amlogic,meson-gx-uartD  disabled  xtalpclkbaudserial@84dc,amlogic,meson-gx-uartD K disabled 0 xtalpclkbaudi2c@8500,,amlogic,meson-gx-i2camlogic,meson-gxbb-i2cD   okaydefaultpwm@8550,,amlogic,meson-gx-pwmamlogic,meson-gxbb-pwmDP disabledpwm@8650,,amlogic,meson-gx-pwmamlogic,meson-gxbb-pwmDP disabledadc@8680/,amlogic,meson-gxbb-saradcamlogic,meson-saradcD4 Iokay abclkincoreadc_clkadc_selpwm@86c0,,amlogic,meson-gx-pwmamlogic,meson-gxbb-pwmD disabledserial@8700,amlogic,meson-gx-uartD ] disabled D xtalpclkbaudclock-measure@8758,amlogic,meson-gx-clk-measureDXi2c@87c0,,amlogic,meson-gx-i2camlogic,meson-gxbb-i2cD    disabledi2c@87e0,,amlogic,meson-gx-i2camlogic,meson-gxbb-i2cD    disabledspi@8d80,amlogic,meson-gx-spiccD Q  disabledcore spi@8c80,amlogic,meson-gxbb-spifcD  disabled"watchdog@98d0,amlogic,meson-gxbb-wdtD interrupt-controller@c4301000 ,arm,gic-400@D00 0@ 0` n  sram@c80000008,amlogic,meson-gx-sramamlogic,meson-gxbb-srammmio-sramD@ =@scp-shmem@08,amlogic,meson-gx-scp-shmemamlogic,meson-gxbb-scp-shmemD0 scp-shmem@2008,amlogic,meson-gx-scp-shmemamlogic,meson-gxbb-scp-shmemD4 bus@c8100000 ,simple-busD =sys-ctrl@0.,amlogic,meson-gx-ao-sysctrlsimple-mfdsysconDpower-controller-vpu,amlogic,meson-gx-pwrc-vpu+`   % vpuvapb0?~(Of'沀clock-controller2,amlogic,meson-gxbb-aoclkcamlogic,meson-gx-aoclkc&  xtalmpeg-clkcec@100,amlogic,meson-gx-ao-cecD coreokaydefault{ao-secure@140",amlogic,meson-gx-ao-securesysconD@@serial@4c0,,amlogic,meson-gx-uartamlogic,meson-ao-uartD okay  xtalpclkbauddefaultserial@4e0,,amlogic,meson-gx-uartamlogic,meson-ao-uartD  disabled  xtalpclkbaudi2c@500,,amlogic,meson-gx-i2camlogic,meson-gxbb-i2cD    disabled]pwm@5502,amlogic,meson-gx-ao-pwmamlogic,meson-gxbb-ao-pwmDP disabledir@580*,amlogic,meson-gx-iramlogic,meson-gxbb-irD@ okaydefaultpinctrl@14!,amlogic,meson-gxbb-aobus-pinctrl =bank@140D,$muxpullgpioUART TXUART RXVCCK EnTF 3V3/1V8 EnUSB HUB nRESETUSB OTG Power EnJ7 Header Pin2IR InJ7 Header Pin4J7 Header Pin6J7 Header Pin5J7 Header Pin7HDMI CECSYS LED0usb-hubusb-hub-resetuart_ao_amuxuart_tx_ao_auart_rx_ao_a uart_aouart_ao_a_cts_rtsmuxuart_cts_ao_auart_rts_ao_a uart_aouart_ao_bmuxuart_tx_ao_buart_rx_ao_b  uart_ao_buart_ao_b_cts_rtsmuxuart_cts_ao_buart_rts_ao_b  uart_ao_bremote_input_aomuxremote_input_ao remote_input_aoi2c_aomuxi2c_sck_aoi2c_sda_ao i2c_aopwm_ao_a_3mux pwm_ao_a_3  pwm_ao_a_3pwm_ao_a_6mux pwm_ao_a_6  pwm_ao_a_6pwm_ao_a_12mux pwm_ao_a_12  pwm_ao_a_12pwm_ao_bmux pwm_ao_b  pwm_ao_bi2s_am_clkmux i2s_am_clk  i2s_out_aoi2s_out_ao_clkmuxi2s_out_ao_clk  i2s_out_aoi2s_out_lr_clkmuxi2s_out_lr_clk  i2s_out_aoi2s_out_ch01_aomuxi2s_out_ch01_ao  i2s_out_aoi2s_out_ch23_aomuxi2s_out_ch23_ao  i2s_out_aoi2s_out_ch45_aomuxi2s_out_ch45_ao  i2s_out_aospdif_out_ao_6muxspdif_out_ao_6  spdif_out_aospdif_out_ao_13muxspdif_out_ao_13  spdif_out_aoao_cecmuxao_cec cec_aoee_cecmuxee_cec cec_aovideo-codec@c8820000",amlogic,gxbb-vdecamlogic,gx-vdec DȂ dosesparser,  vdecesparser0C 6 dos_parserdosvdec_1vdec_hevc ( Resparserbus@c8834000 ,simple-busDȃ@  =ȃ@ rng,amlogic,meson-rngDcorepinctrl@4b0#,amlogic,meson-gxbb-periphs-pinctrl =bank@4b0@D( 0@muxpullpull-enablegpiowXEth MDIOEth MDCEth RGMII RX ClkEth RX DVEth RX D0Eth RX D1Eth RX D2Eth RX D3Eth RGMII TX ClkEth TX EnEth TX D0Eth TX D1Eth TX D2Eth TX D3Eth PHY nRESETEth PHY IntcHDMI HPDHDMI DDC SDAHDMI DDC SCLeMMC D0eMMC D1eMMC D2eMMC D3eMMC D4eMMC D5eMMC D6eMMC D7eMMC ClkeMMC ReseteMMC CMDSDCard D1SDCard D0SDCard CLKSDCard CMDSDCard D3SDCard D2SDCard DetI2C A SDAI2C A SCKI2C B SDAI2C B SCKPWM DPWM BRevision Bit0Revision Bit1J2 Header Pin35J2 Header Pin36J2 Header Pin31TF VDD EnJ2 Header Pin32J2 Header Pin26J2 Header Pin29J2 Header Pin24J2 Header Pin23J2 Header Pin22J2 Header Pin21J2 Header Pin18J2 Header Pin33J2 Header Pin19J2 Header Pin16J2 Header Pin15J2 Header Pin12J2 Header Pin13J2 Header Pin8J2 Header Pin10J2 Header Pin11J2 Header Pin7emmc#mux-0emmc_nand_d07emmc_cmd emmc^mux-1 emmc_clk emmcemmc-ds$muxemmc_ds emmckemmc_clk_gate%muxBOOT_8  gpio_periphsknormuxnor_dnor_qnor_cnor_cs norspi-pinsmuxspi_misospi_mosispi_sclk spispi-ss0muxspi_ss0 spisdcardmux-03sdcard_d0sdcard_d1sdcard_d2sdcard_d3sdcard_cmd sdcard^mux-1 sdcard_clk sdcardsdcard_clk_gate muxCARD_2  gpio_periphsksdiomux-0)sdio_d0sdio_d1sdio_d2sdio_d3sdio_cmd sdio^mux-1 sdio_clk sdiosdio_clk_gatemuxGPIOX_4  gpio_periphsksdio_irqmux sdio_irq sdiouart_amuxuart_tx_auart_rx_a uart_auart_a_cts_rtsmuxuart_cts_auart_rts_a uart_auart_bmuxuart_tx_buart_rx_b uart_buart_b_cts_rtsmuxuart_cts_buart_rts_b uart_buart_cmuxuart_tx_cuart_rx_c uart_cuart_c_cts_rtsmuxuart_cts_cuart_rts_c uart_ci2c_amuxi2c_sck_ai2c_sda_a i2c_ai2c_bmuxi2c_sck_bi2c_sda_b i2c_bi2c_cmuxi2c_sck_ci2c_sda_c i2c_ceth-rgmiimuxeth_mdioeth_mdceth_clk_rx_clketh_rx_dveth_rxd0eth_rxd1eth_rxd2eth_rxd3eth_rgmii_tx_clketh_tx_eneth_txd0eth_txd1eth_txd2eth_txd3 etheth-rmiimuxXeth_mdioeth_mdceth_clk_rx_clketh_rx_dveth_rxd0eth_rxd1eth_tx_eneth_txd0eth_txd1 ethpwm_a_xmuxpwm_a_x pwm_a_xpwm_a_ymuxpwm_a_y pwm_a_ypwm_bmuxpwm_b pwm_bpwm_dmuxpwm_d pwm_dpwm_emuxpwm_e pwm_epwm_f_xmuxpwm_f_x pwm_f_xpwm_f_ymuxpwm_f_y pwm_f_yhdmi_hpd)mux hdmi_hpd  hdmi_hpdhdmi_i2c*muxhdmi_sdahdmi_scl  hdmi_i2ci2sout_ch23_ymuxi2sout_ch23_y i2s_outi2sout_ch45_ymuxi2sout_ch45_y i2s_outi2sout_ch67_ymuxi2sout_ch67_y i2s_outspdif_out_ymux spdif_out_y  spdif_outbus@c8838000 ,simple-busDȃ =ȃvideo-lut@48,amlogic,canvasDHbus@c883c000 ,simple-busDȃ  =ȃ system-controller@0/,amlogic,meson-gx-hhi-sysctrlsimple-mfdsysconDclock-controller,amlogic,gxbb-clkc& xtalmailbox@404,amlogic,meson-gxbb-mhuDL$z ethernet@c94100005,amlogic,meson-gxbb-dwmacsnps,dwmac-3.70asnps,dwmac DAȃE@  macirqokay$stmmacethclkin0clkin1defaultrgmiimdio,snps,dwmac-mdio ethernet-phy@0D'u0 apb@d0000000 ,simple-busD  = mmc@70000,,amlogic,meson-gx-mmcamlogic,meson-gxbb-mmcD  disabled^wcoreclkin0clkin1 ,mmc@72000,,amlogic,meson-gx-mmcamlogic,meson-gxbb-mmcD  okay_zcoreclkin0clkin1 - defaultclk-gate *7DQ_ j,s!"mmc@74000,,amlogic,meson-gx-mmcamlogic,meson-gxbb-mmcD@ okay`}coreclkin0clkin1 .#$%defaultclk-gateQ _&s'gpu@c0000%,amlogic,meson-gxbb-maliarm,mali-450D x1 gpgpmmupppmupp0ppmmu0pp1ppmmu1pp2ppmmu2 j buscore ? dfjO ff,X,Xvpu@d0100000,,amlogic,meson-gxbb-vpuamlogic,meson-gx-vpu Dȃvpuhhi  Cport@0Dport@1Dendpoint(+hdmi-tx@c883a0004,amlogic,meson-gxbb-dw-hdmiamlogic,meson-gx-dw-hdmiDȃ 9 okay OBRhdmitx_apbhdmitxhdmitx_phy? Misfriahbvenci)*defaultport@0Dendpoint+(port@1Dendpoint,1phy@c0000000,amlogic,meson-gxbb-usb2-phyD  "72usb_generalusb disabled-.phy@c0000020,amlogic,meson-gxbb-usb2-phyD  "73usb_generalusbokay-/usb@c9000000!,amlogic,meson-gxbb-usbsnps,dwc2D Aotg. usb2-phyhost disabledusb@c9100000!,amlogic,meson-gxbb-usbsnps,dwc2D @otg/ usb2-phyhostokayaliases/soc/bus@c8100000/serial@4c0/soc/ethernet@c9410000memory@0memoryDregulator-usb-pwrs,regulator-fixed "USB_OTG_PWR1LK@ILK@ a0f-leds ,gpio-ledsblueyc2:blue:alive 0  heartbeatoffregulator-tflash_vdd,regulator-fixed "TFLASH_VDD12ZI2Z aWf!gpio-regulator-tf_io,regulator-gpio"TF_IO1w@I2Z 02Zw@"regulator-vcc1v8,regulator-fixed"VCC1V81w@Iw@regulator-vcc3v3,regulator-fixed"VCC3V312ZI2Z'emmc-pwrseq,mmc-pwrseq-emmc &hdmi-connector,hdmi-connectoraportendpoint1, interrupt-parent#address-cells#size-cellscompatiblemodelrangesregno-mapreusablesizealignmentlinux,cma-defaultstdout-pathamlogic,pipelinepower-domainsstatusclocksdevice_typeenable-methodnext-level-cachephandleinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsread-onlymboxesshmemclock-indices#thermal-sensor-cellsinterrupt-controller#interrupt-cellsamlogic,channel-interrupts#reset-cellsclock-namespinctrl-0pinctrl-names#pwm-cells#io-channel-cellsvref-supplyresetsnum-cs#power-domain-cellsamlogic,hhi-sysctrlassigned-clocksassigned-clock-parentsassigned-clock-rateshdmi-phandleamlogic,has-chip-idreg-namesgpio-controller#gpio-cellsgpio-rangesgpio-line-namesgpio-hoggpiosoutput-highline-namegroupsfunctionbias-disableinterrupt-namesamlogic,ao-sysctrlamlogic,canvasreset-namesbias-pull-upbias-pull-down#mbox-cellsrx-fifo-depthtx-fifo-depthphy-handlephy-modeamlogic,tx-delay-nsreset-assert-usreset-deassert-usreset-gpiospinctrl-1bus-widthcap-sd-highspeedsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-ddr50max-frequencydisable-wpcd-gpiosvmmc-supplyvqmmc-supplynon-removablecap-mmc-highspeedmmc-ddr-1_8vmmc-hs200-1_8vmmc-pwrseqremote-endpoint#phy-cellsphy-supplyphysphy-namesdr_modeserial0ethernet0regulator-nameregulator-min-microvoltregulator-max-microvoltgpioenable-active-highlabellinux,default-triggerdefault-stategpios-states