6n82(~2 ,Einfochips i.MX8QXP AI_ML%2einfochips,imx8qxp-ai_mlfsl,imx8qxpaliases=/bus@5d000000/gpio@5d080000C/bus@5d000000/gpio@5d090000I/bus@5d000000/gpio@5d0a0000O/bus@5d000000/gpio@5d0b0000U/bus@5d000000/gpio@5d0c0000[/bus@5d000000/gpio@5d0d0000a/bus@5d000000/gpio@5d0e0000g/bus@5d000000/gpio@5d0f0000m/bus@5b000000/mmc@5b010000r/bus@5b000000/mmc@5b020000w/bus@5b000000/mmc@5b030000|/bus@5d000000/mailbox@5d1c0000/bus@59000000/serial@5a060000/bus@59000000/serial@5a070000/bus@59000000/serial@5a080000/bus@59000000/serial@5a090000cpus cpu@0cpu2arm,cortex-a35pscicpu@1cpu2arm,cortex-a35pscicpu@2cpu2arm,cortex-a35pscicpu@3cpu2arm,cortex-a35pscil2-cache02cacheopp-table2operating-points-v2opp-900000000 5B@!Iopp-1200000000 G!I2interrupt-controller@51a00000 2arm,gic-v3 QQ >O d reserved-memory odsp@92400000@v pmu2arm,armv8-pmuv3 dpsci 2arm,psci-1.0smcscu 2fsl,imx-scu%}tx0tx1tx2tx3rx0rx1rx2rx3gip3lclock-controller2fsl,imx8qxp-clkxtal_32KHzxtal_24Mhzpinctrl2fsl,imx8qxp-iomuxcfec1grp5 4 & % ' ( ) * , - . / 0 1 ledsgrpH=!>!!!!!lpuart0grp0o p j i  lpuart1grpN M  lpuart2grpr q lpuart3grpm n usdhc1grpH A ! ! ! !!usdhc2grp`A! !!!"!#!!!wifiregongrp !imx8qx-ocotp2fsl,imx8qxp-scu-ocotp imx8qx-pd2fsl,imx8qxp-scu-pd rtc2fsl,imx8qxp-sc-rtcwatchdog"2fsl,imx8qxp-sc-wdtfsl,imx-sc-wdt<timer2arm,armv8-timer0d   clock-xtal32k 2fixed-clock xtal_32KHzclock-xtal24m 2fixed-clockn6 xtal_24MHzbus@59000000 2simple-bus oYYclock-controller@590000002fsl,imx8qxp-lpcg-admaYdsp@596e80002fsl,imx8qxp-dspYn*,+ipgocramcore   }txdb0txdb1rxdb0rxdb10      disabledserial@5a060000&2fsl,imx8qxp-lpuartfsl,imx7ulp-lpuartZ d ipgbaud 9okaydefault% /serial@5a070000&2fsl,imx8qxp-lpuartfsl,imx7ulp-lpuartZ d ipgbaud :okaydefault% serial@5a080000&2fsl,imx8qxp-lpuartfsl,imx7ulp-lpuartZ d ipgbaud ;okaydefault%serial@5a090000&2fsl,imx8qxp-lpuartfsl,imx7ulp-lpuartZ  d ipgbaud <okaydefault%i2c@5a800000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cZ@ dper?On6 ` disabledi2c@5a810000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cZ@ dper?On6 a disabledi2c@5a820000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cZ@ dper?On6 b disabledi2c@5a830000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cZ@ dper?On6 c disabledbus@5b000000 2simple-bus o[[clock-controller@5b2000002fsl,imx8qxp-lpcg-conn[ mmc@5b010000"2fsl,imx8qxp-usdhcfsl,imx7d-usdhc d[ ipgperahb?(O  okay default%dntwifi@12brcm,bcm4329-fmacmmc@5b020000"2fsl,imx8qxp-usdhcfsl,imx7d-usdhc d[ ipgperahb?)O  okaydefault%d mmc@5b030000"2fsl,imx8qxp-usdhcfsl,imx7d-usdhc d[ ipgperahb?*O   disabledethernet@5b0400002fsl,imx8qxp-fecfsl,imx6sx-fec[0d ipgahbenet_clk_refptp okaydefault% rgmii-idmdio ethernet-phy@02ethernet-phy-ieee802.3-c22ethernet@5b0500002fsl,imx8qxp-fecfsl,imx6sx-fec[0d ipgahbenet_clk_refptp  disabledbus@5c000000 2simple-bus o\\ddr-pmu@5c0200002fsl,imx8-ddr-pmu\ dbus@5d000000 2simple-bus o]]gpio@5d080000 2fsl,imx8qxp-gpiofsl,imx35-gpio] dO> gpio@5d090000 2fsl,imx8qxp-gpiofsl,imx35-gpio]  dO> gpio@5d0a0000 2fsl,imx8qxp-gpiofsl,imx35-gpio]  dO> gpio@5d0b0000 2fsl,imx8qxp-gpiofsl,imx35-gpio]  dO> gpio@5d0c0000 2fsl,imx8qxp-gpiofsl,imx35-gpio]  dO> gpio@5d0d0000 2fsl,imx8qxp-gpiofsl,imx35-gpio]  dO> gpio@5d0e0000 2fsl,imx8qxp-gpiofsl,imx35-gpio] dO> gpio@5d0f0000 2fsl,imx8qxp-gpiofsl,imx35-gpio] dO> mailbox@5d1b00002fsl,imx8qxp-mufsl,imx6sx-mu] d  disabledmailbox@5d1c00002fsl,imx8qxp-mufsl,imx6sx-mu] d mailbox@5d1d00002fsl,imx8qxp-mufsl,imx6sx-mu] d  disabledmailbox@5d1e00002fsl,imx8qxp-mufsl,imx6sx-mu] d  disabledmailbox@5d1f00002fsl,imx8qxp-mufsl,imx6sx-mu] d  disabledmailbox@5d2800002fsl,imx8qxp-mufsl,imx6sx-mu]( d   clock-controller@5d4000002fsl,imx8qxp-lpcg-lsio]@@chosen,/bus@59000000/serial@5a080000memory@80000000memoryleds 2gpio-ledsdefault%user-led1 8green:user1  >heartbeatuser-led2 8green:user2 >noneuser-led3 8green:user3 >mmc1Toffuser-led4 8green:user4 b>nonewlan-active-led 8yellow:wlan >phy0txToffbt-active-led8blue:bt  >hci0-powerToffsdio-pwrseq2mmc-pwrseq-simpledefault% r interrupt-parent#address-cells#size-cellsmodelcompatiblegpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7mmc0mmc1mmc2mu1serial0serial1serial2serial3device_typeregenable-methodnext-level-cacheclocksoperating-points-v2#cooling-cellsphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspend#interrupt-cellsinterrupt-controllerinterruptsrangesno-mapmbox-namesmboxes#clock-cellsclock-namesfsl,pins#power-domain-cellstimeout-secclock-frequencyclock-output-namespower-domainsmemory-regionstatuspinctrl-namespinctrl-0uart-has-rtsctsassigned-clocksassigned-clock-ratesbus-widthno-sdnon-removablemmc-pwrseqfsl,tuning-start-tapfsl,tuning-stepcd-gpiosfsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packetgpio-controller#gpio-cells#mbox-cellsstdout-pathlabellinux,default-triggerdefault-statepanic-indicatorreset-gpios