M8H($HXfsl,imx8mn-ddr4-evkfsl,imx8mn +7NXP i.MX8MNano DDR4 EVK boardaliases&=/soc@0/bus@30800000/ethernet@30be0000"G/soc@0/bus@30000000/gpio@30200000"M/soc@0/bus@30000000/gpio@30210000"S/soc@0/bus@30000000/gpio@30220000"Y/soc@0/bus@30000000/gpio@30230000"_/soc@0/bus@30000000/gpio@30240000!e/soc@0/bus@30800000/i2c@30a20000!j/soc@0/bus@30800000/i2c@30a30000!o/soc@0/bus@30800000/i2c@30a40000!t/soc@0/bus@30800000/i2c@30a50000!y/soc@0/bus@30800000/mmc@30b40000!~/soc@0/bus@30800000/mmc@30b50000!/soc@0/bus@30800000/mmc@30b60000$/soc@0/bus@30800000/serial@30860000$/soc@0/bus@30800000/serial@30890000$/soc@0/bus@30800000/serial@30880000$/soc@0/bus@30800000/serial@30a60000!/soc@0/bus@30800000/spi@30820000!/soc@0/bus@30800000/spi@30830000!/soc@0/bus@30800000/spi@30840000cpus+cpu@0cpuarm,cortex-a53lpsci speed_grade,cpu@1cpuarm,cortex-a53lpscicpu@2cpuarm,cortex-a53lpscicpu@3cpuarm,cortex-a53lpscil2-cache0cache7opp-tableoperating-points-v2?7opp-1200000000JGQ P_ pIopp-1400000000JSrNQ~_pIopp-1500000000JYh/QB@_pImemory@40000000memory@clock-osc-32k fixed-clockosc_32k7 clock-osc-24m fixed-clockn6osc_24m7 clock-ext1 fixed-clockk@ clk_ext17 clock-ext2 fixed-clockk@ clk_ext27 clock-ext3 fixed-clockk@ clk_ext37clock-ext4 fixed-clockk@ clk_ext47psci arm,psci-1.0smctimerarm,armv8-timer0 ?? ? ?zsoc@0 simple-bus+>bus@30000000fsl,aips-bussimple-bus0@+gpio@30200000fsl,imx8mn-gpiofsl,imx35-gpio0 @A( 7gpio@30210000fsl,imx8mn-gpiofsl,imx35-gpio0!BC((7%gpio@30220000fsl,imx8mn-gpiofsl,imx35-gpio0"DE(=gpio@30230000fsl,imx8mn-gpiofsl,imx35-gpio0#FG(l gpio@30240000fsl,imx8mn-gpiofsl,imx35-gpio0$HI(wwatchdog@30280000fsl,imx8mn-wdtfsl,imx21-wdt0( N4okay;defaultISwatchdog@30290000fsl,imx8mn-wdtfsl,imx21-wdt0) O 4disabledwatchdog@302a0000fsl,imx8mn-wdtfsl,imx21-wdt0*   4disableddma-controller@302b0000 fsl,imx8mn-sdmafsl,imx8mq-sdma0+ "hipgahbtimx/sdma/sdma-imx7d.bindma-controller@302c0000 fsl,imx8mn-sdmafsl,imx8mq-sdma0, ghipgahbtimx/sdma/sdma-imx7d.binpinctrl@30330000fsl,imx8mn-iomuxc03;default7fec1grphhlptx|T|t7i2c1grp0|\@l@7pmicirq4A7regusdhc2vmmcTA7$uart2grp0<@@@7usdhc2grpgpiod7usdhc2grp<@DHLP87usdhc2grp100mhz<@DHLP87usdhc2grp200mhz<@DHLP87usdhc3grp8@< $(0XhPlpLd7usdhc3grp100mhz8@< $(0XhPlpLd7usdhc3grp200mhz8@< $(0XhPlpLd7wdoggrp07iomuxc-gpr@30340000fsl,imx8mn-iomuxc-gprsyscon04ocotp-ctrl@30350000(fsl,imx8mn-ocotpfsl,imx7d-ocotpsyscon05+speed-grade@107anatop@303600006fsl,imx8mn-anatopfsl,imx8mm-anatopsysconsimple-bus06snvs@30370000#fsl,sec-v4.0-monsysconsimple-mfd077 snvs-rtc-lpfsl,sec-v4.0-mon-rtc-lp 4 hsnvs-rtcsnvs-powerkeyfsl,sec-v4.0-pwrkey  t4okayclock-controller@30380000fsl,imx8mn-ccm08 4hosc_32kosc_24mclk_ext1clk_ext2clk_ext3clk_ext47reset-controller@30390000fsl,imx8mn-srcsyscon09 Ybus@30400000fsl,aips-bussimple-bus0@@+pwm@30660000fsl,imx8mn-pwmfsl,imx27-pwm0f Qhipgper 4disabledpwm@30670000fsl,imx8mn-pwmfsl,imx27-pwm0g Rhipgper 4disabledpwm@30680000fsl,imx8mn-pwmfsl,imx27-pwm0h Shipgper 4disabledpwm@30690000fsl,imx8mn-pwmfsl,imx27-pwm0i Thipgper 4disabledbus@30800000fsl,aips-bussimple-bus0@+spi@30820000!fsl,imx8mn-ecspifsl,imx51-ecspi+0 hipgper rxtx 4disabledspi@30830000!fsl,imx8mn-ecspifsl,imx51-ecspi+0  hipgper rxtx 4disabledspi@30840000!fsl,imx8mn-ecspifsl,imx51-ecspi+0 !hipgper rxtx 4disabledserial@30860000fsl,imx8mn-uartfsl,imx6q-uart0 hipgper rxtx 4disabledserial@30880000fsl,imx8mn-uartfsl,imx6q-uart0 hipgper rxtx 4disabledserial@30890000fsl,imx8mn-uartfsl,imx6q-uart0 hipgper4okay;defaultIi2c@30a20000fsl,imx8mn-i2cfsl,imx21-i2c+0 #4okay;defaultIpmic@4b rohm,bd71847KI regulatorsBUCK1 BUCK1 `1 I[oBUCK2 BUCK2 `1 I[o7BUCK3 BUCK3 `1pBUCK4 BUCK4-12ZI[BUCK5 BUCK5}1pI[BUCK6 BUCK6 51\I[LDO1 LDO1-12ZI[LDO2 LDO2 1 I[LDO3 LDO3w@12ZI[LDO4 LDO4 1w@I[LDO6 LDO6 1w@I[i2c@30a30000fsl,imx8mn-i2cfsl,imx21-i2c+0 $ 4disabledi2c@30a40000+fsl,imx8mn-i2cfsl,imx21-i2c0 % 4disabledi2c@30a50000fsl,imx8mn-i2cfsl,imx21-i2c+0 & 4disabledserial@30a60000fsl,imx8mn-uartfsl,imx6q-uart0 hipgper rxtx 4disabledmmc@30b40000!fsl,imx8mn-usdhcfsl,imx7d-usdhc0 VM hipgahbpergׄ 4disabledmmc@30b50000!fsl,imx8mn-usdhcfsl,imx7d-usdhc0 VM hipgahbper4okay";defaultstate_100mhzstate_200mhzI mmc@30b60000!fsl,imx8mn-usdhcfsl,imx7d-usdhc0 VM hipgahbperׄ4okay";defaultstate_100mhzstate_200mhzIdma-controller@30bd0000 fsl,imx8mn-sdmafsl,imx8mq-sdma0 Thipgahbtimx/sdma/sdma-imx7d.bin7ethernet@30be0000fsl,imx8mn-fecfsl,imx6sx-fec0$vwx(cbd"hipgahbptpenet_clk_refenet_out Lcbc6:;sY@&84okay;defaultI Jrgmii-idS^mdio+ethernet-phy@0ethernet-phy-ieee802.3-c22o7bus@32c00000fsl,aips-bussimple-bus2@+usb@32e40000fsl,imx8mn-usbfsl,imx7d-usb2 (husb1_ctrl_root_clkPq@2  4disabledusbmisc@32e40200%fsl,imx8mn-usbmiscfsl,imx7d-usbmisc27 usb@32e50000fsl,imx8mn-usbfsl,imx7d-usb2 )husb1_ctrl_root_clkPq@2!" 4disabledusbmisc@32e50200%fsl,imx8mn-usbmiscfsl,imx7d-usbmisc27"dma-controller@33000000&fsl,imx7d-dma-apbhfsl,imx28-dma-apbh3 0    gpmi0gpmi1gpmi2gpmi3t7#nand-controller@33002000)fsl,imx8mn-gpmi-nandfsl,imx7d-gpmi-nand+3 3@@gpmi-nandbch bchhgpmi_iogpmi_bch_apb#rx-tx 4disabledinterrupt-controller@38800000 arm,gic-v388   7usbphynop1usb-nop-xceivrr2 hmain_clk7usbphynop2usb-nop-xceivrr2 hmain_clk7!chosen$/soc@0/bus@30800000/serial@30890000regulator-usdhc2regulator-fixed;defaultI$ VSD_3V32Z12Z  %7 compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0gpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3mmc0mmc1mmc2serial0serial1serial2serial3spi0spi1spi2device_typeregclock-latencyclocksenable-methodnext-level-cacheoperating-points-v2nvmem-cellsnvmem-cell-namescpu-supplyphandleopp-sharedopp-hzopp-microvoltopp-supported-hwclock-latency-nsopp-suspend#clock-cellsclock-frequencyclock-output-namesinterruptsarm,no-tick-in-suspendrangesgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellsgpio-rangesstatuspinctrl-namespinctrl-0fsl,ext-reset-outputclock-names#dma-cellsfsl,sdma-ram-script-namefsl,pinsregmapoffsetlinux,keycodewakeup-source#reset-cells#pwm-cellsdmasdma-namesrohm,reset-snvs-poweredregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onregulator-ramp-delayassigned-clocksassigned-clock-ratesfsl,tuning-start-tapfsl,tuning-stepbus-widthpinctrl-1pinctrl-2cd-gpiosvmmc-supplynon-removableassigned-clock-parentsfsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packetat803x,led-act-blind-workaroundat803x,eee-disabledat803x,vddio-1p8vfsl,usbphyfsl,usbmisc#index-cellsinterrupt-namesdma-channelsreg-namesstdout-pathgpioenable-active-high