8p( 8google,veyron-jaq-rev5google,veyron-jaq-rev4google,veyron-jaq-rev3google,veyron-jaq-rev2google,veyron-jaq-rev1google,veyron-jaqgoogle,veyronrockchip,rk3288& 7Google Jaqaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/spi@ff110000/ec@0/i2c-tunnelarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12h w@\@p@ @@OOa sB@ ~ ' 9 K 0 *@8?KQcpu@501cpuarm,cortex-a12KQcpu@502cpuarm,cortex-a12KQcpu@503cpuarm,cortex-a12KQamba simple-busYdma-controller@ff250000arm,pl330arm,primecell%@`k8 apb_pclkKQdma-controller@ff600000arm,pl330arm,primecell`@`k8 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@`k8 apb_pclkKaQareserved-memoryYdma-unusable@fe000000oscillator fixed-clockn6xin24mK Q timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 8 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 8Drvbiuciuciu-driveciu-sample  @ resetokay"4E W `Z~ defaultdwmmc@ff0d0000rockchip,rk3288-dw-mshcр 8Eswbiuciuciu-driveciu-sample ! @ resetokay4'~default dwmmc@ff0e0000rockchip,rk3288-dw-mshcр 8Ftxbiuciuciu-driveciu-sample "@ reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 8Guybiuciuciu-driveciu-sample #@ resetokay"`5'~default saradc@ff100000rockchip,saradc $D8I[saradcapb_pclkW  saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi8ARspiclkapb_pclkV  [txrx ,default !"okayec@0google,cros-ec-spie& default#-i2c-tunnelgoogle,cros-ec-i2c-tunnelsbs-battery@bsbs,sbs-battery keyboard-controllergoogle,cros-ec-keyb @ };0DY1 d>"A#( C  \=@V B |)<?   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ispi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi8BSspiclkapb_pclkV [txrx -default$%&' disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi8CTspiclkapb_pclkV[txrx .default()*+okay flash@0jedec,spi-nori2c@ff140000rockchip,rk3288-i2c >i2c8Mdefault,okay,2Ddtpm@20infineon,slb9645tt [i2c@ff150000rockchip,rk3288-i2c ?i2c8Odefault- disabledi2c@ff160000rockchip,rk3288-i2c @i2c8Pdefault.okay,2D,ts3a227e@3b ti,ts3a227e;&/default0sKQtrackpad@15elan,ekth3000& default1~2i2c@ff170000rockchip,rk3288-i2c Ai2c8Qdefault3okay,,DKtQtserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 78MUbaudclkapb_pclkdefault 456okayMlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 88NVbaudclkapb_pclkdefault7okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 98OWbaudclkapb_pclkdefault8okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :8PXbaudclkapb_pclkdefault9 disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;8QYbaudclkapb_pclkdefault: disabledthermal-zonesreserve_thermal;cpu_thermald;tripscpu_alert0ppassiveK<Q<cpu_alert1$passiveK=Q=cpu_crit_ criticalcooling-mapsmap0< #map1= #gpu_thermald;tripsgpu_alert0ppassiveK>Q>gpu_crit_ criticalcooling-mapsmap0> #tsadc@ff280000rockchip,rk3288-tsadc( %8HZtsadcapb_pclk  tsadc-apbinitdefaultsleep?2@<?F\sokaysK;Q;ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irqA88fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB  stmmaceth disabledusb@ff500000 generic-ehciP 8usbhostBusbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 8otghostC usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 8otghost@@ D usb2-phyokayzDusb@ff5c0000 generic-ehci\ 8usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c8LdefaultEokay,2Ddpmic@1brockchip,rk808xin32kwifibt_32kin&/default FGH6Wco{I2II KQregulatorsDCDC_REG1vdd_arm* qB ZqKQregulator-state-memoDCDC_REG2vdd_gpu* 5BZqKxQxregulator-state-memB@DCDC_REG3 vcc135_ddrregulator-state-memDCDC_REG4vcc_18*w@Bw@KQregulator-state-memw@LDO_REG1 vcc33_io*2ZB2ZK2Q2regulator-state-mem2ZLDO_REG3vdd_10*B@BB@regulator-state-memB@LDO_REG7vdd10_lcd_pwren_h*&%B&%regulator-state-memoSWITCH_REG1 vcc33_lcdK_Q_regulator-state-memoLDO_REG6 vcc18_codec*w@Bw@K`Q`regulator-state-memoLDO_REG4 vccio_sd*w@B2ZKQregulator-state-memoLDO_REG5 vcc33_sd*2ZB2ZK Q regulator-state-memoLDO_REG8 vcc33_ccd*2ZB2Zregulator-state-mem2ZLDO_REG2mic_vcc*w@Bw@regulator-state-memoi2c@ff660000rockchip,rk3288-i2cf =i2c8NdefaultJokay,2D max98090@10maxim,max98090&Kmclk8qdefaultLKQpwm@ff680000rockchip,rk3288-pwmhdefaultM8^pwmokayKQpwm@ff680010rockchip,rk3288-pwmhdefaultN8^pwmokaypwm@ff680020rockchip,rk3288-pwmh defaultO8^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultP8^pwm disabledbus_intmem@ff700000 mmio-sramp Ypsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsKQpower-controller!rockchip,rk3288-power-controllerh KdQdpd_vio@9 8chgfdehilkj$QRSTUVWXYpd_hevc@11 8opZ[pd_video@12 8\pd_gpu@13 8]^reboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruvAHjk$#gׄeрxhрxhKQsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwKAQAedp-phyrockchip,rk3288-dp-phy8h24m,okayKoQoio-domains"rockchip,rk3288-io-voltage-domainokay72ALZ2j2x_`usbphyrockchip,rk3288-usb-phyokayusb-phy@320, 8]phyclkKDQDusb-phy@334,48^phyclkKBQBusb-phy@348,H8_phyclkKCQCwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt8p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk8TVa[tx 6defaultbA disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5Vaa[txrxi2s_hclki2s_clk8RdefaultcokayKQcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 8}aclkhclksclkapb_pclk  crypto-rstokayvop@ff930000rockchip,rk3288-vop 8aclk_vopdclk_vophclk_vopd def  axiahbdclkeokayportK Q endpoint@0 fKuQuendpoint@1 gKqQqendpoint@2 hKmQmiommu@ff930300rockchip,iommu  vopb_mmud  okayKeQevop@ff940000rockchip,rk3288-vop 8aclk_vopdclk_vophclk_vopd   axiahbdclkiokayportK Q endpoint@0 jKvQvendpoint@1 kKrQrendpoint@2 lKnQniommu@ff940300rockchip,iommu  vopl_mmud  okayKiQimipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 8~d refpclkd A disabledportsportendpoint@0 mKhQhendpoint@1 nKlQldp@ff970000rockchip,rk3288-dp@ b8icdppclkodpo dpAokaydefaultpportsport@0endpoint@0 qKgQgendpoint@1 rKkQkport@1endpoint sKQhdmi@ff980000rockchip,rk3288-dw-hdmiA g8hm iahbisfrd okay #tportsportendpoint@0 uKfQfendpoint@1 vKjQjgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu8 /wd okay Cxgpu-opp-tableoperating-points-v2KwQwopp@100000000 O V~opp@200000000 O  V~opp@300000000 O VB@opp@400000000 Oׄ Vopp@500000000 Oe VOopp@600000000 O#F Vqos@ffaa0000syscon K]Q]qos@ffaa0080syscon K^Q^qos@ffad0000syscon KRQRqos@ffad0100syscon KSQSqos@ffad0180syscon KTQTqos@ffad0400syscon KUQUqos@ffad0480syscon KVQVqos@ffad0500syscon KQQQqos@ffad0800syscon KWQWqos@ffad0880syscon KXQXqos@ffad0900syscon KYQYqos@ffae0000syscon K\Q\qos@ffaf0000syscon KZQZqos@ffaf0080syscon K[Q[interrupt-controller@ffc01000 arm,gic-400 d y  @ `   KQefuse@ffb40000rockchip,rk3288-efuse 8q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrlAYdefaultsleepyz2y{gpio0@ff750000rockchip,gpio-banku Q8@   d yK/Q/gpio1@ff780000rockchip,gpio-bankx R8A   d ygpio2@ff790000rockchip,gpio-banky S8B   d yKQgpio3@ff7a0000rockchip,gpio-bankz T8C   d ygpio4@ff7b0000rockchip,gpio-bank{ U8D   d yKQgpio5@ff7c0000rockchip,gpio-bank| V8E   d yKQgpio6@ff7d0000rockchip,gpio-bank} W8F   d yKKQKgpio7@ff7e0000rockchip,gpio-bank~ X8G   d yK Q gpio8@ff7f0000rockchip,gpio-bank Y8H   d yhdmihdmi-ddc ||vcc50-hdmi-en |KQpcfg-pull-up K}Q}pcfg-pull-down K~Q~pcfg-pull-none K|Q|pcfg-pull-none-12ma  KQsleepglobal-pwroff |KyQyddrio-pwroff |ddr0-retention }ddr1-retention }edpedp-hpd  ~KpQpi2c0i2c0-xfer ||KEQEi2c1i2c1-xfer ||K,Q,i2c2i2c2-xfer  | |KJQJi2c3i2c3-xfer ||K-Q-i2c4i2c4-xfer ||K.Q.i2c5i2c5-xfer ||K3Q3i2s0i2s0-bus` ||||||KcQcsdmmcsdmmc-clk KQsdmmc-cmd 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  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~    'default :B@ ?' LKQgpio-charger gpio-charger Ymains Z/defaultpanelinnolux,n116bgesimple-panelokay L fportsportendpoint KsQsvccsysregulator-fixedvccsysKQvcc5-host1-regulatorregulator-fixed W j/ default vcc5_host1vcc5v-otg-regulatorregulator-fixed W j/ default vcc5_host2panel-regulatorregulator-fixed W j defaultpanel_regulator p LKQvcc18-lcdregulator-fixed W j default vcc18_lcd Lbacklight-regulatorregulator-fixed W j defaultbacklight_regulator L p:KQ #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2i2c20interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasenum-slotssd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplydisable-wppinctrl-namespinctrl-0cap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablemmc-hs200-1_8v#io-channel-cellsdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedti,micbiasvcc-supplywakeup-sourcereg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplyvcc9-supplyvcc11-supplydvs-gpiosregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cells#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supplysdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-busoperating-points-v2mali-supplyopp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervallinux,input-typepriorityreset-gpiosvin-supplyenable-active-highgpiorockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecbrightness-levelsdefault-brightness-levelenable-gpiosbacklight-boot-offpwmspwm-delay-uspower-supplycharger-typebacklightstartup-delay-us