C8( O*chipspark,popmetal-rk3288rockchip,rk3288&7PopMetal-RK3288aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0 $@29EKcpu@501cpuarm,cortex-a12EKcpu@502cpuarm,cortex-a12EKcpu@503cpuarm,cortex-a12EKamba simple-busSdma-controller@ff250000arm,pl330arm,primecell%@Ze2 apb_pclkEKdma-controller@ff600000arm,pl330arm,primecell`@Ze2 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@Ze2 apb_pclkE[K[reserved-memorySdma-unusable@fe000000oscillator fixed-clockn6xin24mE K timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvbiuciuciu-driveciu-sample  @resetokay.?Q\fdefaultt ~dwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswbiuciuciu-driveciu-sample ! @reset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxbiuciuciu-driveciu-sample "@reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guybiuciuciu-driveciu-sample #@resetokayQ\fdefaulttsaradc@ff100000rockchip,saradc $2I[saradcapb_pclkW saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARspiclkapb_pclk   txrx ,fdefaultt disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSspiclkapb_pclk  txrx -fdefaultt  disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTspiclkapb_pclk txrx .fdefaultt!"#$ disabledi2c@ff140000rockchip,rk3288-i2c >i2c2Mfdefaultt%okayak8963@0dasahi-kasei,ak8975 &&fdefaultt'"l3g4200d@69st,l3g4200d-gyro-i=mma8452@1d fsl,mma8452&&fdefaultt(i2c@ff150000rockchip,rk3288-i2c ?i2c2Ofdefaultt)okayi2c@ff160000rockchip,rk3288-i2c @i2c2Pfdefaultt*okayi2c@ff170000rockchip,rk3288-i2c Ai2c2Qfdefaultt+okayElKlserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7JT2MUbaudclkapb_pclkfdefaultt,okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8JT2NVbaudclkapb_pclkfdefaultt-okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9JT2OWbaudclkapb_pclkfdefaultt.okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :JT2PXbaudclkapb_pclkfdefaultt/okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;JT2QYbaudclkapb_pclkfdefaultt0okaythermal-zonesreserve_thermalaw1cpu_thermaladw1tripscpu_alert0ppassiveE2K2cpu_alert1$passiveE3K3cpu_crit_ criticalcooling-mapsmap02 map13 gpu_thermaladw1tripsgpu_alert0ppassiveE4K4gpu_crit_ criticalcooling-mapsmap04 tsadc@ff280000rockchip,rk3288-tsadc( %2HZtsadcapb_pclk tsadc-apbfinitdefaultsleept565sokayE1K1ethernet@ff290000rockchip,rk3288-gmac)3macirqeth_wake_irqC782fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmacethokP8[rgmiidinput q9 'B@:fdefaultt;0usb@ff500000 generic-ehciP 2usbhost<usb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2otghost= usb2-phy disabledusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2otgotg@@ > usb2-phyokayusb@ff5c0000 generic-ehci\ 2usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c2Lfdefaultt?okaypmic@1brockchip,rk808&@fdefaulttAB,Mxin32krk808-clkout2[CgCsCCCCDC=regulatorsDCDC_REG1 q p8vdd_armEKregulator-state-memGDCDC_REG2 P 8vdd_gpuregulator-state-mem`xB@DCDC_REG38vcc_ddrregulator-state-mem`DCDC_REG42Z 2Z8vcc_ioEKregulator-state-mem`x2ZLDO_REG12Z 2Z8vcc_lanE8K8regulator-state-mem`x2ZLDO_REG2w@ 2Z 8vccio_sdEKregulator-state-memGLDO_REG3B@ B@8vdd_10regulator-state-mem`xB@LDO_REG4w@ w@ 8vcc18_lcdregulator-state-mem`xw@LDO_REG5w@ 2Z8ldo5LDO_REG6B@ B@ 8vdd10_lcdregulator-state-mem`xB@LDO_REG7w@ w@8vcc_18EDKDregulator-state-mem`xw@LDO_REG82Z 2Z8vcca_33EXKXregulator-state-mem`x2ZSWITCH_REG1 8vccio_wlEZKZregulator-state-mem`SWITCH_REG28vcc_lcdregulator-state-mem`i2c@ff660000rockchip,rk3288-i2cf =i2c2NfdefaulttEokaypwm@ff680000rockchip,rk3288-pwmhfdefaulttF2^pwm disabledpwm@ff680010rockchip,rk3288-pwmhfdefaulttG2^pwm disabledpwm@ff680020rockchip,rk3288-pwmh fdefaulttH2^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0fdefaulttI2^pwm disabledbus_intmem@ff700000 mmio-sramp Spsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEKpower-controller!rockchip,rk3288-power-controllerh E^K^pd_vio@9 2chgfdehilkj$JKLMNOPQRpd_hevc@11 2opSTpd_video@12 2Upd_gpu@13 2VWreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruvC7Hjk$#gׄeрxhрxhEKsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwE7K7edp-phyrockchip,rk3288-dp-phy2h24m disabledEiKiio-domains"rockchip,rk3288-io-voltage-domainokay$X1;YFT8bpZusbphyrockchip,rk3288-usb-phyokayusb-phy@320 2]phyclkE>K>usb-phy@33442^phyclkE<K<usb-phy@348H2_phyclkE=K=watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p O disabledsound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk2T[ tx 6fdefaultt\C7 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5[[ txrxi2s_hclki2s_clk2Rfdefaultt] disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}aclkhclksclkapb_pclk crypto-rstokayvop@ff930000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vop^ def axiahbdclk_okayportE K endpoint@0`EmKmendpoint@1aEjKjendpoint@2bEgKgiommu@ff930300rockchip,iommu  3vopb_mmu^ okayE_K_vop@ff940000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vop^  axiahbdclkcokayportE K endpoint@0dEnKnendpoint@1eEkKkendpoint@2fEhKhiommu@ff940300rockchip,iommu  3vopl_mmu^ okayEcKcmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 2~d refpclk^ C7 disabledportsportendpoint@0gEbKbendpoint@1hEfKfdp@ff970000rockchip,rk3288-dp@ b2icdppclkidpodpC7 disabledportsport@0endpoint@0jEaKaendpoint@1kEeKehdmi@ff980000rockchip,rk3288-dw-hdmiTC7 g2hm iahbisfr^ okaylportsportendpoint@0mE`K`endpoint@1nEdKdgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ 3jobmmugpu2*o^  disabledgpu-opp-tableoperating-points-v2EoKoopp@100000000>E~opp@200000000> E~opp@300000000>EB@opp@400000000>ׄEopp@500000000>eEOopp@600000000>#FEqos@ffaa0000syscon EVKVqos@ffaa0080syscon EWKWqos@ffad0000syscon EKKKqos@ffad0100syscon ELKLqos@ffad0180syscon EMKMqos@ffad0400syscon ENKNqos@ffad0480syscon EOKOqos@ffad0500syscon EJKJqos@ffad0800syscon EPKPqos@ffad0880syscon EQKQqos@ffad0900syscon ERKRqos@ffae0000syscon EUKUqos@ffaf0000syscon ESKSqos@ffaf0080syscon ETKTinterrupt-controller@ffc01000 arm,gic-400Sh  @ `   EKefuse@ffb40000rockchip,rk3288-efuse 2q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrlC7Sgpio0@ff750000rockchip,gpio-banku Q2@yShE@K@gpio1@ff780000rockchip,gpio-bankx R2AyShgpio2@ff790000rockchip,gpio-banky S2ByShgpio3@ff7a0000rockchip,gpio-bankz T2CyShgpio4@ff7b0000rockchip,gpio-bank{ U2DyShE9K9gpio5@ff7c0000rockchip,gpio-bank| V2EyShgpio6@ff7d0000rockchip,gpio-bank} W2FyShgpio7@ff7e0000rockchip,gpio-bank~ X2GyShEvKvgpio8@ff7f0000rockchip,gpio-bank Y2HyShE&K&hdmihdmi-ddc pppcfg-pull-upEqKqpcfg-pull-downErKrpcfg-pull-noneEpKppcfg-pull-none-12ma EsKssleepglobal-pwroffpEBKBddrio-pwroffpddr0-retentionqddr1-retentionqedpedp-hpd ri2c0i2c0-xfer ppE?K?i2c1i2c1-xfer ppE%K%i2c2i2c2-xfer  p pEEKEi2c3i2c3-xfer ppE)K)i2c4i2c4-xfer ppE*K*i2c5i2c5-xfer ppE+K+i2s0i2s0-bus`ppppppE]K]sdmmcsdmmc-clkpE K sdmmc-cmdqE K sdmmc-cdqEKsdmmc-bus1qsdmmc-bus4@qqqqEKsdmmc-pwr pEwKwsdio0sdio0-bus1qsdio0-bus4@qqqqsdio0-cmdqsdio0-clkpsdio0-cdqsdio0-wpqsdio0-pwrqsdio0-bkpwrqsdio0-intqsdio1sdio1-bus1qsdio1-bus4@qqqqsdio1-cdqsdio1-wpqsdio1-bkpwrqsdio1-intqsdio1-cmdqsdio1-clkpsdio1-pwr qemmcemmc-clkpEKemmc-cmdqEKemmc-pwr qEKemmc-bus1qemmc-bus4@qqqqemmc-bus8qqqqqqqqEKspi0spi0-clk qEKspi0-cs0 qEKspi0-txqEKspi0-rxqEKspi0-cs1qspi1spi1-clk qEKspi1-cs0 qE K spi1-rxqEKspi1-txqEKspi2spi2-cs1qspi2-clkqE!K!spi2-cs0qE$K$spi2-rxqE#K#spi2-tx qE"K"uart0uart0-xfer qpE,K,uart0-ctsquart0-rtspuart1uart1-xfer q pE-K-uart1-cts quart1-rts puart2uart2-xfer qpE.K.uart3uart3-xfer qpE/K/uart3-cts quart3-rts puart4uart4-xfer  q pE0K0uart4-ctsquart4-rtsptsadcotp-gpio pE5K5otp-out pE6K6pwm0pwm0-pinpEFKFpwm1pwm1-pinpEGKGpwm2pwm2-pinpEHKHpwm3pwm3-pinpEIKIgmacrgmii-pinsppppssssppp ssppE;K;rmii-pinsppppppppppspdifspdif-tx pE\K\ak8963comp-intqE'K'buttonspwrbtnqEtKtdvpdvp-pwrpEyKyirir-intqEuKumma8452gsensor-intqE(K(pmicpmic-intqEAKAmemory@0memoryexternal-gmac-clock fixed-clocksY@ ext_gmacE:K:gpio-keys gpio-keysfdefaultttpower @tGPIO Key PowerM dir-receivergpio-ir-receiver @fdefaulttuflash-regulatorregulator-fixed 8vcc_flashw@ w@ EKsdmmc-regulatorregulator-fixed |v fdefaulttw8vcc_sd2Z 2Z + EKvsys-regulatorregulator-fixed8vcc_sysLK@ LK@ECKCvcc18-dvp-regulatorregulator-fixed 8vcc18-dvpw@ w@ xEYKYvcc28-dvp-regulatorregulator-fixed < |@fdefaultty 8vcc28_dvp* * ExKx #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplymmc-ddr-1_8vmmc-hs200-1_8vnon-removable#io-channel-cellsdmasdma-namesvdd-supplyvid-supplyst,drdy-int-pinvddio-supplyreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-busoperating-points-v2opp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthautorepeatgpioslinux,codelabellinux,input-typedebounce-intervalvin-supplystartup-delay-usenable-active-high