8('firefly,firefly-rk3288rockchip,rk3288&7Firefly-RK3288aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0 $@29EKcpu@501cpuarm,cortex-a12EKcpu@502cpuarm,cortex-a12EKcpu@503cpuarm,cortex-a12EKamba simple-busSdma-controller@ff250000arm,pl330arm,primecell%@Ze2 apb_pclkEKdma-controller@ff600000arm,pl330arm,primecell`@Ze2 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@Ze2 apb_pclkEcKcreserved-memorySdma-unusable@fe000000oscillator fixed-clockn6xin24mE K timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvbiuciuciu-driveciu-sample  @resetokay.?Q\fdefaultt ~dwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswbiuciuciu-driveciu-sample ! @resetokayQ\fdefault t~dwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxbiuciuciu-driveciu-sample "@reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guybiuciuciu-driveciu-sample #@resetokayQ\fdefaultt~saradc@ff100000rockchip,saradc $2I[saradcapb_pclkW saradc-apbokayEKspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARspiclkapb_pclk  txrx ,fdefaultt !"okayspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSspiclkapb_pclk txrx -fdefaultt#$%& disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTspiclkapb_pclktxrx .fdefaultt'()* disabledi2c@ff140000rockchip,rk3288-i2c >i2c2Mfdefaultt+okayi2c@ff150000rockchip,rk3288-i2c ?i2c2Ofdefaultt, disabledi2c@ff160000rockchip,rk3288-i2c @i2c2Pfdefaultt-okayi2c@ff170000rockchip,rk3288-i2c Ai2c2Qfdefaultt.okayEtKtserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 72MUbaudclkapb_pclkfdefault t/01okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 82NVbaudclkapb_pclkfdefaultt2okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 92OWbaudclkapb_pclkfdefaultt3okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :2PXbaudclkapb_pclkfdefaultt4okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;2QYbaudclkapb_pclkfdefaultt5 disabledthermal-zonesreserve_thermal 6cpu_thermald 6tripscpu_alert0p)passiveE7K7cpu_alert1$)passiveE8K8cpu_crit_) criticalcooling-mapsmap047 9map148 9gpu_thermald 6tripsgpu_alert0p)passiveE9K9gpu_crit_) criticalcooling-mapsmap049 9tsadc@ff280000rockchip,rk3288-tsadc( %2HZtsadcapb_pclk tsadc-apbfinitdefaultsleept:H;R:\rsokayE6K6ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq<82fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmacethok=inputfdefaultt>?@A Brgmii  6'B@ KC[0dusb@ff500000 generic-ehciP 2usbhostmDrusb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2otg|hostmE rusb2-phyokayfdefaulttFusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2otg|otg@@ mG rusb2-phyokayusb@ff5c0000 generic-ehci\ 2usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c2LfdefaulttHokaysyr827@40silergy,syr827@vdd_cpu Pp$6,R@gEKsyr828@41silergy,syr828Avdd_gpu PpgExKxhym8563@51haoyu,hym8563Qxin32k&IfdefaulttJact8846@5aactive-semi,act8846ZfdefaulttKLrMregulatorsREG1vcc_ddrOOREG2vcc_io2Z2ZEKREG3vdd_logREG4vcc_20EMKMREG5 vccio_sd2Z2ZEKREG6 vdd10_lcdB@B@REG7vcca_18w@w@REG8vcca_332Z2ZEaKaREG9vcc_lan2Z2ZEBKBREG10vdd_10B@B@REG11vcc_18w@w@EKREG12 vcc18_lcdw@w@i2c@ff660000rockchip,rk3288-i2cf =i2c2NfdefaulttNokaypwm@ff680000rockchip,rk3288-pwmhfdefaulttO2^pwm disabledpwm@ff680010rockchip,rk3288-pwmhfdefaulttP2^pwmokaypwm@ff680020rockchip,rk3288-pwmh fdefaulttQ2^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0fdefaulttR2^pwm disabledbus_intmem@ff700000 mmio-sramp Spsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEKpower-controller!rockchip,rk3288-power-controllerh EfKfpd_vio@9 2chgfdehilkj$STUVWXYZ[pd_hevc@11 2op\]pd_video@12 2^pd_gpu@13 2_`reboot-modesyscon-reboot-modeRBRB!RB 1RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv<=Hjk$J#gׄeрxhрxhEKsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwE<K<edp-phyrockchip,rk3288-dp-phy2h24m_ disabledEqKqio-domains"rockchip,rk3288-io-voltage-domainokayjawbBusbphyrockchip,rk3288-usb-phyokayusb-phy@320_ 2]phyclkEGKGusb-phy@334_42^phyclkEDKDusb-phy@348_H2_phyclkEEKEwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk2Tctx 6fdefaulttd< disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5cctxrxi2s_hclki2s_clk2Rfdefaultte disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}aclkhclksclkapb_pclk crypto-rstokayvop@ff930000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vop2f def axiahbdclk@gokayportE K endpoint@0GhEuKuendpoint@1GiErKrendpoint@2GjEoKoiommu@ff930300rockchip,iommu  vopb_mmu2f WokayEgKgvop@ff940000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vop2f  axiahbdclk@kokayportE K endpoint@0GlEvKvendpoint@1GmEsKsendpoint@2GnEpKpiommu@ff940300rockchip,iommu  vopl_mmu2f WokayEkKkmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 2~d refpclk2f < disabledportsportendpoint@0GoEjKjendpoint@1GpEnKndp@ff970000rockchip,rk3288-dp@ b2icdppclkmqrdpodp< disabledportsport@0endpoint@0GrEiKiendpoint@1GsEmKmhdmi@ff980000rockchip,rk3288-dw-hdmi< g2hm iahbisfr2f okaydtportsportendpoint@0GuEhKhendpoint@1GvElKlgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu2pw2f okayxgpu-opp-tableoperating-points-v2EwKwopp@100000000~opp@200000000 ~opp@300000000B@opp@400000000ׄopp@500000000eOopp@600000000#Fqos@ffaa0000syscon E_K_qos@ffaa0080syscon E`K`qos@ffad0000syscon ETKTqos@ffad0100syscon EUKUqos@ffad0180syscon EVKVqos@ffad0400syscon EWKWqos@ffad0480syscon EXKXqos@ffad0500syscon ESKSqos@ffad0800syscon EYKYqos@ffad0880syscon EZKZqos@ffad0900syscon E[K[qos@ffae0000syscon E^K^qos@ffaf0000syscon E\K\qos@ffaf0080syscon E]K]interrupt-controller@ffc01000 arm,gic-400  @ `   EKefuse@ffb40000rockchip,rk3288-efuse 2q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl<Sgpio0@ff750000rockchip,gpio-banku Q2@EKgpio1@ff780000rockchip,gpio-bankx R2Agpio2@ff790000rockchip,gpio-banky S2Bgpio3@ff7a0000rockchip,gpio-bankz T2Cgpio4@ff7b0000rockchip,gpio-bank{ U2DECKCgpio5@ff7c0000rockchip,gpio-bank| V2Egpio6@ff7d0000rockchip,gpio-bank} W2Fgpio7@ff7e0000rockchip,gpio-bank~ X2GEIKIgpio8@ff7f0000rockchip,gpio-bank Y2HEKhdmihdmi-ddc yypcfg-pull-upEzKzpcfg-pull-downE{K{pcfg-pull-noneEyKypcfg-pull-none-12ma E|K|sleepglobal-pwroffyddrio-pwroffyddr0-retentionzddr1-retentionzedpedp-hpd {i2c0i2c0-xfer yyEHKHi2c1i2c1-xfer yyE+K+i2c2i2c2-xfer  y yENKNi2c3i2c3-xfer yyE,K,i2c4i2c4-xfer yyE-K-i2c5i2c5-xfer yyE.K.i2s0i2s0-bus`yyyyyyEeKesdmmcsdmmc-clk|E K sdmmc-cmd}E K sdmmc-cdzEKsdmmc-bus1zsdmmc-bus4@}}}}EKsdmmc-pwr yEKsdio0sdio0-bus1zsdio0-bus4@zzzzEKsdio0-cmdzEKsdio0-clkyEKsdio0-cdzsdio0-wpzsdio0-pwrzsdio0-bkpwrzsdio0-intzsdio1sdio1-bus1zsdio1-bus4@zzzzsdio1-cdzsdio1-wpzsdio1-bkpwrzsdio1-intzsdio1-cmdzsdio1-clkysdio1-pwr zemmcemmc-clkyEKemmc-cmdzEKemmc-pwr zEKemmc-bus1zemmc-bus4@zzzzemmc-bus8zzzzzzzzEKspi0spi0-clk zEKspi0-cs0 zEKspi0-txzE K spi0-rxzE!K!spi0-cs1zE"K"spi1spi1-clk zE#K#spi1-cs0 zE&K&spi1-rxzE%K%spi1-txzE$K$spi2spi2-cs1zspi2-clkzE'K'spi2-cs0zE*K*spi2-rxzE)K)spi2-tx zE(K(uart0uart0-xfer zyE/K/uart0-ctszE0K0uart0-rtsyE1K1uart1uart1-xfer z yE2K2uart1-cts zuart1-rts yuart2uart2-xfer zyE3K3uart3uart3-xfer zyE4K4uart3-cts zuart3-rts yuart4uart4-xfer  z yE5K5uart4-ctszuart4-rtsytsadcotp-gpio yE:K:otp-out yE;K;pwm0pwm0-pinyEOKOpwm1pwm1-pinyEPKPpwm2pwm2-pinyEQKQpwm3pwm3-pinyERKRgmacrgmii-pinsyyyy||||yyy ||yyE>K>rmii-pinsyyyyyyyyyyphy-int zEAKAphy-pmebzE@K@phy-rst~E?K?spdifspdif-tx yEdKdpcfg-output-high-E~K~pcfg-output-low9EKpcfg-pull-up-drv-12ma E}K}act8846pwr-hold~ELKLpmic-vselEKKKdvpdvp-pwr yEKhym8563rtc-intzEJKJkeyspwr-keyzEKledspower-ledyEKwork-ledyEKusb_hosthost-vbus-drvyEKusbhub-rst~EFKFusb_otgotg-vbus-drv yEKirir-intzEKmemory@0memoryadc-keys adc-keysDPbuttonsaw@button-recovery {Recoveryhdovdd-1v8-regulatorregulator-fixed dovdd_1v8w@w@gEbKbexternal-gmac-clock fixed-clocksY@ ext_gmacE=K=ir-receivergpio-ir-receiverfdefaultt Igpio-keys gpio-keyspower  {GPIO Powertfdefaulttleds gpio-ledswork {firefly:blue:user rc-feedbackfdefaulttpower {firefly:green:power default-onfdefaulttvsys-regulatorregulator-fixedvcc_sysLK@LK@$EKsdmmc-regulatorregulator-fixed VI fdefaulttvcc_sd2Z2ZgEKflash-regulatorregulator-fixed vcc_flashw@w@gEKusb-regulatorregulator-fixedvcc_5vLK@LK@$gEKusb-host-regulatorregulator-fixed Vfdefaultt vcc_host_5vLK@LK@gusb-otg-regulatorregulator-fixed V fdefaultt vcc_otg_5vLK@LK@gvcc28-dvp-regulatorregulator-fixed V fdefaultt vcc28_dvp**gEK #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-busoperating-points-v2mali-supplyopp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltgpioswakeup-sourcelinux,default-triggerstartup-delay-usenable-active-high