8h(0'rockchip,rk3288-fennecrockchip,rk3288&7Rockchip RK3288 Fennec Boardaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0 $@29EKcpu@501cpuarm,cortex-a12EKcpu@502cpuarm,cortex-a12EKcpu@503cpuarm,cortex-a12EKamba simple-busSdma-controller@ff250000arm,pl330arm,primecell%@Ze2 apb_pclkEKdma-controller@ff600000arm,pl330arm,primecell`@Ze2 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@Ze2 apb_pclkEQKQreserved-memorySdma-unusable@fe000000oscillator fixed-clockn6xin24mE K timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvbiuciuciu-driveciu-sample  @reset disableddwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswbiuciuciu-driveciu-sample ! @reset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxbiuciuciu-driveciu-sample "@reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guybiuciuciu-driveciu-sample #@resetokay.9GQdefault_ saradc@ff100000rockchip,saradc $i2I[saradcapb_pclkW saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARspiclkapb_pclk{  txrx ,Qdefault_ disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSspiclkapb_pclk{ txrx -Qdefault_ disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTspiclkapb_pclk{txrx .Qdefault_ disabledi2c@ff140000rockchip,rk3288-i2c >i2c2MQdefault_ disabledi2c@ff150000rockchip,rk3288-i2c ?i2c2OQdefault_ disabledi2c@ff160000rockchip,rk3288-i2c @i2c2PQdefault_ disabledi2c@ff170000rockchip,rk3288-i2c Ai2c2QQdefault_  disabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 72MUbaudclkapb_pclkQdefault_! disabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 82NVbaudclkapb_pclkQdefault_" disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 92OWbaudclkapb_pclkQdefault_#okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :2PXbaudclkapb_pclkQdefault_$ disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;2QYbaudclkapb_pclkQdefault_% disabledthermal-zonesreserve_thermal&cpu_thermald&tripscpu_alert0ppassiveE'K'cpu_alert1$passiveE(K(cpu_crit_ criticalcooling-mapsmap0' map1( gpu_thermald&tripsgpu_alert0ppassiveE)K)gpu_crit_ criticalcooling-mapsmap0) tsadc@ff280000rockchip,rk3288-tsadc( %2HZtsadcapb_pclk tsadc-apbQinitdefaultsleep_*+ **s disabledE&K&ethernet@ff290000rockchip,rk3288-gmac)Amacirqeth_wake_irqQ,82fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmacethokay^n-inputQdefault_./012rgmii 'B@ 30usb@ff500000 generic-ehciP 2usbhost4usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2otghost5 usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2otgotg +@@ 6 usb2-phyokayusb@ff5c0000 generic-ehci\ 2usbhostokayi2c@ff650000rockchip,rk3288-i2ce <i2c2LQdefault_7okaypmic@1brockchip,rk808&8xin32krk808-clkout2Qdefault_9::[i;u;;;;;<<<<<<regulatorsDCDC_REG1# q;pSvdd_armEKregulator-state-membDCDC_REG2# P;Svdd_gpuregulator-state-mem{B@DCDC_REG3Svcc_ddrregulator-state-mem{DCDC_REG4#2Z;2ZSvcc_ioE<K<regulator-state-mem{2ZLDO_REG1#2Z;2Z Svccio_pmuregulator-state-mem{2ZLDO_REG2#2Z;2ZSvcca_33regulator-state-membLDO_REG3#B@;B@Svdd_10regulator-state-mem{B@LDO_REG4#w@;w@Svcc_wlregulator-state-mem{w@LDO_REG5#w@;2Z Svccio_sdregulator-state-mem{2ZLDO_REG6#B@;B@ Svdd10_lcdregulator-state-mem{B@LDO_REG7#w@;w@Svcc_18regulator-state-mem{w@LDO_REG8#w@;w@ Svcc18_lcdregulator-state-mem{w@SWITCH_REG1Svcc_sdregulator-state-mem{SWITCH_REG2Svcc_lanE2K2regulator-state-mem{i2c@ff660000rockchip,rk3288-i2cf =i2c2NQdefault_= disabledpwm@ff680000rockchip,rk3288-pwmhQdefault_>2^pwm disabledpwm@ff680010rockchip,rk3288-pwmhQdefault_?2^pwm disabledpwm@ff680020rockchip,rk3288-pwmh Qdefault_@2^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0Qdefault_A2^pwm disabledbus_intmem@ff700000 mmio-sramp Spsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEKpower-controller!rockchip,rk3288-power-controller^hn ETKTpd_vio@9 2chgfdehilkj$BCDEFGHIJpd_hevc@11 2opKLpd_video@12 2Mpd_gpu@13 2NOreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruvQ,H^jk$#gׄeрxhрxhEKsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwE,K,edp-phyrockchip,rk3288-dp-phy2h24m4 disabledE_K_io-domains"rockchip,rk3288-io-voltage-domain disabledusbphyrockchip,rk3288-usb-phyokayQdefault_P ?8usb-phy@3204 2]phyclkE6K6usb-phy@334442^phyclkE4K4usb-phy@3484H2_phyclkE5K5watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p O disabledsound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifN hclkmclk2T{Qtx 6Qdefault_RQ, disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5{QQtxrxi2s_hclki2s_clk2RQdefault_S_z disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}aclkhclksclkapb_pclk crypto-rstokayvop@ff930000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopT def axiahbdclkUokayportE K endpoint@0VEbKbendpoint@1WE`K`endpoint@2XE]K]iommu@ff930300rockchip,iommu  Avopb_mmuT okayEUKUvop@ff940000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopT  axiahbdclkYokayportE K endpoint@0ZEcKcendpoint@1[EaKaendpoint@2\E^K^iommu@ff940300rockchip,iommu  Avopl_mmuT okayEYKYmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 2~d refpclkT Q, disabledportsportendpoint@0]EXKXendpoint@1^E\K\dp@ff970000rockchip,rk3288-dp@ b2icdppclk_dpodpQ, disabledportsport@0endpoint@0`EWKWendpoint@1aE[K[hdmi@ff980000rockchip,rk3288-dw-hdmiQ, g2hm iahbisfrT okayportsportendpoint@0bEVKVendpoint@1cEZKZgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ Ajobmmugpu2dT  disabledgpu-opp-tableoperating-points-v2EdKdopp@100000000~opp@200000000 ~opp@300000000B@opp@400000000ׄopp@500000000eOopp@600000000#Fqos@ffaa0000syscon ENKNqos@ffaa0080syscon EOKOqos@ffad0000syscon ECKCqos@ffad0100syscon EDKDqos@ffad0180syscon EEKEqos@ffad0400syscon EFKFqos@ffad0480syscon EGKGqos@ffad0500syscon EBKBqos@ffad0800syscon EHKHqos@ffad0880syscon EIKIqos@ffad0900syscon EJKJqos@ffae0000syscon EMKMqos@ffaf0000syscon EKKKqos@ffaf0080syscon ELKLinterrupt-controller@ffc01000 arm,gic-400  @ `   EKefuse@ffb40000rockchip,rk3288-efuse 2q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrlQ,Sgpio0@ff750000rockchip,gpio-banku Q2@%E8K8gpio1@ff780000rockchip,gpio-bankx R2A%gpio2@ff790000rockchip,gpio-banky S2B%gpio3@ff7a0000rockchip,gpio-bankz T2C%gpio4@ff7b0000rockchip,gpio-bank{ U2D%E3K3gpio5@ff7c0000rockchip,gpio-bank| V2E%gpio6@ff7d0000rockchip,gpio-bank} W2F%gpio7@ff7e0000rockchip,gpio-bank~ X2G%gpio8@ff7f0000rockchip,gpio-bank Y2H%hdmihdmi-ddc 1eepcfg-pull-up?EfKfpcfg-pull-downLEgKgpcfg-pull-none[EeKepcfg-pull-none-12ma[h EhKhsleepglobal-pwroff1eE:K:ddrio-pwroff1eddr0-retention1fddr1-retention1fedpedp-hpd1 gi2c0i2c0-xfer 1eeE7K7i2c1i2c1-xfer 1eeEKi2c2i2c2-xfer 1 e eE=K=i2c3i2c3-xfer 1eeEKi2c4i2c4-xfer 1eeEKi2c5i2c5-xfer 1eeE K i2s0i2s0-bus`1eeeeeeESKSsdmmcsdmmc-clk1esdmmc-cmd1fsdmmc-cd1fsdmmc-bus11fsdmmc-bus4@1ffffsdio0sdio0-bus11fsdio0-bus4@1ffffsdio0-cmd1fsdio0-clk1esdio0-cd1fsdio0-wp1fsdio0-pwr1fsdio0-bkpwr1fsdio0-int1fsdio1sdio1-bus11fsdio1-bus4@1ffffsdio1-cd1fsdio1-wp1fsdio1-bkpwr1fsdio1-int1fsdio1-cmd1fsdio1-clk1esdio1-pwr1 femmcemmc-clk1eE K emmc-cmd1fE K emmc-pwr1 fEKemmc-bus11femmc-bus4@1ffffemmc-bus81ffffffffEKspi0spi0-clk1 fEKspi0-cs01 fEKspi0-tx1fEKspi0-rx1fEKspi0-cs11fspi1spi1-clk1 fEKspi1-cs01 fEKspi1-rx1fEKspi1-tx1fEKspi2spi2-cs11fspi2-clk1fEKspi2-cs01fEKspi2-rx1fEKspi2-tx1 fEKuart0uart0-xfer 1feE!K!uart0-cts1fuart0-rts1euart1uart1-xfer 1f eE"K"uart1-cts1 fuart1-rts1 euart2uart2-xfer 1feE#K#uart3uart3-xfer 1feE$K$uart3-cts1 fuart3-rts1 euart4uart4-xfer 1 f eE%K%uart4-cts1fuart4-rts1etsadcotp-gpio1 eE*K*otp-out1 eE+K+pwm0pwm0-pin1eE>K>pwm1pwm1-pin1eE?K?pwm2pwm2-pin1eE@K@pwm3pwm3-pin1eEAKAgmacrgmii-pins1eeeehhhheee hheeE.K.rmii-pins1eeeeeeeeeephy-int1 fE1K1phy-pmeb1fE0K0phy-rst1iE/K/spdifspdif-tx1 eERKRpcfg-output-highwEiKipcfg-output-lowpcfg-pull-none-drv-8mahpcfg-pull-up-drv-8ma?hpmicpmic-int1fE9K9usbphyhost-drv1eEPKPmemory@0memoryexternal-gmac-clock fixed-clocksY@ ext_gmacE-K-vsys-regulatorregulator-fixedSvcc_sys#LK@;LK@E;K; #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeeddisable-wpnon-removablenum-slotspinctrl-namespinctrl-0#io-channel-cellsdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-tempinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsvbus_drv-gpios#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsoperating-points-v2opp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-low