8(Dcompulab,omap3-sbc-t3517compulab,omap3-cm-t3517ti,am3517ti,omap3 +!7CompuLab SBC-T3517 with CM-T3517chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/serial@4809e000l/ocp@68000000/can@5c050000 p/connector y/connectorcpus+cpu@0arm,cortex-a8cpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2iva disableddsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+ )FdefaultTpinmux_uart3_pins^nprxpinmux_mmc1_pins0^rxpinmux_green_led_pins^rxpinmux_dss_dpi_pins_common^rxpinmux_dss_dpi_pins_cm_t35x0^rxpinmux_ads7846_pins^rxpinmux_mcspi1_pins ^rxpinmux_i2c1_pins^rxpinmux_mcbsp2_pins ^ rxpinmux_hsusb1_phy_reset_pins^Hrxpinmux_hsusb2_phy_reset_pins^Jrxpinmux_otg_drv_vbus^rxpinmux_mmc2_pins0^(*,.02rxpinmux_wl12xx_core_pins^Frxpinmux_usb_hub_pins^Trxpinmux_smsc2_pins^rxpinmux_tfp410_pins^rxpinmux_i2c3_pins^rxpinmux_sb_t35_audio_amp^rxpinmux_mmc1_aux_pins^Drxpinmux_sb_t35_usb_hub_pins^rxscm_conf@270sysconsimple-busp0+ p0rxpbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-rxclocks+mcbsp5_mux_fck@68ti,composite-mux-clockhr x mcbsp5_fckti,composite-clock rxmcbsp1_mux_fck@4ti,composite-mux-clockr x mcbsp1_fckti,composite-clock rxmcbsp2_mux_fck@4ti,composite-mux-clock rxmcbsp2_fckti,composite-clock rxmcbsp3_mux_fck@68ti,composite-mux-clock hrxmcbsp3_fckti,composite-clockrxmcbsp4_mux_fck@68ti,composite-mux-clock hrxmcbsp4_fckti,composite-clockrxemac_ick@32cti,am35xx-gate-clock,rzxzemac_fck@32cti,gate-clock, vpfe_ick@32cti,am35xx-gate-clock,r{x{vpfe_fck@32cti,gate-clock, hsotgusb_ick_am35xx@32cti,am35xx-gate-clock,r|x|hsotgusb_fck_am35xx@32cti,gate-clock,r}x}hecc_ck@32cti,am35xx-gate-clock,r~x~clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+ )pinmux_wl12xx_wkup_pins^rxaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYrxosc_sys_ck@d40 ti,mux-clock @rxsys_ck@1270ti,divider-clockp rxsys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock!,dpll3_m2x2_ckfixed-factor-clock !,r"x"dpll4_x2_ckfixed-factor-clock!!,corex2_fckfixed-factor-clock"!,r#x#wkup_l4_ickfixed-factor-clock!,rRxRcorex2_d3_fckfixed-factor-clock#!,rsxscorex2_d5_fckfixed-factor-clock#!,rtxtclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockrDxDvirt_12m_ck fixed-clockrxvirt_13m_ck fixed-clock]@rxvirt_19200000_ck fixed-clock$rxvirt_26000000_ck fixed-clockrxvirt_38_4m_ck fixed-clockIrxdpll4_ck@d00ti,omap3-dpll-per-clock D 0r!x!dpll4_m2_ck@d48ti,divider-clock!? H r$x$dpll4_m2x2_mul_ckfixed-factor-clock$!,r%x%dpll4_m2x2_ck@d00ti,gate-clock% 6r&x&omap_96m_alwon_fckfixed-factor-clock&!,r-x-dpll3_ck@d00ti,omap3-dpll-core-clock @ 0rxdpll3_m3_ck@1140ti,divider-clock@ r'x'dpll3_m3x2_mul_ckfixed-factor-clock'!,r(x(dpll3_m3x2_ck@d00ti,gate-clock(  6r)x)emu_core_alwon_ckfixed-factor-clock)!,rfxfsys_altclk fixed-clockr2x2mcbsp_clks fixed-clockrxdpll3_m2_ck@d40ti,divider-clock @ r x core_ckfixed-factor-clock !,r*x*dpll1_fck@940ti,divider-clock* @ r+x+dpll1_ck@904ti,omap3-dpll-clock+  $ @ 4rxdpll1_x2_ckfixed-factor-clock!,r,x,dpll1_x2m2_ck@944ti,divider-clock, D r@x@cm_96m_fckfixed-factor-clock-!,r.x.omap_96m_fck@d40 ti,mux-clock. @rIxIdpll4_m3_ck@e40ti,divider-clock! @ r/x/dpll4_m3x2_mul_ckfixed-factor-clock/!,r0x0dpll4_m3x2_ck@d00ti,gate-clock0 6r1x1omap_54m_fck@d40 ti,mux-clock12 @r<x<cm_96m_d2_fckfixed-factor-clock.!,r3x3omap_48m_fck@d40 ti,mux-clock32 @r4x4omap_12m_fckfixed-factor-clock4!,rKxKdpll4_m4_ck@e40ti,divider-clock! @ r5x5dpll4_m4x2_mul_ckti,fixed-factor-clock5LZgr6x6dpll4_m4x2_ck@d00ti,gate-clock6 6grxxxdpll4_m5_ck@f40ti,divider-clock!?@ r7x7dpll4_m5x2_mul_ckti,fixed-factor-clock7LZgr8x8dpll4_m5x2_ck@d00ti,gate-clock8 6gdpll4_m6_ck@1140ti,divider-clock!?@ r9x9dpll4_m6x2_mul_ckfixed-factor-clock9!,r:x:dpll4_m6x2_ck@d00ti,gate-clock: 6r;x;emu_per_alwon_ckfixed-factor-clock;!,rgxgclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock* pr=x=clkout2_src_mux_ck@d70ti,composite-mux-clock*.< pr>x>clkout2_src_ckti,composite-clock=>r?x?sys_clkout2@d70ti,divider-clock?@ pzmpu_ckfixed-factor-clock@!,rAxAarm_fck@924ti,divider-clockA $emu_mpu_alwon_ckfixed-factor-clockA!,rhxhl3_ick@a40ti,divider-clock* @ rBxBl4_ick@a40ti,divider-clockB @ rCxCrm_ick@c40ti,divider-clockC @ gpt10_gate_fck@a00ti,composite-gate-clock  rExEgpt10_mux_fck@a40ti,composite-mux-clockD @rFxFgpt10_fckti,composite-clockEFgpt11_gate_fck@a00ti,composite-gate-clock  rGxGgpt11_mux_fck@a40ti,composite-mux-clockD @rHxHgpt11_fckti,composite-clockGHcore_96m_fckfixed-factor-clockI!,rxmmchs2_fck@a00ti,wait-gate-clock rxmmchs1_fck@a00ti,wait-gate-clock rxi2c3_fck@a00ti,wait-gate-clock rxi2c2_fck@a00ti,wait-gate-clock rxi2c1_fck@a00ti,wait-gate-clock rxmcbsp5_gate_fck@a00ti,composite-gate-clock  rxmcbsp1_gate_fck@a00ti,composite-gate-clock  r x core_48m_fckfixed-factor-clock4!,rJxJmcspi4_fck@a00ti,wait-gate-clockJ rxmcspi3_fck@a00ti,wait-gate-clockJ rxmcspi2_fck@a00ti,wait-gate-clockJ rxmcspi1_fck@a00ti,wait-gate-clockJ rxuart2_fck@a00ti,wait-gate-clockJ rxuart1_fck@a00ti,wait-gate-clockJ  rxcore_12m_fckfixed-factor-clockK!,rLxLhdq_fck@a00ti,wait-gate-clockL rxcore_l3_ickfixed-factor-clockB!,rMxMsdrc_ick@a10ti,wait-gate-clockM ryxygpmc_fckfixed-factor-clockM!,core_l4_ickfixed-factor-clockC!,rNxNmmchs2_ick@a10ti,omap3-interface-clockN rxmmchs1_ick@a10ti,omap3-interface-clockN rxhdq_ick@a10ti,omap3-interface-clockN rxmcspi4_ick@a10ti,omap3-interface-clockN rxmcspi3_ick@a10ti,omap3-interface-clockN rxmcspi2_ick@a10ti,omap3-interface-clockN rxmcspi1_ick@a10ti,omap3-interface-clockN rxi2c3_ick@a10ti,omap3-interface-clockN rxi2c2_ick@a10ti,omap3-interface-clockN rxi2c1_ick@a10ti,omap3-interface-clockN rxuart2_ick@a10ti,omap3-interface-clockN rxuart1_ick@a10ti,omap3-interface-clockN  rxgpt11_ick@a10ti,omap3-interface-clockN  rxgpt10_ick@a10ti,omap3-interface-clockN  rxmcbsp5_ick@a10ti,omap3-interface-clockN  rxmcbsp1_ick@a10ti,omap3-interface-clockN  rxomapctrl_ick@a10ti,omap3-interface-clockN rxdss_tv_fck@e00ti,gate-clock<rxdss_96m_fck@e00ti,gate-clockIrxdss2_alwon_fck@e00ti,gate-clockrxdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock rOxOgpt1_mux_fck@c40ti,composite-mux-clockD @rPxPgpt1_fckti,composite-clockOPaes2_ick@a10ti,omap3-interface-clockN rxwkup_32k_fckfixed-factor-clockD!,rQxQgpio1_dbck@c00ti,gate-clockQ rxsha12_ick@a10ti,omap3-interface-clockN rxwdt2_fck@c00ti,wait-gate-clockQ rxwdt2_ick@c10ti,omap3-interface-clockR rxwdt1_ick@c10ti,omap3-interface-clockR rxgpio1_ick@c10ti,omap3-interface-clockR rxomap_32ksync_ick@c10ti,omap3-interface-clockR rxgpt12_ick@c10ti,omap3-interface-clockR rxgpt1_ick@c10ti,omap3-interface-clockR rxper_96m_fckfixed-factor-clock-!,r x per_48m_fckfixed-factor-clock4!,rSxSuart3_fck@1000ti,wait-gate-clockS rxgpt2_gate_fck@1000ti,composite-gate-clockrTxTgpt2_mux_fck@1040ti,composite-mux-clockD@rUxUgpt2_fckti,composite-clockTUgpt3_gate_fck@1000ti,composite-gate-clockrVxVgpt3_mux_fck@1040ti,composite-mux-clockD@rWxWgpt3_fckti,composite-clockVWgpt4_gate_fck@1000ti,composite-gate-clockrXxXgpt4_mux_fck@1040ti,composite-mux-clockD@rYxYgpt4_fckti,composite-clockXYgpt5_gate_fck@1000ti,composite-gate-clockrZxZgpt5_mux_fck@1040ti,composite-mux-clockD@r[x[gpt5_fckti,composite-clockZ[gpt6_gate_fck@1000ti,composite-gate-clockr\x\gpt6_mux_fck@1040ti,composite-mux-clockD@r]x]gpt6_fckti,composite-clock\]gpt7_gate_fck@1000ti,composite-gate-clockr^x^gpt7_mux_fck@1040ti,composite-mux-clockD@r_x_gpt7_fckti,composite-clock^_gpt8_gate_fck@1000ti,composite-gate-clock r`x`gpt8_mux_fck@1040ti,composite-mux-clockD@raxagpt8_fckti,composite-clock`agpt9_gate_fck@1000ti,composite-gate-clock rbxbgpt9_mux_fck@1040ti,composite-mux-clockD@rcxcgpt9_fckti,composite-clockbcper_32k_alwon_fckfixed-factor-clockD!,rdxdgpio6_dbck@1000ti,gate-clockdrxgpio5_dbck@1000ti,gate-clockdrxgpio4_dbck@1000ti,gate-clockdrxgpio3_dbck@1000ti,gate-clockdrxgpio2_dbck@1000ti,gate-clockd rxwdt3_fck@1000ti,wait-gate-clockd rxper_l4_ickfixed-factor-clockC!,rexegpio6_ick@1010ti,omap3-interface-clockerxgpio5_ick@1010ti,omap3-interface-clockerxgpio4_ick@1010ti,omap3-interface-clockerxgpio3_ick@1010ti,omap3-interface-clockerxgpio2_ick@1010ti,omap3-interface-clocke rxwdt3_ick@1010ti,omap3-interface-clocke rxuart3_ick@1010ti,omap3-interface-clocke rxuart4_ick@1010ti,omap3-interface-clockerxgpt9_ick@1010ti,omap3-interface-clocke rxgpt8_ick@1010ti,omap3-interface-clocke rxgpt7_ick@1010ti,omap3-interface-clockerxgpt6_ick@1010ti,omap3-interface-clockerxgpt5_ick@1010ti,omap3-interface-clockerxgpt4_ick@1010ti,omap3-interface-clockerxgpt3_ick@1010ti,omap3-interface-clockerxgpt2_ick@1010ti,omap3-interface-clockerxmcbsp2_ick@1010ti,omap3-interface-clockerxmcbsp3_ick@1010ti,omap3-interface-clockerxmcbsp4_ick@1010ti,omap3-interface-clockerxmcbsp2_gate_fck@1000ti,composite-gate-clockr x mcbsp3_gate_fck@1000ti,composite-gate-clockrxmcbsp4_gate_fck@1000ti,composite-gate-clockrxemu_src_mux_ck@1140 ti,mux-clockfgh@rixiemu_src_ckti,clkdm-gate-clockirjxjpclk_fck@1140ti,divider-clockj@ pclkx2_fck@1140ti,divider-clockj@ atclk_fck@1140ti,divider-clockj@ traceclk_src_fck@1140 ti,mux-clockfgh@rkxktraceclk_fck@1140ti,divider-clockk @ secure_32k_fck fixed-clockrlxlgpt12_fckfixed-factor-clockl!,wdt1_fckfixed-factor-clockl!,ipss_ick@a10ti,am35xx-interface-clockM rxrmii_ck fixed-clockrxpclk_ck fixed-clockrxuart4_ick_am35xx@a10ti,omap3-interface-clockN uart4_fck_am35xx@a00ti,wait-gate-clockJ dpll5_ck@d04ti,omap3-dpll-clock  $ L 4rmxmdpll5_m2_ck@d50ti,divider-clockm P rwxwsgx_gate_fck@b00ti,composite-gate-clock* ruxucore_d3_ckfixed-factor-clock*!,rnxncore_d4_ckfixed-factor-clock*!,roxocore_d6_ckfixed-factor-clock*!,rpxpomap_192m_alwon_fckfixed-factor-clock&!,rqxqcore_d2_ckfixed-factor-clock*!,rrxrsgx_mux_fck@b40ti,composite-mux-clock nop.qrst @rvxvsgx_fckti,composite-clockuvsgx_ick@b10ti,wait-gate-clockB rxcpefuse_fck@a08ti,gate-clock rxts_fck@a08ti,gate-clockD rxusbtll_fck@a08ti,wait-gate-clockw rxusbtll_ick@a18ti,omap3-interface-clockN rxmmchs3_ick@a10ti,omap3-interface-clockN rxmmchs3_fck@a00ti,wait-gate-clock rxdss1_alwon_fck_3430es2@e00ti,dss-gate-clockxgrxdss_ick_3430es2@e10ti,omap3-dss-interface-clockCrxusbhost_120m_fck@1400ti,gate-clockwrxusbhost_48m_fck@1400ti,dss-gate-clock4rxusbhost_ick@1410ti,omap3-dss-interface-clockCrxclockdomainscore_l3_clkdmti,clockdomainyz{|}~dpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainhemu_clkdmti,clockdomainjdpll4_clkdmti,clockdomain!wkup_clkdmti,clockdomain dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaindpll5_clkdmti,clockdomainmsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain counter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH rxdma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH`  `rxgpio@48310000ti,omap3-gpioH1gpio1rxgpio@49050000ti,omap3-gpioIgpio2rxgpio@49052000ti,omap3-gpioI gpio3rxgpio@49054000ti,omap3-gpioI@ gpio4gpio@49056000ti,omap3-gpioI`!gpio5rxgpio@49058000ti,omap3-gpioI"gpio6rxserial@4806a000ti,omap3-uartH H12txrxuart1lserial@4806c000ti,omap3-uartHI34txrxuart2lserial@49020000ti,omap3-uartIJ56txrxuart3lFdefaultTi2c@48070000 ti,omap3-i2cH8txrx+i2c1FdefaultTat24@50 atmel,24c02Pi2c@48072000 ti,omap3-i2cH 9txrx+i2c2i2c@48060000 ti,omap3-i2cH=txrx+i2c3FdefaultTat24@50 atmel,24c02Pmailbox@48094000ti,omap3-mailboxmailboxH @&8 disableddsp J Uspi@48098000ti,omap2-mcspiH A+mcspi1`@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3FdefaultTads7846@0FdefaultT ti,ads7846ny`    spi@4809a000ti,omap2-mcspiH B+mcspi2` +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3` tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4`FGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1=>txrx'FdefaultT4> J Smmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrxFdefaultT>\l4z+wlcore@2 ti,wl1271 Immc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx disabledmmu@480bd400ti,omap2-iommuH mmu_isp disabledmmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1 txrxfck disabledmcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxfckickokFdefaultTmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4txrxfck disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1Erxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_coreH smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivaH  disabledtimer@48318000ti,omap3430-timerH1%timer1timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11timer@48304000ti,omap3430-timerH0@_timer12usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+  ehci-phy +ehci-phyohci@48064400ti,ohci-omap3HD Lehci@48064800 ti,ehci-omapHH M6gpmc@6e000000ti,omap3430-gpmcgpmcnrxtx;G+ -rxnand@0,0ti,omap2-nand  YhzswxxxxZZ+EHT<nxxZ+partition@0xloaderpartition@0x80000ubootpartition@0x260000uboot environment&partition@0x2a0000linux*@partition@0x6a0000rootfsjethernet@4,0smsc,lan9221smsc,lan9115FdefaultT  h(--nEx+KTK.EUcpusb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs dss@48050000 ti,omap3-dssHok dss_corefck+FdefaultTdispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH ok dss_vencfckportendpointportendpointrxssi-controller@48058000 ti,omap3-ssissi disabledHHsysgddGgdd_mpu+ssi-port@4805a000ti,omap3-ssi-portHHtxrx CDssi-port@4805b000ti,omap3-ssi-portHHtxrx EFam35x_otg_hs@5c040000ti,omap3-musb am35x_otg_hsokay\GmcFdefaultTethernet@0x5c000000ti,am3517-emac davinci_emacokay\CDEF 7Jethernet@0x5c030000ti,davinci_mdio davinci_mdiookay\\B@+serial@4809e000ti,omap3-uartuart4 disabledH T76txrxlpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+ )can@5c050000ti,am3517-hecc disabled\\0\ hecchecc-rammbx~memory@80000000memoryleds gpio-ledsFdefaultTledb cm-t3x:green M eheartbeathsusb1_power_regregulator-fixed hsusb1_vbus2Z2Z{prxhsusb2_power_regregulator-fixed hsusb2_vbus2Z2Z{prxhsusb1_phyusb-nop-xceivnFdefaultT rxhsusb2_phyusb-nop-xceivnFdefaultT rxads7846-regregulator-fixed ads7846-reg2Z2Zrxconnectordvi-connectordviportendpointrxregulator-vmmcregulator-fixedvmmc2Z2Zrxwl12xx_vmmc2regulator-fixedvw1271FdefaultTw@w@ {N rxwl12xx_vaux2regulator-fixedvwl1271_vaux2w@w@rxencoder ti,tfp410 FdefaultTports+port@0endpointrxport@1endpointrxaudio_ampregulator-fixed audio_ampFdefaultT regulator-vddvario-sb-t35regulator-fixed vddvariorxregulator-vdd33a-sb-t35regulator-fixedvdd33arx compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3candisplay0display1device_typeregclocksclock-namesclock-latencyinterruptsti,hwmodsstatusranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinslinux,phandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lock#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpagesize#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repwakeup-sourceti,dual-voltpbias-supplybus-widthvmmc-supplywp-gpioscd-gpiosvmmc_aux-supplynon-removablecap-power-off-cardref-clock-frequency#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport1-modeport2-modephysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,page-burst-access-nsgpmc,access-nsgpmc,cycle2cycle-delay-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,bus-turnaround-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsremote-endpointti,channelsdata-linesti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freqlinux,default-triggerstartup-delay-usreset-gpiosenable-active-highpowerdown-gpiosregulator-always-on