8Έ(P(ti,am3517-craneboardti,am3517ti,omap3 +#7TI AM3517 CraneBoard (TMDSEVM3517)chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/serial@4809e000l/ocp@68000000/can@5c050000cpus+cpu@0arm,cortex-a8pcpu|cpupmu@54000000arm,cortex-a8-pmu|Tdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2iva disableddsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bus|h +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus| + pinmux@30 ti,omap3-padconfpinctrl-single|08+pinmux_tps_pins4HNscm_conf@270sysconsimple-bus|p0+ p0HNpbias_regulator@2b0ti,pbias-omap3ti,pbias-omap|Vpbias_mmc_omap2430]pbias_mmc_omap2430lw@-HNclocks+mcbsp5_mux_fck@68ti,composite-mux-clock|hHNmcbsp5_fckti,composite-clockHNmcbsp1_mux_fck@4ti,composite-mux-clock|H N mcbsp1_fckti,composite-clock HNmcbsp2_mux_fck@4ti,composite-mux-clock |H N mcbsp2_fckti,composite-clock HNmcbsp3_mux_fck@68ti,composite-mux-clock |hHNmcbsp3_fckti,composite-clock HNmcbsp4_mux_fck@68ti,composite-mux-clock |hHNmcbsp4_fckti,composite-clockHNemac_ick@32cti,am35xx-gate-clock|,HxNxemac_fck@32cti,gate-clock|, vpfe_ick@32cti,am35xx-gate-clock|,HyNyvpfe_fck@32cti,gate-clock|, hsotgusb_ick_am35xx@32cti,am35xx-gate-clock|,HzNzhsotgusb_fck_am35xx@32cti,gate-clock|,H{N{hecc_ck@32cti,am35xx-gate-clock|,H|N|clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single| \+aes@480c5000 ti,omap3-aesaes|H PPABtxrxprm@48306000 ti,omap3-prm|H0`@ clocks+virt_16_8m_ck fixed-clockYHNosc_sys_ck@d40 ti,mux-clock| @HNsys_ck@1270ti,divider-clock|pHNsys_clkout1@d70ti,gate-clock| pdpll3_x2_ckfixed-factor-clockdpll3_m2x2_ckfixed-factor-clockH N dpll4_x2_ckfixed-factor-clockcorex2_fckfixed-factor-clock H!N!wkup_l4_ickfixed-factor-clockHPNPcorex2_d3_fckfixed-factor-clock!HqNqcorex2_d5_fckfixed-factor-clock!HrNrclockdomainscm@48004000 ti,omap3-cm|H@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockHBNBvirt_12m_ck fixed-clockHNvirt_13m_ck fixed-clock]@HNvirt_19200000_ck fixed-clock$HNvirt_26000000_ck fixed-clockHNvirt_38_4m_ck fixed-clockIHNdpll4_ck@d00ti,omap3-dpll-per-clock| D 0HNdpll4_m2_ck@d48ti,divider-clock?| HH"N"dpll4_m2x2_mul_ckfixed-factor-clock"H#N#dpll4_m2x2_ck@d00ti,gate-clock#|  H$N$omap_96m_alwon_fckfixed-factor-clock$H+N+dpll3_ck@d00ti,omap3-dpll-core-clock| @ 0HNdpll3_m3_ck@1140ti,divider-clock|@H%N%dpll3_m3x2_mul_ckfixed-factor-clock%H&N&dpll3_m3x2_ck@d00ti,gate-clock& |  H'N'emu_core_alwon_ckfixed-factor-clock'HdNdsys_altclk fixed-clockH0N0mcbsp_clks fixed-clockHNdpll3_m2_ck@d40ti,divider-clock| @HNcore_ckfixed-factor-clockH(N(dpll1_fck@940ti,divider-clock(| @H)N)dpll1_ck@904ti,omap3-dpll-clock)|  $ @ 4HNdpll1_x2_ckfixed-factor-clockH*N*dpll1_x2m2_ck@944ti,divider-clock*| DH>N>cm_96m_fckfixed-factor-clock+H,N,omap_96m_fck@d40 ti,mux-clock,| @HGNGdpll4_m3_ck@e40ti,divider-clock |@H-N-dpll4_m3x2_mul_ckfixed-factor-clock-H.N.dpll4_m3x2_ck@d00ti,gate-clock.|  H/N/omap_54m_fck@d40 ti,mux-clock/0| @H:N:cm_96m_d2_fckfixed-factor-clock,H1N1omap_48m_fck@d40 ti,mux-clock10| @H2N2omap_12m_fckfixed-factor-clock2HINIdpll4_m4_ck@e40ti,divider-clock |@H3N3dpll4_m4x2_mul_ckti,fixed-factor-clock3"0=H4N4dpll4_m4x2_ck@d00ti,gate-clock4|  =HvNvdpll4_m5_ck@f40ti,divider-clock?|@H5N5dpll4_m5x2_mul_ckti,fixed-factor-clock5"0=H6N6dpll4_m5x2_ck@d00ti,gate-clock6|  =dpll4_m6_ck@1140ti,divider-clock?|@H7N7dpll4_m6x2_mul_ckfixed-factor-clock7H8N8dpll4_m6x2_ck@d00ti,gate-clock8|  H9N9emu_per_alwon_ckfixed-factor-clock9HeNeclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock(| pH;N;clkout2_src_mux_ck@d70ti,composite-mux-clock(,:| pH<N<clkout2_src_ckti,composite-clock;<H=N=sys_clkout2@d70ti,divider-clock=@| pPmpu_ckfixed-factor-clock>H?N?arm_fck@924ti,divider-clock?| $emu_mpu_alwon_ckfixed-factor-clock?HfNfl3_ick@a40ti,divider-clock(| @H@N@l4_ick@a40ti,divider-clock@| @HANArm_ick@c40ti,divider-clockA| @gpt10_gate_fck@a00ti,composite-gate-clock | HCNCgpt10_mux_fck@a40ti,composite-mux-clockB| @HDNDgpt10_fckti,composite-clockCDgpt11_gate_fck@a00ti,composite-gate-clock | HENEgpt11_mux_fck@a40ti,composite-mux-clockB| @HFNFgpt11_fckti,composite-clockEFcore_96m_fckfixed-factor-clockGHNmmchs2_fck@a00ti,wait-gate-clock| HNmmchs1_fck@a00ti,wait-gate-clock| HNi2c3_fck@a00ti,wait-gate-clock| HNi2c2_fck@a00ti,wait-gate-clock| HNi2c1_fck@a00ti,wait-gate-clock| HNmcbsp5_gate_fck@a00ti,composite-gate-clock | HNmcbsp1_gate_fck@a00ti,composite-gate-clock | HNcore_48m_fckfixed-factor-clock2HHNHmcspi4_fck@a00ti,wait-gate-clockH| HNmcspi3_fck@a00ti,wait-gate-clockH| HNmcspi2_fck@a00ti,wait-gate-clockH| HNmcspi1_fck@a00ti,wait-gate-clockH| HNuart2_fck@a00ti,wait-gate-clockH| HNuart1_fck@a00ti,wait-gate-clockH|  HNcore_12m_fckfixed-factor-clockIHJNJhdq_fck@a00ti,wait-gate-clockJ| HNcore_l3_ickfixed-factor-clock@HKNKsdrc_ick@a10ti,wait-gate-clockK| HwNwgpmc_fckfixed-factor-clockKcore_l4_ickfixed-factor-clockAHLNLmmchs2_ick@a10ti,omap3-interface-clockL| HNmmchs1_ick@a10ti,omap3-interface-clockL| HNhdq_ick@a10ti,omap3-interface-clockL| HNmcspi4_ick@a10ti,omap3-interface-clockL| HNmcspi3_ick@a10ti,omap3-interface-clockL| HNmcspi2_ick@a10ti,omap3-interface-clockL| HNmcspi1_ick@a10ti,omap3-interface-clockL| HNi2c3_ick@a10ti,omap3-interface-clockL| HNi2c2_ick@a10ti,omap3-interface-clockL| HNi2c1_ick@a10ti,omap3-interface-clockL| HNuart2_ick@a10ti,omap3-interface-clockL| HNuart1_ick@a10ti,omap3-interface-clockL|  HNgpt11_ick@a10ti,omap3-interface-clockL|  HNgpt10_ick@a10ti,omap3-interface-clockL|  HNmcbsp5_ick@a10ti,omap3-interface-clockL|  HNmcbsp1_ick@a10ti,omap3-interface-clockL|  HNomapctrl_ick@a10ti,omap3-interface-clockL| HNdss_tv_fck@e00ti,gate-clock:|HNdss_96m_fck@e00ti,gate-clockG|HNdss2_alwon_fck@e00ti,gate-clock|HNdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock| HMNMgpt1_mux_fck@c40ti,composite-mux-clockB| @HNNNgpt1_fckti,composite-clockMNaes2_ick@a10ti,omap3-interface-clockL| HNwkup_32k_fckfixed-factor-clockBHONOgpio1_dbck@c00ti,gate-clockO| HNsha12_ick@a10ti,omap3-interface-clockL| HNwdt2_fck@c00ti,wait-gate-clockO| HNwdt2_ick@c10ti,omap3-interface-clockP| HNwdt1_ick@c10ti,omap3-interface-clockP| HNgpio1_ick@c10ti,omap3-interface-clockP| HNomap_32ksync_ick@c10ti,omap3-interface-clockP| HNgpt12_ick@c10ti,omap3-interface-clockP| HNgpt1_ick@c10ti,omap3-interface-clockP| HNper_96m_fckfixed-factor-clock+H N per_48m_fckfixed-factor-clock2HQNQuart3_fck@1000ti,wait-gate-clockQ| H}N}gpt2_gate_fck@1000ti,composite-gate-clock|HRNRgpt2_mux_fck@1040ti,composite-mux-clockB|@HSNSgpt2_fckti,composite-clockRSgpt3_gate_fck@1000ti,composite-gate-clock|HTNTgpt3_mux_fck@1040ti,composite-mux-clockB|@HUNUgpt3_fckti,composite-clockTUgpt4_gate_fck@1000ti,composite-gate-clock|HVNVgpt4_mux_fck@1040ti,composite-mux-clockB|@HWNWgpt4_fckti,composite-clockVWgpt5_gate_fck@1000ti,composite-gate-clock|HXNXgpt5_mux_fck@1040ti,composite-mux-clockB|@HYNYgpt5_fckti,composite-clockXYgpt6_gate_fck@1000ti,composite-gate-clock|HZNZgpt6_mux_fck@1040ti,composite-mux-clockB|@H[N[gpt6_fckti,composite-clockZ[gpt7_gate_fck@1000ti,composite-gate-clock|H\N\gpt7_mux_fck@1040ti,composite-mux-clockB|@H]N]gpt7_fckti,composite-clock\]gpt8_gate_fck@1000ti,composite-gate-clock |H^N^gpt8_mux_fck@1040ti,composite-mux-clockB|@H_N_gpt8_fckti,composite-clock^_gpt9_gate_fck@1000ti,composite-gate-clock |H`N`gpt9_mux_fck@1040ti,composite-mux-clockB|@HaNagpt9_fckti,composite-clock`aper_32k_alwon_fckfixed-factor-clockBHbNbgpio6_dbck@1000ti,gate-clockb|H~N~gpio5_dbck@1000ti,gate-clockb|HNgpio4_dbck@1000ti,gate-clockb|HNgpio3_dbck@1000ti,gate-clockb|HNgpio2_dbck@1000ti,gate-clockb| HNwdt3_fck@1000ti,wait-gate-clockb| HNper_l4_ickfixed-factor-clockAHcNcgpio6_ick@1010ti,omap3-interface-clockc|HNgpio5_ick@1010ti,omap3-interface-clockc|HNgpio4_ick@1010ti,omap3-interface-clockc|HNgpio3_ick@1010ti,omap3-interface-clockc|HNgpio2_ick@1010ti,omap3-interface-clockc| HNwdt3_ick@1010ti,omap3-interface-clockc| HNuart3_ick@1010ti,omap3-interface-clockc| HNuart4_ick@1010ti,omap3-interface-clockc|HNgpt9_ick@1010ti,omap3-interface-clockc| HNgpt8_ick@1010ti,omap3-interface-clockc| HNgpt7_ick@1010ti,omap3-interface-clockc|HNgpt6_ick@1010ti,omap3-interface-clockc|HNgpt5_ick@1010ti,omap3-interface-clockc|HNgpt4_ick@1010ti,omap3-interface-clockc|HNgpt3_ick@1010ti,omap3-interface-clockc|HNgpt2_ick@1010ti,omap3-interface-clockc|HNmcbsp2_ick@1010ti,omap3-interface-clockc|HNmcbsp3_ick@1010ti,omap3-interface-clockc|HNmcbsp4_ick@1010ti,omap3-interface-clockc|HNmcbsp2_gate_fck@1000ti,composite-gate-clock|H N mcbsp3_gate_fck@1000ti,composite-gate-clock|H N mcbsp4_gate_fck@1000ti,composite-gate-clock|HNemu_src_mux_ck@1140 ti,mux-clockdef|@HgNgemu_src_ckti,clkdm-gate-clockgHhNhpclk_fck@1140ti,divider-clockh|@pclkx2_fck@1140ti,divider-clockh|@atclk_fck@1140ti,divider-clockh|@traceclk_src_fck@1140 ti,mux-clockdef|@HiNitraceclk_fck@1140ti,divider-clocki |@secure_32k_fck fixed-clockHjNjgpt12_fckfixed-factor-clockjwdt1_fckfixed-factor-clockjipss_ick@a10ti,am35xx-interface-clockK| HNrmii_ck fixed-clockHNpclk_ck fixed-clockHNuart4_ick_am35xx@a10ti,omap3-interface-clockL| uart4_fck_am35xx@a00ti,wait-gate-clockH| dpll5_ck@d04ti,omap3-dpll-clock|  $ L 4fxHkNkdpll5_m2_ck@d50ti,divider-clockk| PHuNusgx_gate_fck@b00ti,composite-gate-clock(| HsNscore_d3_ckfixed-factor-clock(HlNlcore_d4_ckfixed-factor-clock(HmNmcore_d6_ckfixed-factor-clock(HnNnomap_192m_alwon_fckfixed-factor-clock$HoNocore_d2_ckfixed-factor-clock(HpNpsgx_mux_fck@b40ti,composite-mux-clock lmn,opqr| @HtNtsgx_fckti,composite-clockstsgx_ick@b10ti,wait-gate-clock@| HNcpefuse_fck@a08ti,gate-clock| HNts_fck@a08ti,gate-clockB| HNusbtll_fck@a08ti,wait-gate-clocku| HNusbtll_ick@a18ti,omap3-interface-clockL| HNmmchs3_ick@a10ti,omap3-interface-clockL| HNmmchs3_fck@a00ti,wait-gate-clock| HNdss1_alwon_fck_3430es2@e00ti,dss-gate-clockv|=HNdss_ick_3430es2@e10ti,omap3-dss-interface-clockA|HNusbhost_120m_fck@1400ti,gate-clocku|HNusbhost_48m_fck@1400ti,dss-gate-clock2|HNusbhost_ick@1410ti,omap3-dss-interface-clockA|HNclockdomainscore_l3_clkdmti,clockdomainwxyz{|dpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainh}~emu_clkdmti,clockdomainhdpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaindpll5_clkdmti,clockdomainksgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain counter@48320000ti,omap-counter32k|H2  counter_32kinterrupt-controller@48200000ti,omap3-intc|H HNdma-controller@48056000"ti,omap3630-sdmati,omap3430-sdma|H`  `HNgpio@48310000ti,omap3-gpio|H1gpio1gpio@49050000ti,omap3-gpio|Igpio2gpio@49052000ti,omap3-gpio|I gpio3gpio@49054000ti,omap3-gpio|I@ gpio4gpio@49056000ti,omap3-gpio|I`!gpio5gpio@49058000ti,omap3-gpio|I"gpio6serial@4806a000ti,omap3-uart|H H12txrxuart1lserial@4806c000ti,omap3-uart|HI34txrxuart2lserial@49020000ti,omap3-uart|IJ56txrxuart3li2c@48070000 ti,omap3-i2c|H8txrx+i2c1'@tps@2d|- ti,tps65910default (4@LXdregulators+regulator@0|qvrtcregulator@1|qvioregulator@2|qvdd1 ]vdd_corelOOregulator@3|qvdd2]vdd_shvl2Z2ZHNregulator@4|qvdd3regulator@5|qvdig1regulator@6|qvdig2regulator@7|qvplllw@w@regulator@8|qvdaclw@w@regulator@9| qvaux1lw@w@regulator@10| qvaux2lw@w@regulator@11| qvaux33regulator@12| qvmmcl2Z2Zregulator@13| qvbbi2c@48072000 ti,omap3-i2c|H 9txrx+i2c2 disabledi2c@48060000 ti,omap3-i2c|H=txrx+i2c3 disabledmailbox@48094000ti,omap3-mailboxmailbox|H @ disableddsp  spi@48098000ti,omap2-mcspi|H A+mcspi1@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspi|H B+mcspi2 +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspi|H [+mcspi3 tx0rx0tx1rx1spi@480ba000ti,omap2-mcspi|H 0+mcspi4FGtx0rx01w@480b2000 ti,omap3-1w|H :hdq1wmmc@4809c000ti,omap3-hsmmc|H Smmc1=>txrx &mmc@480b4000ti,omap3-hsmmc|H @Vmmc2/0txrx disabledmmc@480ad000ti,omap3-hsmmc|H ^mmc3MNtxrx disabledmmu@480bd4000ti,omap2-iommu|H mmu_isp= disabledmmu@5d0000000ti,omap2-iommu|]mmu_iva disabledwdt@48314000 ti,omap3-wdt|H1@ wd_timer2mcbsp@48074000ti,omap3-mcbsp|H@Mmpu ;< Wcommontxrxgmcbsp1 txrxfck disabledmcbsp@49022000ti,omap3-mcbsp|I I Mmpusidetone>?Wcommontxrxsidetonegmcbsp2mcbsp2_sidetone!"txrxfckick disabledmcbsp@49024000ti,omap3-mcbsp|I@I MmpusidetoneYZWcommontxrxsidetonegmcbsp3mcbsp3_sidetonetxrxfckick disabledmcbsp@49026000ti,omap3-mcbsp|I`Mmpu 67 Wcommontxrxgmcbsp4txrxfck disabledmcbsp@48096000ti,omap3-mcbsp|H `Mmpu QR Wcommontxrxgmcbsp5txrxfck disabledsham@480c3000ti,omap3-shamsham|H 0d1Erxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_core|H smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_iva|H  disabledtimer@48318000ti,omap3430-timer|H1%timer1vtimer@49032000ti,omap3430-timer|I &timer2timer@49034000ti,omap3430-timer|I@'timer3timer@49036000ti,omap3430-timer|I`(timer4timer@49038000ti,omap3430-timer|I)timer5timer@4903a000ti,omap3430-timer|I*timer6timer@4903c000ti,omap3430-timer|I+timer7timer@4903e000ti,omap3430-timer|I,timer8timer@49040000ti,omap3430-timer|I-timer9timer@48086000ti,omap3430-timer|H`.timer10timer@48088000ti,omap3430-timer|H/timer11timer@48304000ti,omap3430-timer|H0@_timer12vusbhstll@48062000 ti,usbhs-tll|H N usb_tll_hsusbhshost@48064000ti,usbhs-host|H@ usb_host_hs+ohci@48064400ti,ohci-omap3|HD Lehci@48064800 ti,ehci-omap|HH Mgpmc@6e000000ti,omap3430-gpmcgpmc|nrxtx+usb_otg_hs@480ab000ti,omap3-musb|H \]Wmcdma usb_otg_hs dss@48050000 ti,omap3-dss|H disabled dss_corefck+dispc@48050400ti,omap3-dispc|H dss_dispcfckencoder@4804fc00 ti,omap3-dsi|HH@H Mprotophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbi|H disabled dss_rfbifckickencoder@48050c00ti,omap3-venc|H  disabled dss_vencfckssi-controller@48058000 ti,omap3-ssissi disabled|HHMsysgddGWgdd_mpu+ssi-port@4805a000ti,omap3-ssi-port|HHMtxrx CDssi-port@4805b000ti,omap3-ssi-port|HHMtxrx EFam35x_otg_hs@5c040000ti,omap3-musb am35x_otg_hs disabled|\GWmcethernet@0x5c000000ti,am3517-emac davinci_emacokay|\CDEFV#> Wjethernet@0x5c030000ti,davinci_mdio davinci_mdiookay|\|B@+serial@4809e000ti,omap3-uartuart4 disabled|H T76txrxlpinmux@480025d8 ti,omap3-padconfpinctrl-single|H%$+can@5c050000ti,am3517-hecc disabled|\\0\ Mhecchecc-rammbx|memory@80000000pmemory|fixedregulatorregulator-fixed]vbatlLK@LK@HN compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3candevice_typeregclocksclock-namesclock-latencyinterruptsti,hwmodsstatusranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinslinux,phandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lock#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0ti,en-ck32k-xtalvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-compatibleregulator-always-onregulator-boot-on#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-width#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-securegpmc,num-csgpmc,num-waitpinsmultipointnum-epsram-bitsti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freq