8t(K< ti,am33xx +7Newflow AM335x NanoBonechosenaliases=/ocp/i2c@44e0b000B/ocp/i2c@4802a000G/ocp/i2c@4819c000L/ocp/serial@44e09000T/ocp/serial@48022000\/ocp/serial@48024000d/ocp/serial@481a6000l/ocp/serial@481a8000t/ocp/serial@481aa000|/ocp/can@481cc000/ocp/can@481d0000/ocp/usb@47400000/usb@47401000/ocp/usb@47400000/usb@47401800#/ocp/usb@47400000/usb-phy@47401300#/ocp/usb@47400000/usb-phy@47401b00&/ocp/ethernet@4a100000/slave@4a100200&/ocp/ethernet@4a100000/slave@4a100300cpus+cpu@0arm,cortex-a8cpucpuopp-tableoperating-points-v2-ti-cpu opp50-300000000 ~4(->opp100-275000000d* r->opp100-300000000 r- >opp100-500000000e r-opp100-600000000#F r-@opp120-600000000#F O@-opp120-720000000*T O@-oppturbo-720000000*T 9pP-oppturbo-800000000/ 9pP-oppnitro-1000000000; 7DL-pmuarm,cortex-a8-pmuJsocti,omap-inframpu ti,omap3-mpuUmpuocp simple-bus+_Ul3_mainl4_wkup@44c00000ti,am3-l4-wkupsimple-bus+ _D(wkup_m3@100000ti,am3352-wkup-m3@  fumemdmemUwkup_m3pam335x-pm-firmware.elf ((prcm@200000 ti,am3-prcm @clocks+clk_32768_ck fixed-clock clk_rc32k_ck fixed-clock} virt_19200000_ck fixed-clock$ ##virt_24000000_ck fixed-clockn6 $$virt_25000000_ck fixed-clock}x@ %%virt_26000000_ck fixed-clock &&tclkin_ck fixed-clock dpll_core_ck@490ti,am3-dpll-core-clock \h dpll_core_x2_ckti,am3-dpll-x2-clock dpll_core_m4_ck@480ti,divider-clock dpll_core_m5_ck@484ti,divider-clock dpll_core_m6_ck@4d8ti,divider-clockdpll_mpu_ck@488ti,am3-dpll-clock  , dpll_mpu_m2_ck@4a8ti,divider-clockdpll_ddr_ck@494ti,am3-dpll-no-gate-clock 4@  dpll_ddr_m2_ck@4a0ti,divider-clock   dpll_ddr_m2_div2_ckfixed-factor-clock dpll_disp_ck@498ti,am3-dpll-no-gate-clock HT  dpll_disp_m2_ck@4a4ti,divider-clock  dpll_per_ck@48c!ti,am3-dpll-no-gate-j-type-clock p  dpll_per_m2_ck@4acti,divider-clock   dpll_per_m2_div4_wkupdm_ckfixed-factor-clock dpll_per_m2_div4_ckfixed-factor-clock cefuse_fck@a20ti,gate-clock clk_24mhzfixed-factor-clock  clkdiv32k_ckfixed-factor-clock clkdiv32k_ick@14cti,gate-clockL l3_gclkfixed-factor-clock pruss_ocp_gclk@530 ti,mux-clock0mmu_fck@914ti,gate-clock timer1_fck@528 ti,mux-clock(timer2_fck@508 ti,mux-clock timer3_fck@50c ti,mux-clock  timer4_fck@510 ti,mux-clock timer5_fck@518 ti,mux-clock timer6_fck@51c ti,mux-clock timer7_fck@504 ti,mux-clock usbotg_fck@47cti,gate-clock |dpll_core_m4_div2_ckfixed-factor-clock ieee5000_fck@e4ti,gate-clockwdt1_fck@538 ti,mux-clock8l4_rtc_gclkfixed-factor-clockl4hs_gclkfixed-factor-clockl3s_gclkfixed-factor-clockl4fw_gclkfixed-factor-clockl4ls_gclkfixed-factor-clock ''sysclk_div_ckfixed-factor-clockcpsw_125mhz_gclkfixed-factor-clock EEcpsw_cpts_rft_clk@520 ti,mux-clock  FFgpio0_dbclk_mux_ck@53c ti,mux-clock < gpio0_dbclk@408ti,gate-clockgpio1_dbclk@acti,gate-clockgpio2_dbclk@b0ti,gate-clockgpio3_dbclk@b4ti,gate-clocklcd_gclk@534 ti,mux-clock  4 mmc_clkfixed-factor-clock gfx_fclk_clksel_ck@52c ti,mux-clock , gfx_fck_div_ck@52cti,divider-clock,sysclkout_pre_ck@700 ti,mux-clock  clkout2_div_ck@700ti,divider-clock !!dbg_sysclk_ck@414ti,gate-clock dbg_clka_ck@414ti,gate-clock stm_pmd_clock_mux_ck@414 ti,mux-clock trace_pmd_clk_mux_ck@414 ti,mux-clock  stm_clk_div_ck@414ti,divider-clock@trace_clk_div_ck@414ti,divider-clock @clkout2_ck@700ti,gate-clock!clockdomainsclk_24mhz_clkdmti,clockdomainscm@210000ti,am3-scmsimple-bus! +  _! pinmux@800pinctrl-single8+  6Sdefaulta"misc_pinsk\ ""gpmc_pinsk000 00000 0$0(0,0004080<0p0|  HHi2c0_pinsk   77uart0_pinskp0t //uart1_pins kx|0 00uart2_pins k7P)T  22uart3_pins k6`)d  44uart4_pins k6h)l  55uart5_pinsk,D  66mmc1_pins@k00000077 ::scm_conf@0sysconsimple-bus+ _ clocks+sys_clkin_ck@40 ti,mux-clock#$%&@ adc_tsc_fckfixed-factor-clockdcan0_fckfixed-factor-clock <<dcan1_fckfixed-factor-clock ==mcasp0_fckfixed-factor-clockmcasp1_fckfixed-factor-clocksmartreflex0_fckfixed-factor-clocksmartreflex1_fckfixed-factor-clocksha0_fckfixed-factor-clockaes0_fckfixed-factor-clockrng_fckfixed-factor-clockehrpwm0_tbclk@44e10664ti,gate-clock'd BBehrpwm1_tbclk@44e10664ti,gate-clock'd CCehrpwm2_tbclk@44e10664ti,gate-clock'd DDwkup_m3_ipc@1324ti,am3352-wkup-m3-ipc$$JN()*dma-router@f90ti,am335x-edma-crossbar@ + 88clockdomainsinterrupt-controller@48200000ti,am33xx-intcH  edma@49000000ti,edma3-tpccUtpccI fedma3_cc J 'edma3_ccintedma3_mperredma3_ccerrint@,-. ++tptc@49800000ti,edma3-tptcUtptc0IJpedma3_tcerrint ,,tptc@49900000ti,edma3-tptcUtptc1IJqedma3_tcerrint --tptc@49a00000ti,edma3-tptcUtptc2IJredma3_tcerrint ..gpio@44e07000ti,omap4-gpioUgpio1 DpJ` 11gpio@4804c000ti,omap4-gpioUgpio2 HJb IIgpio@481ac000ti,omap4-gpioUgpio3 HJ  33gpio@481ae000ti,omap4-gpioUgpio4 HJ> ;;serial@44e09000ti,am3352-uartti,omap3-uartUuart1lD JH&okay-++2txrxSdefaulta/serial@48022000ti,am3352-uartti,omap3-uartUuart2lH JI&okay-++2txrxSdefaulta0 <1 E[n~serial@48024000ti,am3352-uartti,omap3-uartUuart3lH@ JJ&okay-++2txrxSdefaulta2 <3En~serial@481a6000ti,am3352-uartti,omap3-uartUuart4lH` J,&okaySdefaulta4serial@481a8000ti,am3352-uartti,omap3-uartUuart5lH J-&okaySdefaulta5serial@481aa000ti,am3352-uartti,omap3-uartUuart6lH J.&okaySdefaulta6i2c@44e0b000 ti,omap4-i2c+Ui2c1DJF&okaySdefaulta7gpio@20microchip,mcp23017  tps@24$ ti,tps65217chargerti,tps65217-charger &disabledpwrbuttonti,tps65217-pwrbutton &disabledregulators+regulator@0dcdc1 regulator@1dcdc2 vdd_mpu 8e  regulator@2dcdc3  vdd_core 8e regulator@3ldo1regulator@4ldo20rX4Vpregulator@5ldo3regulator@6ldo40rX4Vp 99eeprom@53microchip,24c02atmel,24c02Srtc@68dallas,ds1307hi2c@4802a000 ti,omap4-i2c+Ui2c2HJG &disabledi2c@4819c000 ti,omap4-i2c+Ui2c3HJ &disabledmmc@48060000ti,omap4-hsmmcUmmc1"/F -882txrxJ@H&okayc9Sdefaulta:o y; ;mmc@481d8000ti,omap4-hsmmcUmmc2/-++2txrxJH &disabledmmc@47810000ti,omap4-hsmmcUmmc3/JG &disabledspinlock@480ca000ti,omap4-hwspinlockH  Uspinlockwdt@44e35000 ti,omap3-wdt Uwd_timer2DPJ[can@481cc000ti,am3352-d_canUd_can0H <fck DJ4 &disabledcan@481d0000ti,am3352-d_canUd_can1H =fck DJ7 &disabledmailbox@480C8000ti,omap4-mailboxH JMUmailbox ))wkup_m3   **timer@44e31000ti,am335x-timer-1msDJCUtimer1timer@48040000ti,am335x-timerHJDUtimer2timer@48042000ti,am335x-timerH JEUtimer3timer@48044000ti,am335x-timerH@J\Utimer4timer@48046000ti,am335x-timerH`J]Utimer5timer@48048000ti,am335x-timerHJ^Utimer6timer@4804a000ti,am335x-timerHJ_Utimer7rtc@44e3e000ti,am3352-rtcti,da830-rtcDJKLUrtcint-clkspi@48030000ti,omap4-mcspi+HJAUspi00-++++2tx0rx0tx1rx1 &disabledspi@481a0000ti,omap4-mcspi+HJ}Uspi10-+*+++,+-2tx0rx0tx1rx1 &disabledusb@47400000ti,am33xx-usbG@_+ Uusb_otg_hs &disabledcontrol@44e10620ti,am335x-usb-ctrl-moduleD DHfphy_ctrlwakeup &disabled >>usb-phy@47401300ti,am335x-usb-phyG@fphy &disabled+> ??usb@47401000ti,musb-am33xx &disabledG@G@ fmccontrolJmc7otg?Q` p}?h-@@@@@@@@@@ @ @ @ @ @@@@@@@@@@@ @ @ @ @ @2rx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15usb-phy@47401b00ti,am335x-usb-phyG@fphy &disabled+> AAusb@47401800ti,musb-am33xx &disabledG@G@ fmccontrolJmc7otg?Q` p}Ah-@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@2rx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15dma-controller@47402000ti,am3359-cppi41 G@G@ G@0G@@@#fgluecontrollerschedulerqueuemgrJglue &disabled @@epwmss@48300000ti,am33xx-pwmssH0Uepwmss0+ &disabled$_H0H0H0H0H0H0ecap@48300100ti,am3352-ecapti,am33xx-ecapH0'fckJecap0 &disabledpwm@48300200"ti,am3352-ehrpwmti,am33xx-ehrpwmH0B' tbclkfck &disabledepwmss@48302000ti,am33xx-pwmssH0 Uepwmss1+ &disabled$_H0!H0!H0!H0!H0"H0"ecap@48302100ti,am3352-ecapti,am33xx-ecapH0!'fckJ/ecap1 &disabledpwm@48302200"ti,am3352-ehrpwmti,am33xx-ehrpwmH0"C' tbclkfck &disabledepwmss@48304000ti,am33xx-pwmssH0@Uepwmss2+ &disabled$_H0AH0AH0AH0AH0BH0Becap@48304100ti,am3352-ecapti,am33xx-ecapH0A'fckJ=ecap2 &disabledpwm@48304200"ti,am3352-ehrpwmti,am33xx-ehrpwmH0BD' tbclkfck &disabledethernet@4a100000ti,am335x-cpswti,cpswUcpgmac0EF fckcpts  JJ+J()*+_&okaymdio@4a101000ti,cpsw-mdioti,davinci_mdio+ Udavinci_mdioB@J&okay GGslave@4a100200$0G7mii@slave@4a100300$0G7mii@cpsw-phy-sel@44e10650ti,am3352-cpsw-phy-selDP fgmii-selocmcram@40300000 mmio-sram@0elm@48080000ti,am3352-elmH JUelm&okaylcdc@4830e000ti,am33xx-tilcdcH0J$Ulcdc &disabledtscadc@44e0d000ti,am3359-tscadcDJUadc_tsc &disabled-+5+9 2fifo0fifo1tscti,am3359-tscadcSti,am3359-adcgpmc@50000000ti,am3352-gpmcUgpmceP Jd -+42rxtxx+ &okaySdefaultaH _nor@0,0  cfi-flashspansion,s29gl010p11t ':(HW(et F P+partition@0boot partition@1env1 partition@2env2partition@3kernel@partition@4rootfsPpartition@5userpartition@6datafram@1,0  ':HWet #  sham@53100000ti,omap4-shamUshamSJm -+$2rxaes@53500000 ti,omap4-aesUaesSPJg-++2txrxmcasp@48038000ti,am33xx-mcasp-audioUmcasp0H F@fmpudatJPQtxrx &disabled-++ 2txrxmcasp@4803C000ti,am33xx-mcasp-audioUmcasp1H F@@fmpudatJRStxrx &disabled-+ + 2txrxrng@48310000 ti,omap4-rngUrngH1 Jomemory@80000000memoryleds gpio-ledsled0nanobone:green:usr1 |I=off compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3serial4serial5d_can0d_can1usb0usb1phy0phy1ethernet0ethernet1device_typeregoperating-points-v2clocksclock-namesclock-latencycpu0-supplysysconlinux,phandleopp-hzopp-microvoltopp-supported-hwopp-suspendinterruptsti,hwmodsrangesreg-namesti,pm-firmware#clock-cellsclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-rate-parentti,bit-shiftti,index-power-of-two#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinsti,rprocmboxes#dma-cellsdma-requestsdma-mastersinterrupt-controller#interrupt-cellsinterrupt-namesti,tptcsti,edma-memcpy-channelsgpio-controller#gpio-cellsstatusdmasdma-namesrts-gpiors485-rts-active-highrs485-rx-during-txrs485-rts-delaylinux,rs485-enabled-at-boot-timeregulator-compatibleregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onregulator-namepagesizeti,dual-voltti,needs-special-resetti,needs-special-hs-handlingvmmc-supplybus-widthcd-gpioswp-gpios#hwlock-cellssyscon-raminit#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-send-noirqti,mbox-txti,mbox-rxti,timer-alwonti,timer-pwmti,spi-num-csti,ctrl_moddr_modementor,multipointmentor,num-epsmentor,ram-bitsmentor,powerphys#dma-channels#dma-requests#pwm-cellscpdma_channelsale_entriesbd_ram_sizemac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftdual_emacbus_freqmac-addressphy_idphy-modedual_emac_res_vlan#io-channel-cellsti,no-idle-on-initgpmc,num-csgpmc,num-waitpinslinux,mtd-namebank-widthgpmc,mux-add-datagpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,cycle2cycle-samecsengpmc,cycle2cycle-delay-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nslabelgpmc,cycle2cycle-diffcsendefault-state