8}(&}4isee,am335x-base0033isee,am335x-igep0033ti,am33xx +$7IGEP COM AM335x on AQUILA Expansionchosenaliases=/ocp/i2c@44e0b000B/ocp/i2c@4802a000G/ocp/i2c@4819c000L/ocp/serial@44e09000T/ocp/serial@48022000\/ocp/serial@48024000d/ocp/serial@481a6000l/ocp/serial@481a8000t/ocp/serial@481aa000|/ocp/can@481cc000/ocp/can@481d0000/ocp/usb@47400000/usb@47401000/ocp/usb@47400000/usb@47401800#/ocp/usb@47400000/usb-phy@47401300#/ocp/usb@47400000/usb-phy@47401b00&/ocp/ethernet@4a100000/slave@4a100200&/ocp/ethernet@4a100000/slave@4a100300cpus+cpu@0arm,cortex-a8cpucpuopp-tableoperating-points-v2-ti-cpu opp50-300000000 ~4(->opp100-275000000d* r->opp100-300000000 r- >opp100-500000000e r-opp100-600000000#F r-@opp120-600000000#F O@-opp120-720000000*T O@-oppturbo-720000000*T 9pP-oppturbo-800000000/ 9pP-oppnitro-1000000000; 7DL-pmuarm,cortex-a8-pmuJsocti,omap-inframpu ti,omap3-mpuUmpuocp simple-bus+_Ul3_mainl4_wkup@44c00000ti,am3-l4-wkupsimple-bus+ _D(wkup_m3@100000ti,am3352-wkup-m3@  fumemdmemUwkup_m3pam335x-pm-firmware.elf ''prcm@200000 ti,am3-prcm @clocks+clk_32768_ck fixed-clock clk_rc32k_ck fixed-clock} virt_19200000_ck fixed-clock$ ""virt_24000000_ck fixed-clockn6 ##virt_25000000_ck fixed-clock}x@ $$virt_26000000_ck fixed-clock %%tclkin_ck fixed-clock dpll_core_ck@490ti,am3-dpll-core-clock \h dpll_core_x2_ckti,am3-dpll-x2-clock dpll_core_m4_ck@480ti,divider-clock dpll_core_m5_ck@484ti,divider-clock dpll_core_m6_ck@4d8ti,divider-clockdpll_mpu_ck@488ti,am3-dpll-clock  , dpll_mpu_m2_ck@4a8ti,divider-clockdpll_ddr_ck@494ti,am3-dpll-no-gate-clock 4@  dpll_ddr_m2_ck@4a0ti,divider-clock   dpll_ddr_m2_div2_ckfixed-factor-clock dpll_disp_ck@498ti,am3-dpll-no-gate-clock HT  dpll_disp_m2_ck@4a4ti,divider-clock  dpll_per_ck@48c!ti,am3-dpll-no-gate-j-type-clock p  dpll_per_m2_ck@4acti,divider-clock   dpll_per_m2_div4_wkupdm_ckfixed-factor-clock dpll_per_m2_div4_ckfixed-factor-clock cefuse_fck@a20ti,gate-clock clk_24mhzfixed-factor-clock  clkdiv32k_ckfixed-factor-clock clkdiv32k_ick@14cti,gate-clockL l3_gclkfixed-factor-clock pruss_ocp_gclk@530 ti,mux-clock0mmu_fck@914ti,gate-clock timer1_fck@528 ti,mux-clock(timer2_fck@508 ti,mux-clock timer3_fck@50c ti,mux-clock  timer4_fck@510 ti,mux-clock timer5_fck@518 ti,mux-clock timer6_fck@51c ti,mux-clock timer7_fck@504 ti,mux-clock usbotg_fck@47cti,gate-clock |dpll_core_m4_div2_ckfixed-factor-clock ieee5000_fck@e4ti,gate-clockwdt1_fck@538 ti,mux-clock8l4_rtc_gclkfixed-factor-clockl4hs_gclkfixed-factor-clockl3s_gclkfixed-factor-clockl4fw_gclkfixed-factor-clockl4ls_gclkfixed-factor-clock &&sysclk_div_ckfixed-factor-clockcpsw_125mhz_gclkfixed-factor-clock <<cpsw_cpts_rft_clk@520 ti,mux-clock  ==gpio0_dbclk_mux_ck@53c ti,mux-clock < gpio0_dbclk@408ti,gate-clockgpio1_dbclk@acti,gate-clockgpio2_dbclk@b0ti,gate-clockgpio3_dbclk@b4ti,gate-clocklcd_gclk@534 ti,mux-clock  4 mmc_clkfixed-factor-clock gfx_fclk_clksel_ck@52c ti,mux-clock , gfx_fck_div_ck@52cti,divider-clock,sysclkout_pre_ck@700 ti,mux-clock  clkout2_div_ck@700ti,divider-clock !!dbg_sysclk_ck@414ti,gate-clock dbg_clka_ck@414ti,gate-clock stm_pmd_clock_mux_ck@414 ti,mux-clock trace_pmd_clk_mux_ck@414 ti,mux-clock  stm_clk_div_ck@414ti,divider-clock@trace_clk_div_ck@414ti,divider-clock @clkout2_ck@700ti,gate-clock!clockdomainsclk_24mhz_clkdmti,clockdomainscm@210000ti,am3-scmsimple-bus! +  _! pinmux@800pinctrl-single8+  6pinmux_i2c0_pinsS00 //pinmux_nandflash_pinsxS000 00000p0t7| ??pinmux_uart0_pinsSp0t ..pinmux_leds_pinsS\ BBpinmux_nxp_hdmi_pinsS  EEpinmux_nxp_hdmi_off_pinsS  FFpinmux_leds_base_pinsST GGscm_conf@0sysconsimple-bus+ _ clocks+sys_clkin_ck@40 ti,mux-clock"#$%@ adc_tsc_fckfixed-factor-clockdcan0_fckfixed-factor-clock 33dcan1_fckfixed-factor-clock 44mcasp0_fckfixed-factor-clockmcasp1_fckfixed-factor-clocksmartreflex0_fckfixed-factor-clocksmartreflex1_fckfixed-factor-clocksha0_fckfixed-factor-clockaes0_fckfixed-factor-clockrng_fckfixed-factor-clockehrpwm0_tbclk@44e10664ti,gate-clock&d 99ehrpwm1_tbclk@44e10664ti,gate-clock&d ::ehrpwm2_tbclk@44e10664ti,gate-clock&d ;;wkup_m3_ipc@1324ti,am3352-wkup-m3-ipc$$JNg'p()dma-router@f90ti,am335x-edma-crossbar@w * 11clockdomainsinterrupt-controller@48200000ti,am33xx-intcH  edma@49000000ti,edma3-tpccUtpccI fedma3_cc J 'edma3_ccintedma3_mperredma3_ccerrint@w+,- **tptc@49800000ti,edma3-tptcUtptc0IJpedma3_tcerrint ++tptc@49900000ti,edma3-tptcUtptc1IJqedma3_tcerrint ,,tptc@49a00000ti,edma3-tptcUtptc2IJredma3_tcerrint --gpio@44e07000ti,omap4-gpioUgpio1DpJ`gpio@4804c000ti,omap4-gpioUgpio2HJb CCgpio@481ac000ti,omap4-gpioUgpio3HJ  HHgpio@481ae000ti,omap4-gpioUgpio4HJ>serial@44e09000ti,am3352-uartti,omap3-uartUuart1lD JHokay**txrx$default2.serial@48022000ti,am3352-uartti,omap3-uartUuart2lH JI disabled**txrxserial@48024000ti,am3352-uartti,omap3-uartUuart3lH@ JJ disabled**txrxserial@481a6000ti,am3352-uartti,omap3-uartUuart4lH` J, disabledserial@481a8000ti,am3352-uartti,omap3-uartUuart5lH J- disabledserial@481aa000ti,am3352-uartti,omap3-uartUuart6lH J. disabledi2c@44e0b000 ti,omap4-i2c+Ui2c1DJFokay$default2/ DDtps@2d- ti,tps65910<0H0T0`0l0x000regulators+regulator@0vrtcregulator@1vioregulator@2vdd1vdd_mpu t regulator@3vdd2 vdd_core t0regulator@4vdd3regulator@5vdig1regulator@6vdig2regulator@7vpllregulator@8vdacregulator@9 vaux1regulator@10 vaux2regulator@11 vaux33regulator@12 vmmcregulator@13 vbbeeprom@50 atmel,24c256Pi2c@4802a000 ti,omap4-i2c+Ui2c2HJG disabledi2c@4819c000 ti,omap4-i2c+Ui2c3HJ disabledmmc@48060000ti,omap4-hsmmcUmmc1$; 11txrxJ@HokayX2dmmc@481d8000ti,omap4-hsmmcUmmc2$**txrxJH disabledmmc@47810000ti,omap4-hsmmcUmmc3$JG disabledspinlock@480ca000ti,omap4-hwspinlockH  Uspinlocknwdt@44e35000 ti,omap3-wdt Uwd_timer2DPJ[can@481cc000ti,am3352-d_canUd_can0H 3fck |DJ4 disabledcan@481d0000ti,am3352-d_canUd_can1H 4fck |DJ7 disabledmailbox@480C8000ti,omap4-mailboxH JMUmailbox ((wkup_m3   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S`8h777777777777777777777777777777rx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15dma-controller@47402000ti,am3359-cppi41 G@G@ G@0G@@@#fgluecontrollerschedulerqueuemgrJgluewesokay 77epwmss@48300000ti,am33xx-pwmssH0Uepwmss0+ disabled$_H0H0H0H0H0H0ecap@48300100ti,am3352-ecapti,am33xx-ecapH0&fckJecap0 disabledpwm@48300200"ti,am3352-ehrpwmti,am33xx-ehrpwmH09& tbclkfck disabledepwmss@48302000ti,am33xx-pwmssH0 Uepwmss1+ disabled$_H0!H0!H0!H0!H0"H0"ecap@48302100ti,am3352-ecapti,am33xx-ecapH0!&fckJ/ecap1 disabledpwm@48302200"ti,am3352-ehrpwmti,am33xx-ehrpwmH0":& tbclkfck disabledepwmss@48304000ti,am33xx-pwmssH0@Uepwmss2+ disabled$_H0AH0AH0AH0AH0BH0Becap@48304100ti,am3352-ecapti,am33xx-ecapH0A&fckJ=ecap2 disabledpwm@48304200"ti,am3352-ehrpwmti,am33xx-ehrpwmH0B;& tbclkfck disabledethernet@4a100000ti,am335x-cpswti,cpswUcpgmac0<= fckcpts  ӀJJ+J()*+_okaymdio@4a101000ti,cpsw-mdioti,davinci_mdio+ Udavinci_mdioB@Jokay >>slave@4a100200 >rmiislave@4a100300 >rmiicpsw-phy-sel@44e10650ti,am3352-cpsw-phy-selDP fgmii-selocmcram@40300000 mmio-sram@0elm@48080000ti,am3352-elmH JUelmokay AAlcdc@4830e000ti,am33xx-tilcdcH0J$Ulcdcokaytscadc@44e0d000ti,am3359-tscadcDJUadc_tsc disabled*5*9 fifo0fifo1tscti,am3359-tscadc(ti,am3359-adcgpmc@50000000ti,am3352-gpmcUgpmc:P Jd *4rxtxMY+okay$default2?_ @@nand@0,0ti,omap2-nand  @J k@tbch8,," ,+(:H6W@fRwR(+Apartition@0SPLpartition@1U-bootpartition@2 U-Boot Env&partition@3Kernel(Ppartition@4 File Systemxsham@53100000ti,omap4-shamUshamSJm *$rxaes@53500000 ti,omap4-aesUaesSPJg**txrxmcasp@48038000ti,am33xx-mcasp-audioUmcasp0H F@fmpudatJPQtxrx disabled** txrxmcasp@4803C000ti,am33xx-mcasp-audioUmcasp1H F@@fmpudatJRStxrx disabled* * txrxrng@48310000 ti,omap4-rngUrngH1 Jomemory@80000000memoryleds$default2B gpio-ledsled0com:green:user nC onfixedregulator0regulator-fixedvbatLK@LK@ 00fixedregulator1regulator-fixedvmmc2Z2Z 22hdmiti,tilcdc,slaveD $defaultoff2EFokayleds_base$default2G gpio-ledsled0base:red:user nC offled1base:green:user nH off compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3serial4serial5d_can0d_can1usb0usb1phy0phy1ethernet0ethernet1device_typeregoperating-points-v2clocksclock-namesclock-latencycpu0-supplysysconlinux,phandleopp-hzopp-microvoltopp-supported-hwopp-suspendinterruptsti,hwmodsrangesreg-namesti,pm-firmware#clock-cellsclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-rate-parentti,bit-shiftti,index-power-of-two#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsti,rprocmboxes#dma-cellsdma-requestsdma-mastersinterrupt-controller#interrupt-cellsinterrupt-namesti,tptcsti,edma-memcpy-channelsgpio-controller#gpio-cellsstatusdmasdma-namespinctrl-namespinctrl-0vcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-compatibleregulator-always-onregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onti,dual-voltti,needs-special-resetti,needs-special-hs-handlingvmmc-supplybus-width#hwlock-cellssyscon-raminit#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-send-noirqti,mbox-txti,mbox-rxti,timer-alwonti,timer-pwmti,spi-num-csti,ctrl_moddr_modementor,multipointmentor,num-epsmentor,ram-bitsmentor,powerphys#dma-channels#dma-requests#pwm-cellscpdma_channelsale_entriesbd_ram_sizemac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftbus_freqmac-addressphy_idphy-modermii-clock-ext#io-channel-cellsti,no-idle-on-initgpmc,num-csgpmc,num-waitpinsrb-gpiosnand-bus-widthti,nand-ecc-optgpmc,device-widthgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,clk-activation-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsti,elm-idlabeldefault-statei2cpinctrl-1