8(google,veyron-mickey-rev8google,veyron-mickey-rev7google,veyron-mickey-rev6google,veyron-mickey-rev5google,veyron-mickey-rev4google,veyron-mickey-rev3google,veyron-mickey-rev2google,veyron-mickey-rev1google,veyron-mickey-rev0google,veyron-mickeygoogle,veyronrockchip,rk3288&7Google Mickeychosenaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000memorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12hw@\@p@ @@OOa sB@ ~ ' 9 K 0 $@29EKcpu@501cpuarm,cortex-a12EKcpu@502cpuarm,cortex-a12EKcpu@503cpuarm,cortex-a12EKamba simple-busSdma-controller@ff250000arm,pl330arm,primecell%@Ze2 apb_pclkEKdma-controller@ff600000arm,pl330arm,primecell`@Ze2 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@Ze2 apb_pclkEHKHreserved-memorySdma-unusable@fe000000oscillator fixed-clockn6xin24mE K timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvbiuciuciu-driveciu-sample  @ disableddwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswbiuciuciu-driveciu-sample ! @okay &3I Tbldefault z dwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guybiuciuciu-driveciu-sample #@okay ITbldefault zsaradc@ff100000rockchip,saradc $ 2I[saradcapb_pclkW saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARspiclkapb_pclk+  0txrx ,ldefaultz disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSspiclkapb_pclk+ 0txrx -ldefaultz disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTspiclkapb_pclk+0txrx .ldefaultz !"okay: flash@0jedec,spi-norMi2c@ff140000rockchip,rk3288-i2c >i2c2Mldefaultz#okay_2wdtpm@20infineon,slb9645tt i2c@ff150000rockchip,rk3288-i2c ?i2c2Oldefaultz$ disabledi2c@ff160000rockchip,rk3288-i2c @i2c2Pldefaultz% disabled_2w,i2c@ff170000rockchip,rk3288-i2c Ai2c2Qldefaultz&okay_,wEYKYserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 72MUbaudclkapb_pclkldefault z'()okayMlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 82NVbaudclkapb_pclkldefaultz*okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 92OWbaudclkapb_pclkldefaultz+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :2PXbaudclkapb_pclkldefaultz, disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;2QYbaudclkapb_pclkldefaultz- disabledthermal-zonesreserve_thermal.cpu_thermald.tripscpu_crit_" criticalcpu_alert_almost_warm"passivecpu_alert_warm"passiveE/K/cpu_alert_almost_hot8"passiveE0K0cpu_alert_hot@P"passiveE1K1cpu_alert_hotterH "passiveE2K2cpu_alert_very_hotL"passiveE3K3cooling-mapscpu_warm_limit_cpu-/ 2cpu_almost_hot_limit_cpu-0 2cpu_hot_limit_cpu-1 2cpu_hotter_limit_cpu-2 2cpu_very_hot_limit_cpu-3 2gpu_thermald.tripsgpu_alert0p"passiveE4K4gpu_crit_" criticalcooling-mapsmap0-4 2tsadc@ff280000rockchip,rk3288-tsadc( %2HZtsadcapb_pclk tsadc-apblinitdefaultsleepz5A6K5UksokayE.K.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq782fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmaceth disabledusb@ff500000 generic-ehciP 2usbhost8usb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2otghost9 usb2-phy disabledusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2otghost@@ .: usb2-phyokayz8:usb@ff5c0000 generic-ehci\ 2usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c2Lldefaultz;okay_2wdpmic@1brockchip,rk808xin32kwifibt_32kin&<ldefault z=>?Op~@A AEfKfregulatorsDCDC_REG1vdd_arm  q7 OqEKregulator-state-memdDCDC_REG2vdd_gpu  57Oqregulator-state-mem}B@DCDC_REG3 vcc135_ddr regulator-state-mem}DCDC_REG4vcc_18 w@7w@EKregulator-state-mem}w@LDO_REG3vdd_10 B@7B@regulator-state-mem}B@LDO_REG7 vdd10_lcd B@7B@SWITCH_REG1 vcc33_lcd EGKGregulator-state-memdLDO_REG8 w@7w@ vcc18_lcdi2c@ff660000rockchip,rk3288-i2cf =i2c2NldefaultzB disabled_2w pwm@ff680000rockchip,rk3288-pwmhldefaultzC2^pwm disabledpwm@ff680010rockchip,rk3288-pwmhldefaultzD2^pwmokaypwm@ff680020rockchip,rk3288-pwmh ldefaultzE2^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0ldefaultzF2^pwm disabledbus_intmem@ff700000 mmio-sramp Spsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEKpower-controller!rockchip,rk3288-power-controllerh8 EKKKpd_vio@9 2chgfdehilkjpd_hevc@11 2oppd_video@12 2pd_gpu@13 2syscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv7Hjk$#gׄeрxhрxhEKsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwE7K7edp-phyrockchip,rk3288-dp-phy2h24m disabledEVKVio-domains"rockchip,rk3288-io-voltage-domainokay@*@:@HGTwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif` hclkmclk2T+H0tx 6ldefaultzI7 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5+HH0txrxi2s_hclki2s_clki2s_clk_out2RqldefaultzJqokaycypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}aclkhclksclkapb_pclk crypto-rstokayvop@ff930000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopK def axiahbdclkLokayportE K endpoint@0MEZKZendpoint@1NEWKWendpoint@2OETKTiommu@ff930300rockchip,iommu  vopb_mmuK okayELKLvop@ff940000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopK  axiahbdclkP disabledportE K endpoint@0QE[K[endpoint@1REXKXendpoint@2SEUKUiommu@ff940300rockchip,iommu  vopl_mmuK  disabledEPKPmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 2~d refpclkK 7 disabledportsportendpoint@0TEOKOendpoint@1UESKSdp@ff970000rockchip,rk3288-dp@ b2icdppclkVdpodp7 disabledportsport@0endpoint@0WENKNendpoint@1XERKRhdmi@ff980000rockchip,rk3288-dw-hdmi7 g2hm iahbisfrK okayYportsportendpoint@0ZEMKMendpoint@1[EQKQinterrupt-controller@ffc01000 arm,gic-400  @ `   EKefuse@ffb40000rockchip,rockchip-efuse 2q pclk_efusecpu_leakage@17phyrockchip,rk3288-usb-phy7okayusb-phy@320 2]phyclkE:K:usb-phy@33442^phyclkE8K8usb-phy@348H2_phyclkE9K9pinctrlrockchip,rk3288-pinctrl7Sldefaultsleepz\A\gpio0@ff750000rockchip,gpio-banku Q2@ E<K<gpio1@ff780000rockchip,gpio-bankx R2A gpio2@ff790000rockchip,gpio-banky S2B EeKegpio3@ff7a0000rockchip,gpio-bankz T2C gpio4@ff7b0000rockchip,gpio-bank{ U2D EiKigpio5@ff7c0000rockchip,gpio-bank| V2E gpio6@ff7d0000rockchip,gpio-bank} W2F gpio7@ff7e0000rockchip,gpio-bank~ X2G EAKAgpio8@ff7f0000rockchip,gpio-bank Y2H hdmihdmi-ddc &]]power-hdmi-on& ]EkKkpcfg-pull-up4E^K^pcfg-pull-downAE_K_pcfg-pull-nonePE]K]pcfg-pull-none-12maP] EaKasleepglobal-pwroff&]E\K\ddrio-pwroff&]ddr0-retention&^ddr1-retention&^edpedp-hpd& _i2c0i2c0-xfer &]]E;K;i2c1i2c1-xfer &]]E#K#i2c2i2c2-xfer & ] ]EBKBi2c3i2c3-xfer &]]E$K$i2c4i2c4-xfer &]]E%K%i2c5i2c5-xfer &]]E&K&i2s0i2s0-bus`&]]]]]]EJKJsdmmcsdmmc-clk&]sdmmc-cmd&^sdmmc-cd&^sdmmc-bus1&^sdmmc-bus4@&^^^^sdio0sdio0-bus1&^sdio0-bus4@&````EKsdio0-cmd&`EKsdio0-clk&`E K sdio0-cd&^sdio0-wp&^sdio0-pwr&^sdio0-bkpwr&^sdio0-int&^wifienable-h&]EhKhbt-enable-l&]EgKgsdio1sdio1-bus1&^sdio1-bus4@&^^^^sdio1-cd&^sdio1-wp&^sdio1-bkpwr&^sdio1-int&^sdio1-cmd&^sdio1-clk&]sdio1-pwr& ^emmcemmc-clk&`EKemmc-cmd&`EKemmc-pwr& ^emmc-bus1&^emmc-bus4@&^^^^emmc-bus8&````````EKemmc-reset& ]EdKdspi0spi0-clk& ^EKspi0-cs0& ^EKspi0-tx&^EKspi0-rx&^EKspi0-cs1&^spi1spi1-clk& ^EKspi1-cs0& ^EKspi1-rx&^EKspi1-tx&^EKspi2spi2-cs1&^spi2-clk&^EKspi2-cs0&^E"K"spi2-rx&^E!K!spi2-tx& ^E K uart0uart0-xfer &^]E'K'uart0-cts&^E(K(uart0-rts&]E)K)uart1uart1-xfer &^ ]E*K*uart1-cts& ^uart1-rts& ]uart2uart2-xfer &^]E+K+uart3uart3-xfer &^]E,K,uart3-cts& ^uart3-rts& ]uart4uart4-xfer & ^ ]E-K-uart4-cts&^uart4-rts&]tsadcotp-gpio& ]E5K5otp-out& ]E6K6pwm0pwm0-pin&]ECKCpwm1pwm1-pin&]EDKDpwm2pwm2-pin&]EEKEpwm3pwm3-pin&]EFKFgmacrgmii-pins&]]]]aaaa]]] aa]]rmii-pins&]]]]]]]]]]spdifspdif-tx& ]EIKIpcfg-pull-none-drv-8maP]E`K`pcfg-pull-up-drv-8ma4]pcfg-output-highlpcfg-output-lowxbuttonspwr-key-l&^EbKbpmicpmic-int-l&^E=K=dvs-1& _E>K>dvs-2&_E?K?rebootap-warm-reset-h& ]EcKcrecovery-switchrec-mode-l& ^tpmtpm-int-h&]write-protectfw-wp-ap&]gpio-keys gpio-keysldefaultzbpowerPower <tdpgpio-restart gpio-restart < ldefaultzcemmc-pwrseqmmc-pwrseq-emmczdldefault e EKsdio-pwrseqmmc-pwrseq-simple2f ext_clockldefaultzgh iE K vcc-5vregulator-fixedvcc_5v LK@7LK@EjKjvcc33-sysregulator-fixed vcc33_sys 2Z72ZEKvcc50-hdmiregulator-fixed vcc50_hdmi j A ldefaultzkvcc33_ioregulator-fixed vcc33_io E@K@ #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablenum-slotspinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplycap-mmc-highspeedrockchip,default-sample-phasedisable-wp#io-channel-cellsreset-namesdmasdma-namesrx-sample-delay-nsspi-max-frequencyi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedreg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmaassigned-clock-parentsrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc7-supplyvcc8-supplyvddio-supplydvs-gpiosvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltregulator-suspend-mem-disabled#pwm-cells#power-domain-cells#reset-cells#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplyenable-active-highgpio