t8@( 41google,fennel-sku2google,fennelmediatek,mt8183 +7Google fennel14 sku2 boardaliases=/soc/i2c@11007000B/soc/i2c@11011000G/soc/i2c@11009000L/soc/i2c@1100f000Q/soc/i2c@11008000V/soc/i2c@11016000[/soc/i2c@11005000`/soc/i2c@1101a000e/soc/i2c@1101b000j/soc/i2c@11014000o/soc/i2c@11015000u/soc/i2c@11017000{/soc/ovl@14008000/soc/ovl@14009000/soc/ovl@1400a000/soc/rdma@1400b000/soc/rdma@1400c000/soc/serial@11002000/soc/mmc@11230000/soc/mmc@11240000opp-table-cluster0operating-points-v2 opp0-793000000/D8@ opp0-9100000006= }opp0-1014000000opp0-1417000000Tu@ Popp0-1508000000YA A opp0-1586000000^p 6 opp0-1625000000`ۈ@  opp0-1677000000c@5 opp0-1716000000fHf opp0-1781000000j'@opp0-1846000000nB@opp0-1924000000ropp0-1989000000v@opp-table-cluster1operating-points-v2#opp1-793000000/D8@ `opp1-9100000006= opp1-1014000000opp-689000000)N@ Popp-767000000-} A opp-8450000002]@ 6 opp-8710000003g  opp-92300000075 opp-9620000009Vf opp-1027000000=6opp-1092000000AB@opp-1144000000D0opp-1196000000GIccimediatek,mt8183-ccicciintermediate !cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1core2core3cpu@0cpuarm,cortex-a53'+psci9Lcpuintermediate \Tv! cpu@1cpuarm,cortex-a53'+psci9Lcpuintermediate \Tv! cpu@2cpuarm,cortex-a53'+psci9Lcpuintermediate \Tv! cpu@3cpuarm,cortex-a53'+psci9Lcpuintermediate \Tv! cpu@100cpuarm,cortex-a73'+psci9L"cpuintermediate#\v! $cpu@101cpuarm,cortex-a73'+psci9L"cpuintermediate#\v! $cpu@102cpuarm,cortex-a73'+psci9L"cpuintermediate#\v! $cpu@103cpuarm,cortex-a73'+psci9L"cpuintermediate#\v! $idle-statespscicpu-sleeparm,idle-state cluster-sleep-0arm,idle-statecluster-sleep-1arm,idle-state"opp-table-0operating-points-v2qopp-300000000 h Popp-320000000 Popp-340000000C < Popp-360000000u* Ҧ Popp-380000000W  Popp-400000000ׄ z Popp-420000000  Popp-460000000k  L Popp-500000000e } Popp-540000000 / ` Popp-580000000" 4 Popp-620000000$s  Popp-653000000&@ YF Popp-698000000) Aopp-743000000,IG  6opp-800000000/ Hpmu-a53arm,cortex-a53-pmu %&pmu-a73arm,cortex-a73-pmu %'psci arm,psci-1.02smcfixed-factor-clock-13mfixed-factor-clock(&clk13m5oscillator fixed-clock9&clk26m(timerarm,armv8-timer %@   soc+ simple-busIefuse@8000000%mediatek,mt8183-efusemediatek,efuse'+Pokayinterrupt-controller@c000000 arm,gic-v3W %hP'   @ A B  }%ppi-partitionsinterrupt-partition-0&interrupt-partition-1'syscon@c530000mediatek,mt8183-mcucfgsyscon' Sinterrupt-controller@c530a80.mediatek,mt8183-sysirqmediatek,mt6577-sysirqhW %' S Pcpu-debug@d410000&arm,coresight-cpu-debugarm,primecell' A). apb_pclkcpu-debug@d510000&arm,coresight-cpu-debugarm,primecell' Q). apb_pclkcpu-debug@d610000&arm,coresight-cpu-debugarm,primecell' a). apb_pclkcpu-debug@d710000&arm,coresight-cpu-debugarm,primecell' q). apb_pclkcpu-debug@d810000&arm,coresight-cpu-debugarm,primecell' ). apb_pclkcpu-debug@d910000&arm,coresight-cpu-debugarm,primecell' ). apb_pclkcpu-debug@da10000&arm,coresight-cpu-debugarm,primecell' ). apb_pclkcpu-debug@db10000&arm,coresight-cpu-debugarm,primecell' ). apb_pclksyscon@10000000 mediatek,mt8183-topckgensyscon'syscon@10001000 mediatek,mt8183-infracfgsyscon')syscon@10003000mediatek,mt8183-pericfgsyscon'0bpinctrl@10005000mediatek,mt8183-pinctrl'PDiocfg0iocfg1iocfg2iocfg3iocfg4iocfg5iocfg6iocfg7iocfg8eint*h WSPI_AP_EC_CS_LSPI_AP_EC_MOSISPI_AP_EC_CLKI2S3_DOUSB_PD_INT_ODLIT6505_HPD_LI2S3_TDM_D3SOC_I2C6_1V8_SCLSOC_I2C6_1V8_SDADPI_D0DPI_D1DPI_D2DPI_D3DPI_D4DPI_D5DPI_D6DPI_D7DPI_D8DPI_D9DPI_D10DPI_D11DPI_HSYNCDPI_VSYNCDPI_DEDPI_CKAP_MSDC1_CLKAP_MSDC1_DAT3AP_MSDC1_CMDAP_MSDC1_DAT0AP_MSDC1_DAT2AP_MSDC1_DAT1OTG_ENDRVBUSDISP_PWMDSI_TELCM_RST_1V8AP_CTS_WIFI_RTSAP_RTS_WIFI_CTSSOC_I2C5_1V8_SCLSOC_I2C5_1V8_SDASOC_I2C3_1V8_SCLSOC_I2C3_1V8_SDASOC_I2C1_1V8_SDASOC_I2C0_1V8_SDASOC_I2C0_1V8_SCLSOC_I2C1_1V8_SCLAP_SPI_H1_MISOAP_SPI_H1_CS_LAP_SPI_H1_MOSIAP_SPI_H1_CLKI2S5_BCKI2S5_LRCKI2S5_DOBOOTBLOCK_EN_LMT8183_KPCOL0SPI_AP_EC_MISOUART_DBG_TX_AP_RXUART_AP_TX_DBG_RXI2S2_MCKI2S2_BCKCLK_5M_WCAMCLK_2M_UCAMI2S2_LRCKI2S2_DISOC_I2C2_1V8_SCLSOC_I2C2_1V8_SDASOC_I2C4_1V8_SCLSOC_I2C4_1V8_SDASCL8SDA8FCAM_PWDN_LI2S_PMICI2S_PMICI2S_PMICI2S_PMICI2S_PMICI2S_PMICI2S_PMICI2S_PMICAP_FLASH_WP_LEC_AP_INT_ODLIT6505_INT_ODLH1_INT_OD_LAP_SPI_FLASH_MISOAP_SPI_FLASH_CS_LAP_SPI_FLASH_MOSIAP_SPI_FLASH_CLKDA7219_IRQ*audiopinspins-busDabefYZ[audiotdmoutonpins-bus audiotdmoutoffpins-bus  bt-pins@pins-bt-enx'ec-ap-int-odlZpins1 2h1-int-od-lOpins1 i2c0Cpins-busRS?Ti2c1Xpins-busQT?Ti2c2Lpins-busghpTi2c3Vpins-bus23?Ti2c4Epins-busijpTi2c5\pins-bus01?Ti2c6Bpins-bus  pmmc0-pins-defaultfpins-cmd-dat${}~z ?pins-clk|} pins-rst}mmc0-pins-uhsgpins-cmd-dat${}~z ?pins-clk|} pins-ds} pins-rst?mmc1-pins-defaultjpins-cmd-dat "! ? pins-clk } mmc1-pins-uhskpins-cmd-dat "! ? pins-clk}  panel-pins-defaultpanel-reset-'2pwm0-pin-defaultUpins12pins2+scp4pins-scp-uartnpspi0Npins-spiUVWXpspi1Wpins-spipspi2Ypins-spi ppins-spi-mi^}spi3[pins-spipspi4^pins-spipspi5_pins-spi puart0-pins-default=pins-rx_ 2pins-tx`uart1-pins-default>pins-rxy 2pins-txspins-rts/pins-cts. uart1-pins-sleep?pins-rxy 2pins-txspins-rts/pins-cts. wifi-pins-pwrseqpins-wifi-enablew'wifi-pins-wakeuppins-wifi-wakeupq pp1200-mipibrdg-enpins16'pp1800-lcd-enpins1$'pp3300-panel-pinspanel-3v3-enable#'ppvarp-lcd-enpins1B'ppvarn-lcd-enpins1'anx7625-pinsFpins1-I'pins2 2touchscreen-pinsDtouch-int-odl 2touch-rst-ltrackpad-pinsMtrackpad-int pvddio-mipibrdg-enpins1%'volume-button-pinsvoldn-btn-odl 2volup-btn-odl 2ts3a227e_pins]pins1 2syscon@10006000)mediatek,mt8183-scpsyssysconsimple-mfd'`power-controller!mediatek,mt8183-power-controller+Tpower-domain@0' )/)7audioaudio1audio2power-domain@1')power-domain@2'mfg++power-domain@3'+,power-domain@4'power-domain@5'power-domain@6')power-domain@7'X---------- 5mmmm-0mm-1mm-2mm-3mm-4mm-5mm-6mm-7mm-8mm-9).+power-domain@8'@// /////.camcam-0cam-1cam-2cam-3cam-4cam-5cam-6).power-domain@9' "0 0ispisp-0isp-1).power-domain@10' .power-domain@11' .power-domain@12' @&#111111-vpuvpu1vpu-0vpu-1vpu-2vpu-3vpu-4vpu-5).+power-domain@13' $vpu2)power-domain@14'%vpu3)watchdog@10007000mediatek,mt8183-wdt'pdsyscon@1000c000"mediatek,mt8183-apmixedsyssyscon'Spwrap@1000d000mediatek,mt8183-pwrap'pwrap )) spiwrapmt6358mediatek,mt6358h *Wmt6358codecmediatek,mt6358-sound2mt6358regulatormediatek,mt6358-regulatorbuck_vdram1vdram1 5LM0b~buck_vcorevcore 5Mjb~buck_vpavpa 57MPbbuck_vproc11vproc11 5Mjb~$buck_vproc12vproc12 5Mjb~buck_vgpuvgpu 5Mjb,buck_vs2vs2 5LM0b~buck_vmodemvmodem 5Mjb~buck_vs1vs1B@5'{lM0b~ldo_vdram2vdram2 '5w@b ~ldo_vsim1vsim1)25)2bldo_vibrvibrO52Zb<ldo_vrf12regulator-fixedvrf12O5Obxldo_vio18regulator-fixedvio18w@5w@b ~ildo_vusbvusb-5/M`b~cldo_vcamioregulator-fixedvcamiow@5w@bEldo_vcamdvcamd 5w@bEldo_vcn18regulator-fixedvcn18w@5w@bldo_vfe28regulator-fixedvfe28*5*bldo_vsram_proc11 vsram_proc11 5Mjb~ldo_vcn28regulator-fixedvcn28*5*bldo_vsram_others vsram_others 5Mjb~ldo_vsram_gpu vsram_gpu 5Mjb+ldo_vxo22regulator-fixedvxo22!5!bx~ldo_vefusevefuse5bldo_vaux18regulator-fixedvaux18w@5w@bldo_vmchvmch,@ 52Zb<ldo_vbif28regulator-fixedvbif28*5*bldo_vsram_proc12 vsram_proc12 5Mjb~ldo_vcama1vcama1w@5-bEldo_vemcvemc,@ 52Zb<hldo_vio28regulator-fixedvio28*5*bldo_va12regulator-fixedva12O5Ob~ldo_vrf18regulator-fixedvrf18w@5w@bxldo_vcn33_bt vcn33_bt2Z55gbldo_vcn33_wifi vcn33_wifi2Z55gbldo_vcama2vcama2w@5-bEldo_vmcvmcw@52Zb<ldo_vldo28vldo28*5-bldo_vaud28regulator-fixedvaud28*5*b2ldo_vsim2vsim2)25)2bmt6358rtcmediatek,mt6358-rtcmt6358keysmediatek,mt6358-keyspowerthomefkeyboard@10010000mediatek,mt6779-keypad' (kpd Pdisabledscp@10500000mediatek,mt8183-scp 'P\ sramcfg )main3Pokaydefault4cros_ecgoogle,cros-ec-rpmsgcros-ec-rpmsgtimer@10017000,mediatek,mt8183-timermediatek,mt6765-timer'p 5iommu@10205000mediatek,mt8183-m4u' P 6789:;<smailbox@10238000mediatek,mt8183-gce'#@ )gcerauxadc@11001000.mediatek,mt8183-auxadcmediatek,mt8173-auxadc')#main)PokayRserial@11002000*mediatek,mt8183-uartmediatek,mt6577-uart'  [ () baudbusPokaydefault=serial@11003000*mediatek,mt8183-uartmediatek,mt6577-uart'0 \ () baudbusPokaydefaultsleep>;?E\*ybluetoothdefault@Pokayqcom,qca6174-bt Y*xAfnvm_00440302_i2s.binserial@11004000*mediatek,mt8183-uartmediatek,mt6577-uart'@ ] () baudbus Pdisabledi2c@11005000mediatek,mt8183-i2c 'P W)W)* maindma+PokaydefaultB9i2c@11007000mediatek,mt8183-i2c 'p Q) )* maindma+PokaydefaultC9touchscreen@10elan,ekth3500'defaultD E* t*i2c@11008000mediatek,mt8183-i2c ' R) )*)G maindmaarb+PokaydefaultE9anx7625@58analogix,anx7625'XdefaultF Y*- t*IGHI+port@0'endpointJuport@1'endpointKi2c@11009000mediatek,mt8183-i2c ' S) )*)I maindmaarb+PokaydefaultL9trackpad@15elan,ekth3000'defaultM E*trackpad@2c hid-over-i2c', defaultM E*spi@1100a000mediatek,mt8183-spi+' x6)parent-clksel-clkspi-clkPokaydefaultN *Vcr50@0 google,cr50'B@defaultO *svs@1100b000mediatek,mt8183-svs' ) mainPQ( svs-calibration-datat-calibration-datathermal@1100b000mediatek,mt8183-thermal') )# thermauxadc4) L;RKSQ calibration-dataxpwm@1100e000mediatek,mt8183-disp-pwm' _Tm)5mainmmPokaydefaultU|pwm@11006000mediatek,mt8183-pwm'`m0))))))topmainpwm1pwm2pwm3pwm4i2c@1100f000mediatek,mt8183-i2c ' T) )* maindma+PokaydefaultV9spi@11010000mediatek,mt8183-spi+' |6)8parent-clksel-clkspi-clkPokaydefaultWflash@0winbond,w25q64dwjedec,spi-nor'}x@i2c@11011000mediatek,mt8183-i2c ' U)9)* maindma+PokaydefaultX9spi@11012000mediatek,mt8183-spi+'  6);parent-clksel-clkspi-clkPokaydefaultYcros-ec@0google,cros-ec-spi'- *defaultZi2c-tunnelgoogle,cros-ec-i2c-tunnelx+sbs-battery@bsbs,sbs-battery' extcon0google,extcon-usbc-cros-eccbasgoogle,cros-cbastypecgoogle,cros-ec-typec+connector@0usb-c-connector'dualhostsinkkeyboard-controllergoogle,cros-ec-keyb  D';<=>?@A B CD}0Y1 d"#(  \V |})   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ipwmgoogle,cros-ec-pwmm Pdisabledspi@11013000mediatek,mt8183-spi+'0 6)<parent-clksel-clkspi-clk Pdisableddefault[i2c@11014000mediatek,mt8183-i2c '@ )H)*)G maindmaarb+ Pdisabledi2c@11015000mediatek,mt8183-i2c 'P )J)*)I maindmaarb+ Pdisabledi2c@11016000mediatek,mt8183-i2c '` V)D)*)E maindmaarb+Pokaydefault\9ts3a227e@3bdefault] ti,ts3a227e'; *Pokayi2c@11017000mediatek,mt8183-i2c 'p )F)*)E maindmaarb+ Pdisabledspi@11018000mediatek,mt8183-spi+' 6)Kparent-clksel-clkspi-clk Pdisableddefault^spi@11019000mediatek,mt8183-spi+' 6)Lparent-clksel-clkspi-clk Pdisableddefault_i2c@1101a000mediatek,mt8183-i2c ' X)b)* maindma+ Pdisabledi2c@1101b000mediatek,mt8183-i2c ' Y)c)* maindma+ Pdisabledusb@11201000#mediatek,mt8183-mtu3mediatek,mtu3 ' . > macippc H4`a)=)Zsys_ckref_ck 9b e+IPokayPhostXcusb@11200000'mediatek,mt8183-xhcimediatek,mtk-xhci' mac I)=)Zsys_ckref_ckPokay+Xchub@1 usb5e3,610'audio-controller@11220000 mediatek,mt8183-audiosyssyscon'"emt8183-afe-pcmmediatek,mt8183-audio 4d faudiosys_TDeeeee eeeee e e e ee)/)7  0HLKOtuvwxyz{|}~(waud_afe_clkaud_dac_clkaud_dac_predis_clkaud_adc_clkaud_adc_adda6_clkaud_apll22m_clkaud_apll24m_clkaud_apll1_tuner_clkaud_apll2_tuner_clkaud_i2s1_bclk_swaud_i2s2_bclk_swaud_i2s3_bclk_swaud_i2s4_bclk_swaud_tdm_clkaud_tml_clkaud_infra_clkmtkaif_26m_clktop_mux_audiotop_mux_aud_intbustop_syspll_d2_d4top_mux_aud_1top_apll1_cktop_mux_aud_2top_apll2_cktop_mux_aud_eng1top_apll1_d8top_mux_aud_eng2top_apll2_d8top_i2s0_m_seltop_i2s1_m_seltop_i2s2_m_seltop_i2s3_m_seltop_i2s4_m_seltop_i2s5_m_seltop_apll12_div0top_apll12_div1top_apll12_div2top_apll12_div3top_apll12_div4top_apll12_divbtop_clk26m_clkrI2S2}I2S5~mmc@11230000mediatek,mt8183-mmc '# M))sourcehclksource_cgPokaydefaultstate_uhsf;g (hi U0mmc@11240000mediatek,mt8183-mmc '$ N ))(sourcehclksource_cgPokaydefaultstate_uhsj;klm>n IRcp~0  V+qca-wifi@1 qcom,ath10k' GO_FENNEL14dsi-phy@11e50000mediatek,mt8183-mipi-tx'S &mipi_tx0_pllo calibration-dataPokaytefuse@11f10000%mediatek,mt8183-efusemediatek,efuse'+calib@180' Qcalib@190' ocalib@580'dPt-phy@11f40000.mediatek,mt8183-tphymediatek,generic-tphy-v2+IPokayusb-phy@0'(refPokay`usb-phy@700' (refPokayasyscon@13000000mediatek,mt8183-mfgcfgsyscon'pgpu@13040000&mediatek,mt8183-maliarm,mali-bifrost'@$ jobmmugpup_TTTcore0core1core2q , +syscon@14000000mediatek,mt8183-mmsyssyscon' rr %r-dma-controller0@14001000mediatek,mt8183-mdp3-rdma' %r =_T- - Qs rr Xmdp3-rsz0@14003000mediatek,mt8183-mdp3-rsz'0 %r0 =-mdp3-rsz1@14004000mediatek,mt8183-mdp3-rsz'@ %r@ =-dma-controller@14005000mediatek,mt8183-mdp3-wrot'P %rP =!_T- Qs Xmdp3-wdma@14006000mediatek,mt8183-mdp3-wdma'` %r` ="_T-) Qsovl@14008000mediatek,mt8183-disp-ovl' _T- Qs %rovl@14009000mediatek,mt8183-disp-ovl-2l' _T- Qs %rovl@1400a000mediatek,mt8183-disp-ovl-2l' _T- Qs %rrdma@1400b000mediatek,mt8183-disp-rdma' _T- Qs c %rrdma@1400c000mediatek,mt8183-disp-rdma' _T- Qs c %rcolor@1400e0006mediatek,mt8183-disp-colormediatek,mt8173-disp-color' _T- %rccorr@1400f000mediatek,mt8183-disp-ccorr' _T- %raal@14010000mediatek,mt8183-disp-aal' _T- %rgamma@14011000mediatek,mt8183-disp-gamma' _T- %rdither@14012000mediatek,mt8183-disp-dither'  _T- %r dsi@14014000mediatek,mt8183-dsi'@ _T-- tenginedigitalhs4-4t {dphyPokayportsportendpointuJmutex@14016000mediatek,mt8183-disp-mutex'` _T = %r`larb@14017000mediatek,mt8183-smi-larb'p.--_Tapbsmi6smi@14019000mediatek,mt8183-smi-common' ----apbsmigals0gals1_T.mdp3-ccorr@1401c000mediatek,mt8183-mdp3-ccorr' %r =1-+syscon@15020000mediatek,mt8183-imgsyssyscon'0larb@15021000mediatek,mt8183-smi-larb'.0 0 - apbsmigals_T ;larb@1502f000mediatek,mt8183-smi-larb'.00-  apbsmigals_T 8syscon@16000000mediatek,mt8183-vdecsyssyscon'vlarb@16010000mediatek,mt8183-smi-larb'.vvapbsmi_T 7syscon@17000000mediatek,mt8183-vencsyssyscon'wlarb@17010000mediatek,mt8183-smi-larb'.wwapbsmi_T :venc_jpg@17030000+mediatek,mt8183-jpgencmediatek,mtk-jpgenc'  Qss_T wjpgencsyscon@19000000 mediatek,mt8183-ipu_connsyscon'1syscon@19010000mediatek,mt8183-ipu_adlsyscon'syscon@19180000!mediatek,mt8183-ipu_core0syscon'syscon@19280000!mediatek,mt8183-ipu_core1syscon'(syscon@1a000000mediatek,mt8183-camsyssyscon'/larb@1a001000mediatek,mt8183-smi-larb'.//- apbsmigals_T<larb@1a002000mediatek,mt8183-smi-larb' ./ / - apbsmigals_T9thermal-zonescpu-thermal d  x tripstrip-point0   "passivetrip-point1 8 "passiveycpu-crit 8  "criticalcooling-mapsmap0 y0  map1 y0  tzts1   x tripscooling-mapstzts2   x tripscooling-mapstzts3   x tripscooling-mapstzts4   x tripscooling-mapstzts5   x tripscooling-mapstztsABB   x tripscooling-mapstboard1   ztboard2   {chosen serial0:115200n8backlight_lcd0pwm-backlight |  } Y* ! 3 J@Pokaymemory@40000000memory'@oscillator1 fixed-clock9&clk32kAregulator0regulator-fixed it6505_pp18w@5w@ c* hregulator1regulator-fixed lcd_pp33002Z52Z~ {regulator2regulator-fixed bl_pp5000LK@5LK@~ {}regulator3regulator-fixed mmc1_power2Z52Zlregulator4regulator-fixedmmc1_iow@5w@mregulator5regulator-fixed pp1800_alw~ {w@5w@regulator6regulator-fixed pp3300_alw~ {2Z52Zreserved-memory+Imemory@50000000shared-dma-pool'P 3mt8183-sound ~'defaultaud_tdm_out_onaud_tdm_out_off; Pokay 'mediatek,mt8183_mt6358_ts3a227_rt1015pbt-sco linux,bt-scowifi-pwrseqmmc-pwrseq-simpledefault t*wnwifi-wakeup gpio-keysdefaultbutton-wowlan Wake on WiFi `*q thermal-sensor1generic-adc-thermal R sensor-channel x'.:N lau07@{P(`ap/$8L_sy(hZ8NCH;zthermal-sensor2generic-adc-thermal R sensor-channel x'.:N lau07@{P(`ap/$8L_sy(hZ8NCH;{panel auo,b116xw03  portendpointKpp1200-mipibrdgregulator-fixedpp1200_mipibrdgdefault h { c*6Gpp1800-mipibrdgregulator-fixedpp1800_mipibrdgdefault h { c*$Hpp3300-panelregulator-fixed pp3300_panel2Z52Zdefault h { c*#vddio-mipibrdgregulator-fixedvddio_mipibrdgdefault h { c*%Ivolume-buttons gpio-keysdefaultbutton-volume-down Volume Down r d `*button-volume-up Volume Up s d `*rt1015prealtek,rt1015p ** compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9i2c10i2c11ovl0ovl-2l0ovl-2l1rdma0rdma1serial0mmc0mmc1opp-sharedphandleopp-hzopp-microvoltrequired-oppsclocksclock-namesoperating-points-v2proc-supplycpudevice_typeregenable-methodcapacity-dmips-mhzcpu-idle-statesdynamic-power-coefficient#cooling-cellsmediatek,ccientry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usinterrupts#clock-cellsclock-divclock-multclock-output-namesclock-frequencyrangesstatus#interrupt-cellsinterrupt-controllermediatek,broken-save-restore-fwaffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangesgpio-line-namespinmuxdrive-strengthinput-enablebias-pull-downoutput-lowbias-pull-upmediatek,pull-up-advmediatek,drive-strength-advbias-disablemediatek,pull-down-advoutput-highoutput-enable#power-domain-cellsmediatek,infracfgdomain-supplymediatek,smimediatek,dmic-modeAvdd-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-enable-ramp-delayregulator-always-onregulator-allowed-modeslinux,keycodeswakeup-sourcememory-regionpinctrl-namespinctrl-0mediatek,rpmsg-namemediatek,larbs#iommu-cells#mbox-cells#io-channel-cellspinctrl-1interrupts-extendedenable-gpiosfirmware-namereset-gpiospanel_flagsvdd10-supplyvdd18-supplyvdd33-supplyremote-endpointhid-descr-addrmediatek,pad-selectcs-gpiosspi-max-frequencynvmem-cellsnvmem-cell-names#thermal-sensor-cellsresetsmediatek,auxadcmediatek,apmixedsyspower-domains#pwm-cellsgoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countgoogle,usb-port-idpower-roledata-roletry-power-rolekeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymapphysmediatek,syscon-wakeupdr_modevusb33-supplyreset-namesi2s3-sharei2s0-sharebus-widthcap-mmc-highspeedmmc-hs200-1_8vmmc-hs400-1_8vcap-mmc-hw-resetno-sdiono-sdhs400-ds-delayvmmc-supplyvqmmc-supplyassigned-clocksassigned-clock-parentsnon-removablemmc-pwrseqdrv-typecap-sd-highspeedsd-uhs-sdr50sd-uhs-sdr104keep-power-in-suspendcap-sdio-irqno-mmcqcom,ath10k-calibration-variant#phy-cellsmediatek,discthinterrupt-namespower-domain-namesmali-supplysram-supplymboxesmediatek,gce-client-regmediatek,gce-eventsiommus#dma-cellsmediatek,rdma-fifo-sizephy-namespolling-delay-passivepolling-delaythermal-sensorssustainable-powertemperaturehysteresistripcooling-devicecontributionstdout-pathpwmspower-supplybrightness-levelsnum-interpolated-stepsdefault-brightness-levelgpioenable-active-highregulator-boot-onno-mapmediatek,platformpinctrl-2mediatek,headset-codeclabellinux,codeio-channelsio-channel-namestemperature-lookup-tablebacklightdebounce-intervalsdb-gpios