8 ( $mediatek,mt6795-evbmediatek,mt6795 +!7MediaTek MT6795 Evaluation Boardpsci arm,psci-0.2=smccpus+cpu@0Dcpuarm,cortex-a53Ppsci^cpu@1Dcpuarm,cortex-a53Ppsci^cpu@2Dcpuarm,cortex-a53Ppsci^cpu@3Dcpuarm,cortex-a53Ppsci^cpu@100Dcpuarm,cortex-a53Ppsci^cpu@101Dcpuarm,cortex-a53Ppsci^cpu@102Dcpuarm,cortex-a53Ppsci^cpu@103Dcpuarm,cortex-a53Ppsci^dummy13m fixed-clockb]@rdummy32k fixed-clockb}rdummy26m fixed-clockbrtimerarm,armv8-timer 0   intpol-controller@10200620.mediatek,mt6795-sysirqmediatek,mt6577-sysirq ^  interrupt-controller@10221000 arm,gic-400 @^"" "@ "` serial@11002000*mediatek,mt6795-uartmediatek,mt6577-uart^  [okayserial@11003000*mediatek,mt6795-uartmediatek,mt6577-uart^0 \ disabledserial@11004000*mediatek,mt6795-uartmediatek,mt6577-uart^@ ] disabledserial@11005000*mediatek,mt6795-uartmediatek,mt6577-uart^P ^ disabledaliases/serial@11002000/serial@11003000/serial@11004000/serial@11005000memory@40000000Dmemory^@chosenserial0:921600n8 compatibleinterrupt-parent#address-cells#size-cellsmodelmethoddevice_typeenable-methodregclock-frequency#clock-cellslinux,phandleinterruptsinterrupt-controller#interrupt-cellsclocksstatusserial0serial1serial2serial3stdout-path