8ʸ( ʀ!pine64,rockpro64rockchip,rk3399 +7Pine64 RockPro64aliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/dwmmc@fe310000y/dwmmc@fe320000~/sdhci@fe330000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid  4 ?cpu@1cpuarm,cortex-a53pscid  4 ?cpu@2cpuarm,cortex-a53pscid  4 ?cpu@3cpuarm,cortex-a53pscid  4 ?cpu@100cpuarm,cortex-a72psci   4?cpu@101cpuarm,cortex-a72psci   4?idle-statesGpscicpu-sleeparm,idle-stateTe|x? cluster-sleeparm,idle-stateTe|? display-subsystemrockchip,display-subsystempmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6xin24mamba simple-bus+dma-controller@ff6d0000arm,pl330arm,primecellm@   apb_pclk?Ndma-controller@ff6e0000arm,pl330arm,primecelln@   apb_pclk?=pcie@f8000000rockchip,rk3399-pcie $axi-baseapb-base+.?K Gaclkaclk-perfhclkpm0123Usyslegacycliente`x ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-388(coremgmtmgmt-stickypipepmpclkaclkokay defaultinterrupt-controller".?ethernet@fe300000rockchip,rk3399-gmac0 Umacirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac7 stmmacethEokayRbyinputrgmiidefault  'P(dwmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@р Mbiuciuciu-driveciu-sample7yreset disableddwmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@AрR  Lbiuciuciu-driveciu-sample7zresetokay 0 9default !"#sdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 DRN Nclk_xinclk_ahbemmc_cardclock$ phy_arasan7Zokaykz?usb@fe380000 generic-ehci8%usbhostarbiterutmi&usbokayusb@fe3a0000 generic-ohci:%usbhostarbiterutmi&usbokayusb@fe3c0000 generic-ehci<'usbhostarbiterutmi(usbokayusb@fe3e0000 generic-ohci> 'usbhostarbiterutmi(usbokayusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otgokayusb@fe800000 snps,dwc3irefbus_earlysuspendotg)*usb2-phyusb3-phy utmi_wide 7okayusb@fe900000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otgokayusb@fe900000 snps,dwc3nrefbus_earlysuspendhost+,usb2-phyusb3-phy utmi_wide 7okaydp@fec00000rockchip,rk3399-cdn-dp Rr  ruocore-clkpclkspdifgrf-.7 HJspdifdptxapbcoreE. disabledportsport+endpoint@0?/?endpoint@1?0?interrupt-controller@fee00000 arm,gic-v3.+"P  ?interrupt-controller@fee20000arm,gic-v3-itsO?ppi-partitionsinterrupt-partition-0^?interrupt-partition-1^?saradc@ff100000rockchip,rk3399-saradc>gPesaradcapb_pclk saradc-apbokayy1i2c@ff110000rockchip,rk3399-i2cRA AU i2cpclk;default2+okay,i2c@ff120000rockchip,rk3399-i2cRB BV i2cpclk#default3+ disabledi2c@ff130000rockchip,rk3399-i2cRC CW i2cpclk"default4+okay?i2c@ff140000rockchip,rk3399-i2cRD DX i2cpclk&default5+ disabledi2c@ff150000rockchip,rk3399-i2cRE EY i2cpclk%default6+ disabledi2c@ff160000rockchip,rk3399-i2cRF FZ i2cpclk$default7+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkcdefault89okayserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkbdefault: disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkddefault;okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclkedefault< disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkD= = txrxdefault>?@A+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk5= = txrxdefaultBCDE+okayflash@0jedec,spi-norspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4==txrxdefaultFGHI+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkC==txrxdefaultJKLM+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclkNN txrxdefaultOPQR7+ disabledthermal-zonescpudStripscpu_alert0 p,passive?Tcpu_alert1 $,passive?Ucpu_crit s, criticalcooling-mapsmap07T<map17UH<gpudStripsgpu_alert0 $,passivegpu_crit s, criticaltsadc@ff260000rockchip,rk3399-tsadc&aRO qOdtsadcapb_pclk tsadc-apbEKsinitdefaultsleepVbWlVvokay?Sqos@ffa58000syscon ?_qos@ffa5c000syscon ?`qos@ffa60080syscon qos@ffa60100syscon qos@ffa60180syscon qos@ffa70000syscon ?cqos@ffa70080syscon ?dqos@ffa74000syscon@ ?aqos@ffa76000syscon` ?bqos@ffa90000syscon ?eqos@ffa98000syscon ?Xqos@ffaa0000syscon ?fqos@ffaa0080syscon ?gqos@ffaa8000syscon ?hqos@ffaa8080syscon ?iqos@ffab0000syscon ?Yqos@ffab0080syscon ?Zqos@ffab8000syscon ?[qos@ffac0000syscon ?\qos@ffac0080syscon ?]qos@ffac8000syscon ?jqos@ffac8080syscon ?kqos@ffad0000syscon ?lqos@ffad8080syscon qos@ffae0000syscon ?^power-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller+?pd_iep@34"Xpd_rga@33!YZpd_vcodec@31[pd_vdu@32 \]pd_gpu@35#^pd_edp@25lpd_emmc@23_pd_gmac@22f`pd_sd@27Lapd_sdioaudio@28bpd_usb3@24cdpd_vio@15+pd_hdcp@21repd_isp0@19fgpd_isp1@20hipd_tcpc0@RK3399_PD_TCPC0~}pd_tcpc1@RK3399_PD_TCPC1 pd_vo@16+pd_vopb@17jkpd_vopl@18lsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2+?io-domains&rockchip,rk3399-pmu-io-voltage-domainokaymspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5nnspiclkapb_pclk<defaultopqr+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7nn"baudclkapb_pclkfdefaults disabledi2c@ff3c0000rockchip,rk3399-i2c<Rn  n n i2cpclk9defaultt+okaypmic@1brockchip,rk808  xin32krk808-clkout2defaultu v#v/v;vGvSv_wkvwvvwx?regulatorsDCDC_REG1 vdd_center qpqregulator-state-mem%DCDC_REG2 vdd_cpu_l qpq? regulator-state-mem%DCDC_REG3vcc_ddrregulator-state-mem>DCDC_REG4vcc_1v8w@w@?regulator-state-mem>Vw@LDO_REG1 vcc1v8_dvpw@w@?regulator-state-mem%LDO_REG2 vcc3v0_touch--regulator-state-mem%LDO_REG3 vcca_1v8w@w@?xregulator-state-mem>Vw@LDO_REG4 vcc_sdiow@-?regulator-state-mem>V-LDO_REG5vcca3v0_codec--regulator-state-mem%LDO_REG6vcc_1v5``regulator-state-mem>V`LDO_REG7vcca1v8_codecw@w@regulator-state-mem%LDO_REG8vcc_3v0--?mregulator-state-mem>V-SWITCH_REG1 vcc3v3_s3?regulator-state-mem%SWITCH_REG2 vcc3v3_s0regulator-state-mem%regulator@40silergy,syr827@rdefaulty vdd_cpu_b 4`v?regulator-state-mem%regulator@41silergy,syr828Ardefaultzvdd_gpu 4`v?regulator-state-mem%i2c@ff3d0000rockchip,rk3399-i2c=Rn  n n i2cpclk8default{+okayXtypec-portc@22 fcs,fusb302" |default}~okayi2c@ff3e0000rockchip,rk3399-i2c>Rn  n n i2cpclk:default+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefaultnpwmokaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefaultnpwmokay?pwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB defaultnpwmokay?pwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0defaultnpwm disabledvideo-codec@ff650000rockchip,rk3399-vpue rq Uvepuvdpu aclkhclk7iommu@ff650800rockchip,iommue@sUvpu_mmu aclkiface7?iommu@ff660480rockchip,iommu f@f@u Uvdec_mmu aclkiface disablediommu@ff670800rockchip,iommug@*Uiep_mmu aclkiface disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkjgi coreaxiahb7!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cpmu-clock-controller@ff750000rockchip,rk3399-pmucruuERn(J?nclock-controller@ff760000rockchip,rk3399-cruvER@BCx@#g/;рxh<4`#Fׄׄ ?syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+?io-domains"rockchip,rk3399-io-voltage-domainokaymmusb2-phy@e450rockchip,rk3399-usb2phyP{phyclkclk_usbphy0_480mokay?%host-port  Ulinestateokay?&otg-port 0ghjUotg-bvalidotg-idlinestateokay?)usb2-phy@e460rockchip,rk3399-usb2phy`|phyclkclk_usbphy1_480mokay?'host-port  Ulinestateokay?(otg-port 0lmoUotg-bvalidotg-idlinestateokay?+phy@f780rockchip,rk3399-emmc-phy$emmcclk okay?$pcie-phyrockchip,rk3399-pcie-phyrefclk  2phyokay?phy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-refR~7Luphyuphy-pipeuphy-tcphyEokaydp-port ?-usb3-port ?*phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-refR7 Muphyuphy-pipeuphy-tcphyEokaydp-port ?.usb3-port ?,watchdog@ff848000 snps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifBNtx mclkhclkUdefault7. disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2sE'NNtxrxi2s_clki2s_hclkVdefault7.okay ( Ci2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(NNtxrxi2s_clki2s_hclkWdefault7.okay ( Ci2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)NNtxrxi2s_clki2s_hclkX7.okay?vop@ff8f0000rockchip,rk3399-vop-lit>wRׄaclk_vopdclk_vophclk_vop7 axiahbdclkokayport+?endpoint@0??endpoint@1??endpoint@2??endpoint@3??endpoint@4??0iommu@ff8f3f00rockchip,iommu?w Uvopl_mmu aclkiface7okay?vop@ff900000rockchip,rk3399-vop-big>vRׄaclk_vopdclk_vophclk_vop7 axiahbdclkokayport+?endpoint@0??endpoint@1??endpoint@2??endpoint@3??endpoint@4??/iommu@ff903f00rockchip,iommu?v Uvopb_mmu aclkiface7okay?iommu@ff914000rockchip,iommu @P+ Uisp0_mmu aclkiface7 ]iommu@ff924000rockchip,iommu @P, Uisp1_mmu aclkiface7 ]hdmi-soundsimple-audio-card xi2s  hdmi-soundokaysimple-audio-card,cpu simple-audio-card,codec hdmi@ff940000rockchip,rk3399-dw-hdmi(tqopiahbisfrvpllgrfcec7E.okay default?portsport+endpoint@0??endpoint@1??mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrf7apbE+ disabledports+port@0+endpoint@0??endpoint@1??mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrf7apbE+ disabledports+port@0+endpoint@0??endpoint@1??edp@ff970000rockchip,rk3399-edp jlo dppclkgrfdefault7dpE disabledports+port@0+endpoint@0??endpoint@1??gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 Ujobmmugpu7#okay  pinctrlrockchip,rk3399-pinctrlE +gpio0@ff720000rockchip,gpio-bankrn  ".? gpio1@ff730000rockchip,gpio-banksn  ".?|gpio2@ff780000rockchip,gpio-bankxP  ".?gpio3@ff788000rockchip,gpio-bankxQ  ".?gpio4@ff790000rockchip,gpio-bankyR  ".?pcfg-pull-up ?pcfg-pull-down ?pcfg-pull-none )?pcfg-pull-none-12ma ) 6 ?pcfg-pull-none-13ma ) 6 ?pcfg-pull-none-18ma ) 6pcfg-pull-none-20ma ) 6pcfg-pull-up-2ma  6pcfg-pull-up-8ma  6pcfg-pull-up-18ma  6pcfg-pull-up-20ma  6pcfg-pull-down-4ma  6pcfg-pull-down-8ma  6pcfg-pull-down-12ma  6 pcfg-pull-down-18ma  6pcfg-pull-down-20ma  6pcfg-output-high Epcfg-output-low Qclockclk-32k \edpedp-hpd \?gmacrgmii-pins \    ?rmii-pins \     i2c0i2c0-xfer \?ti2c1i2c1-xfer \?2i2c2i2c2-xfer \?3i2c3i2c3-xfer \?4i2c4i2c4-xfer \  ?{i2c5i2c5-xfer \  ?5i2c6i2c6-xfer \  ?6i2c7i2c7-xfer \?7i2c8i2c8-xfer \?i2s0i2s0-2ch-bus` \i2s0-8ch-bus \?i2s1i2s1-2ch-busP \?sdio0sdio0-bus1 \sdio0-bus4@ \sdio0-cmd \sdio0-clk \sdio0-cd \sdio0-pwr \sdio0-bkpwr \sdio0-wp \sdio0-int \sdmmcsdmmc-bus1 \sdmmc-bus4@ \   ?#sdmmc-clk \ ?!sdmmc-cmd \ ?"sdmmc-cd \sdmmc-wp \sleepap-pwroff \ddrio-pwroff \spdifspdif-bus \?spdif-bus-1 \spi0spi0-clk \?>spi0-cs0 \?Aspi0-cs1 \spi0-tx \??spi0-rx \?@spi1spi1-clk \ ?Bspi1-cs0 \ ?Espi1-rx \?Dspi1-tx \?Cspi2spi2-clk \ ?Fspi2-cs0 \ ?Ispi2-rx \ ?Hspi2-tx \ ?Gspi3spi3-clk \?ospi3-cs0 \?rspi3-rx \?qspi3-tx \?pspi4spi4-clk \?Jspi4-cs0 \?Mspi4-rx \?Lspi4-tx \?Kspi5spi5-clk \?Ospi5-cs0 \?Rspi5-rx \?Qspi5-tx \?Ptestclktest-clkout0 \test-clkout1 \test-clkout2 \tsadcotp-gpio \?Votp-out \?Wuart0uart0-xfer \?8uart0-cts \?9uart0-rts \uart1uart1-xfer \  ?:uart2auart2a-xfer \ uart2buart2b-xfer \uart2cuart2c-xfer \?;uart3uart3-xfer \?<uart3-cts \uart3-rts \uart4uart4-xfer \?suarthdcpuarthdcp-xfer \pwm0pwm0-pin \?pwm0-pin-pull-down \vop0-pwm-pin \vop1-pwm-pin \pwm1pwm1-pin \?pwm1-pin-pull-down \pwm2pwm2-pin \?pwm2-pin-pull-down \pwm3apwm3a-pin \?pwm3bpwm3b-pin \hdmihdmi-i2c-xfer \hdmi-cec \?pciepci-clkreqn-cpm \pci-clkreqnb-cpm \pcie-perst \?pcie-pwr-en \?buttonspwrbtn \?fusb302xfusb0-int \?}ledswork_led-gpio \ ?diy_led-gpio \?pmicpmic-int-l \ ?uvsel1-gpio \?yvsel2-gpio \?zsdio-pwrseqwifi-enable-h \ ?usb-typecvcc5v0_typec_en \?usb2vcc5v0-host-en \?opp-table0operating-points-v2 j? opp00 uQ | 5 @opp01 u#F | 5opp02 u0, | Popp03 u< |Hopp04 uG |B@opp05 uTfr |*opp-table1operating-points-v2 j? opp00 uQ | 5 @opp01 u#F | 5opp02 u0, | opp03 u< | Yopp04 uG |~opp05 uTfr |opp06 u_" |opp07 ukI |Oopp-table2operating-points-v2?opp00 u  | 5opp01 u@ | 5opp02 uׄ | opp03 ue | Yopp04 u#F |Hopp05 u/ |chosen serial2:1500000n8external-gmac-clock fixed-clocksY@ clkin_gmac?gpio-keys gpio-keys defaultpower d   GPIO Key Power t leds gpio-ledsdefaultwork-led work on  diy-led diy off  pwm-fanpwm-fan  Psdio-pwrseqmmc-pwrseq-simple ext_clockdefault vcc12v-dcinregulator-fixed vcc12v_dcin?vcc1v8-s3regulator-fixed vcc1v8_s3w@w@?1vcc3v3-pcie-regulatorregulator-fixed  |default vcc3v3_pcie?vcc3v3-sysregulator-fixed vcc3v3_sys2Z2Zv?wvcc5v0-host-regulatorregulator-fixed  default vcc5v0_host?vcc5v0-typec-regulatorregulator-fixed  |default vcc5v0_typec?~vcc5v0-sysregulator-fixed vcc5v0_sysLK@LK@?vvcc5v0-usbregulator-fixed vcc5v0_usbLK@LK@?vdd-logpwm-regulator avdd_log 5v compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8mmc0mmc1mmc2serial0serial1serial2serial3serial4cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusep-gpiosnum-lanespinctrl-namespinctrl-0vpcie12v-supplyvpcie3v3-supplyinterrupt-controllerpower-domainsrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthassigned-clock-ratesbus-widthcap-sd-highspeedcd-gpiosdisable-wparasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs200-1_8vnon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controlleraffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdmasdma-namesspi-max-frequencypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supplyvbus-supply#pwm-cellsiommus#iommu-cells#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplyrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowrockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathautorepeatdebounce-intervallabellinux,codedefault-statefan-supplypwmsreset-gpiosenable-active-high