>8;(: ,OrangePi Lite2+2xunlong,orangepi-lite2allwinner,sun50i-h6cpus cpu@02arm,cortex-a53=cpuIMpscicpu@12arm,cortex-a53=cpuIMpscicpu@22arm,cortex-a53=cpuIMpscicpu@32arm,cortex-a53=cpuIMpscidisplay-engine#2allwinner,sun50i-h6-display-engine[ odisabledosc24M_clkv 2fixed-clockn6osc24Mext_osc32k_clkv 2fixed-clock ext_osc32k"psci 2arm,psci-0.2Tsmctimer2arm,armv8-timer0   soc 2simple-bus bus@100000012allwinner,sun50i-h6-de3allwinner,sun50i-a64-de2I@  @clock@02allwinner,sun50i-h6-de3-clkImodbusvmixer@100000 2allwinner,sun50i-h6-de3-mixer-0Ibusmodports port@1Iendpointvideo-codec@1c0e000!2allwinner,sun50i-h6-video-engineI &%6 ahbmodram Ysyscon@3000000G2allwinner,sun50i-h6-system-controlallwinner,sun50i-a64-system-controlI sram@28000 2mmio-sramI  sram-section@072allwinner,sun50i-h6-sram-callwinner,sun50i-a64-sram-cIsram@1a00000 2mmio-sramI    sram-section@082allwinner,sun50i-h6-sram-c1allwinner,sun4i-a10-sram-c1I clock@30010002allwinner,sun50i-h6-ccuI hoscloscioscvdma-controller@30020002allwinner,sun50i-h6-dmaI  ++5 busmbus. efuse@30060002allwinner,sun50i-h6-sidI`watchdog@30090a002allwinner,sun50i-h6-wdtallwinner,sun6i-a31-wdtI  2 odisabledpinctrl@300b0002allwinner,sun50i-h6-pinctrlI0356; apbhosclosc+;G\ rgmii-pinsBmPD0PD1PD2PD3PD4PD5PD7PD8PD9PD10PD11PD12PD13PD19PD20remac{(hdmi-pins mPH8PH9PH10rhdmii2c0-pins mPD25PD26ri2c0i2c1-pinsmPH5PH6ri2c1i2c2-pins mPD23PD24ri2c2mmc0-pinsmPF0PF1PF2PF3PF4PF5rmmc0{ mmc1-pinsmPG0PG1PG2PG3PG4PG5rmmc1{ mmc2-pins5mPC1PC4PC5PC6PC7PC8PC9PC10PC11PC12PC13PC14rmmc2{spdif-tx-pinmPH7rspdifuart0-ph-pinsmPH0PH1ruart0interrupt-controller@3021000 2arm,gic-400 I @ `   G\mmc@402000012allwinner,sun50i-h6-mmcallwinner,sun50i-a64-mmcIC@ahbmmcahb #default ookay   mmc@402100012allwinner,sun50i-h6-mmcallwinner,sun50i-a64-mmcIDAahbmmcahb $default  odisabled mmc@402200032allwinner,sun50i-h6-emmcallwinner,sun50i-a64-emmcI EBahbmmcahb %default odisabled serial@50000002snps,dw-apb-uartI Fookaydefaultserial@50004002snps,dw-apb-uartI G odisabledserial@50008002snps,dw-apb-uartI H odisabledserial@5000c002snps,dw-apb-uartI  I odisabledi2c@500200002allwinner,sun50i-h6-i2callwinner,sun6i-a31-i2cI  Jdefault odisabled i2c@500240002allwinner,sun50i-h6-i2callwinner,sun6i-a31-i2cI$ Kdefault odisabled i2c@500280002allwinner,sun50i-h6-i2callwinner,sun6i-a31-i2cI( Ldefault odisabled ethernet@502000032allwinner,sun50i-h6-emacallwinner,sun50i-a64-emacI macirq! stmmacethT stmmaceth odisabledmdio2snps,dwmac-mdio spdif@50930002allwinner,sun50i-h6-spdifI 0 cb apbspdif)txdefault odisabledusb@510000022allwinner,sun50i-h6-musballwinner,sun8i-a33-musbIt5 mc(-usb7ookay>otgphy@51004002allwinner,sun50i-h6-usb-phyI$1Fphy_ctrlpmu0pmu3ilusb0_phyusb3_phy,.usb0_resetusb3_resetookayP[ m~usb@5101000&2allwinner,sun50i-h6-ehcigeneric-ehciI oqh02ookayusb@5101400&2allwinner,sun50i-h6-ohcigeneric-ohciI oh0ookayusb@5311000&2allwinner,sun50i-h6-ehcigeneric-ehciI1 psk14(-usbookayusb@5311400&2allwinner,sun50i-h6-ohcigeneric-ohciI1 pk1(-usbookayhdmi@60000002allwinner,sun50i-h6-dw-hdmiI @0~|{}!iahbisfrtmdscechdcphdcp-bus9> ctrlhdcp(-phydefault odisabledports port@0Iendpointport@1Ihdmi-phy@60100002allwinner,sun50i-h6-hdmi-phyI~|busmod8phyPtcon-top@65100002allwinner,sun50i-h6-tcon-topIQ bustcon-tv0 tcon-top-tv0:rstvports port@0 Iendpoint@0Iport@1 Iendpoint@2I port@4 Iendpoint@0I!port@5Iendpointlcd-controller@651500082allwinner,sun50i-h6-tcon-tvallwinner,sun8i-r40-tcon-tvIQP B ahbtcon-ch1<lcdports port@0Iendpoint port@1 Iendpoint@1I!rtc@70000002allwinner,sun50i-h6-rtcIefosc32kosc32k-outiosc"v clock@70100002allwinner,sun50i-h6-r-ccuI hoscloscioscpll-periphv#watchdog@702040002allwinner,sun50i-h6-wdtallwinner,sun6i-a31-wdtI  ginterrupt-controller@702100062allwinner,sun50i-h6-r-intcallwinner,sun6i-a31-r-intcG\I `&pinctrl@70220002allwinner,sun50i-h6-r-pinctrlI io# apbhosclosc+;G\'r-i2c-pinsmPL0PL1rs_i2c%r-ir-rx-pinmPL9 rs_cir_rx$ir@7040000.2allwinner,sun50i-h6-irallwinner,sun6i-a31-irI m# # apbir#default$ookayi2c@708140002allwinner,sun50i-h6-i2callwinner,sun6i-a31-i2cI k##default%ookay pmic@36 2x-powers,axp805x-powers,axp806I6&G\regulatorsaldo1$2Z<2ZTvcc-plaldo2$2Z<2Z Tvcc-ac200aldo3$2Z<2Z Tvcc25-drambldo1$w@<w@ Tvcc-bias-pllbldo2$w@<w@Tvcc-efuse-pcie-hdmi-iobldo3$w@<w@ Tvcc-dcxoiobldo4cldo1$2Z<2ZTvcc-3v3 cldo2$2Z<2Z Tvcc-wifi-1cldo3$2Z<2Z Tvcc-wifi-2dcdca$ \<zTvdd-cpudcdcc$ \<zTvdd-gpudcdcd$<Tvdd-sysdcdce$O<O Tvcc-dramswaliasesc/soc/serial@5000000chosenkserial0:115200n8leds 2gpio-ledspowerworangepi:red:power'}onstatusworangepi:green:status'vcc5v2regulator-fixedTvcc-5v$LK@<LK@ interrupt-parent#address-cells#size-cellsmodelcompatibledevice_typeregenable-methodallwinner,pipelinesstatus#clock-cellsclock-frequencyclock-output-namesphandleinterruptsrangesallwinner,sramclocksclock-namesresets#reset-cellsremote-endpointdma-channelsdma-requests#dma-cellsgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellspinsfunctiondrive-strengthbias-pull-upreset-namespinctrl-namespinctrl-0vmmc-supplycd-gpiosbus-widthreg-shiftreg-io-widthsysconinterrupt-names#sound-dai-cellsdmasdma-namesphysphy-namesextcondr_modereg-names#phy-cellsusb0_id_det-gpiosusb0_vbus-supplyusb3_vbus-supplyx-powers,self-working-modevina-supplyvinb-supplyvinc-supplyvind-supplyvine-supplyaldoin-supplybldoin-supplycldoin-supplyregulator-always-onregulator-min-microvoltregulator-max-microvoltregulator-nameserial0stdout-pathlabeldefault-state