.8*(* MangOH Green with WP8548 Module2!swir,mangoh-green-wp8548swir,wp8548qcom,mdm9615,chosen=serial1:115200n8aliases I/soc/gsbi@16200000/spi@16280000#N/soc/gsbi@16300000/serial@16340000#V/soc/gsbi@16400000/serial@16440000 ^/soc/gsbi@16400000/i2c@16480000c/soc/amba/sdcc@12180000memoryhmemorytHcpuscpu@0!arm,cortex-a5hcpuxcpu-pmu!arm,cortex-a5-pmu  clockscxo_board !fixed-clock$regulatorsvsdcc-regulator!regulator-fixed SDCC Power)2)2 soc !simple-busl2-cache@2040000!arm,pl310-cachet *8 interrupt-controller@2000000!qcom,msm-qgic2DYt  timer@200a000!qcom,kpss-timerqcom,msm-timer$tjpinctrl@800000!qcom,mdm9615-pinctrlu DYt@default  gsbi3_pins muxgpio8gpio9gpio10gpio11gsbi3gsbi4_pins muxgpio12gpio13gpio14gpio15gsbi4gsbi5_i2c_pins pin16gpio16 gsbi5_i2cpin17gpio17 gsbi5_i2cgsbi5_uart_pins  muxgpio18gpio19 gsbi5_uartreset_out_pins pinsgpio66gpiogpioext1_pins  pinsgpio2gpiosdc_cd_pins pinsgpio42gpioclock-controller@900000!qcom,gcc-mdm9615t@ clock-controller@28000000!qcom,lcc-mdm9615t(clock-controller@2011000!syscont rng@1a500000 !qcom,prngtP core)Hgsbi@16100000!qcom,gsbi-v1.0.0>t iface Idisabledi2c@16180000!qcom,i2c-qup-v1.1.1t   coreiface Idisabledgsbi@16200000!qcom,gsbi-v1.0.0>t  ifaceIokPspi@16280000!qcom,spi-qup-v1.1.1t( Zn6  coreifaceIokdefault)n6spi@0!swir,mangoh-iotport-spispidevZn6tgsbi@16300000!qcom,gsbi-v1.0.0>t0 ifaceIoklPserial@16340000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmt40   coreifaceIokdefaultgsbi@16400000!qcom,gsbi-v1.0.0>t@ ifaceIoklPi2c@16480000!qcom,i2c-qup-v1.1.1tH )n6  coreifaceIok @defaultmux@71 !nxp,pca9548tqi2c@0ti2c@1ti2c@2ti2c@3thub@8!smsc,usb3503at x   i2c@4tgpio@3eY!semtech,sx1509qt>, uDi2c@5tgpio@3f defaultY!semtech,sx1509qt?, uD  i2c@6tgpio@70Y!semtech,sx1509qtp, uD  i2c@7tserial@16440000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmtD@   coreifaceIok defaultqcom,ssbi@500000 !qcom,ssbitP pmic-arbiterpmic@0!qcom,pm8018qcom,pm8921 YD pwrkey@1c&!qcom,pm8018-pwrkeyqcom,pm8921-pwrkeyt,23= mpp@50!qcom,pm8018-mppqcom,ssbi-mpp,0tPurtc@11d !qcom,pm8018-rtcqcom,pm8921-rtc,'tgpio@150 !qcom,pm8018-gpioqcom,ssbi-gpio,0uusb_vbus_5v_pinsgpio4normaldma@12182000!qcom,bam-v1.3.0t  bn bam_clk dma@12142000!qcom,bam-v1.3.0t  ao bam_clk amba !simple-bussdcc@12180000Iok!arm,pl18xarm,primecell t  h"cmd_irqxn mclkapb_pclk2^l<M_kptxrxx)defaultz  *sdcc@12140000!arm,pl18xarm,primecell  Idisabledt  g"cmd_irqyo mclkapb_pclk2<M^l_kptxrxy)syscon@1a400000!qcom,tcsr-mdm9615syscont@ rpm@108000!qcom,rpm-mdm9615t $"ackerrwakeupregulators!qcom,rpm-pm8018-regulatorss1 0js2( js3w@w@j s4 !j s5ppj l2w@w@l3w@w@l42Z2Zl5+|+|l6w@+|l7:l8OOl9 q0l10l11l12l13:-pl14+|+|lvs1 #address-cells#size-cellsmodelcompatibleinterrupt-parentstdout-pathspi0serial0serial1i2c0mmc0device_typeregnext-level-cacheinterrupts#clock-cellsclock-frequencyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onlinux,phandlerangesarm,data-latencycache-unifiedcache-levelinterrupt-controller#interrupt-cellscpu-offsetgpio-controller#gpio-cellspinctrl-0pinctrl-namespinsfunctiondrive-strengthbias-disablebias-pull-upoutput-highinput-enable#reset-cellsclocksclock-namesassigned-clocksassigned-clock-ratescell-indexstatusqcom,modespi-max-frequencysyscon-tcsrconnect-gpiosintn-gpiosinitial-modeprobe-resetqcom,controller-typedebounceallow-set-timeqcom,drive-strengthpower-source#dma-cellsqcom,eearm,primecell-periphidinterrupt-namesbus-widthcap-sd-highspeedcap-mmc-highspeedvmmc-supplydmasdma-namesdisable-wpcd-gpiosno-1-8-vqcom,ipcvin_lvs1-supplyvdd_l7-supplyvdd_l8-supplyvdd_l9_l10_l11_l12-supplyqcom,switch-mode-frequencybias-pull-down