08H(Sony Xperia Z!sony,xperia-yugaqcom,apq8064,chosen=serial0:115200n8aliases#I/soc/gsbi@1a200000/serial@1a240000memoryQmemory]reserved-memoryasmem@80000000] houwcnss@8f000000]phoIuIcpuscpu@0 !qcom,krait}qcom,kpss-acc-v1Qcpu]o^u^cpu@1 !qcom,krait}qcom,kpss-acc-v1Qcpu]o`u`cpu@2 !qcom,krait}qcom,kpss-acc-v1Qcpu] obubcpu@3 !qcom,krait}qcom,kpss-acc-v1Qcpu]  odudl2-cache!cacheouidle-statesspc#!qcom,idle-state-spcarm,idle-state outhermal-zonescpu-thermal0 0tripstrip0=$IXpassivetrip1=I Xcriticalcpu-thermal1 0ltripstrip0=$IXpassivetrip1=I Xcriticalcpu-thermal2 0tripstrip0=$IXpassivetrip1=I Xcriticalcpu-thermal3 0ltripstrip0=$IXpassivetrip1=I Xcriticalcpu-pmu!qcom,krait-pmu T clockscxo_board !fixed-clock_l$o.u.pxo_board !fixed-clock_lsleep_clk !fixed-clock_lo-u-hwmutex!qcom,sfpb-mutex | ousmem !qcom,smemsmd !qcom,smdmodem@0 T%  disabledq6@1 TZ  disableddsps@3 T @ disabledriva@6 T  disabledsmsm !qcom,smsm    @apps@0]oSuSmodem@1] T&q6@2] TYwcnss@3] ToHuHdsps@4] Tfirmwarescm!qcom,scm-apq8064. 5coresoca !simple-buspinctrl@800000!qcom,apq8064-pinctrl]@AQ T]defaultko$u$sdc4-gpioso>u>pios*ugpio63gpio64gpio65gpio66gpio67gpio68zsdc4sdcc1-pin-activeo7u7clk usdc1_clkcmd usdc1_cmd data usdc1_data sdcc3-pin-activeo;u;clk usdc3_clkcmd usdc3_cmddata usdc3_dataps_holdoumuxugpio78zps_holdi2c1oumuxugpio20gpio21zgsbi1pinconfugpio20gpio21i2c1_pins_sleepoumuxugpio20gpio21zgpiopinconfugpio20gpio21gsbi1_uart_2pinsmuxugpio18gpio19zgsbi1gsbi1_uart_4pinsmuxugpio18gpio19gpio20gpio21zgsbi1i2c2oumuxugpio24gpio25zgsbi2pinconfugpio24gpio25i2c2_pins_sleepoumuxugpio24gpio25zgpiopinconfugpio24gpio25i2c3oumux ugpio8gpio9zgsbi3pinconf ugpio8gpio9i2c3_pins_sleepoumux ugpio8gpio9zgpiopinconf ugpio8gpio9i2c4oumuxugpio12gpio13zgsbi4pinconfugpio12gpio13i2c4_pins_sleepoumuxugpio12gpio13zgpiopinconfugpio12gpio13spi5_defaultoupinmuxugpio51gpio52gpio54zgsbi5pinmux_cszgpiougpio53pinconfugpio51gpio52gpio54pinconf_csugpio53spi5_sleepoupinmuxzgpiougpio51gpio52gpio53gpio54pinconfugpio51gpio52gpio53gpio54i2c6o u muxugpio16gpio17zgsbi6pinconfugpio16gpio17i2c6_pins_sleepo!u!muxugpio16gpio17zgpiopinconfugpio16gpio17gsbi6_uart_2pinsmuxugpio14gpio15zgsbi6gsbi6_uart_4pinsmuxugpio14gpio15gpio16gpio17zgsbi6gsbi7_uart_2pinsmuxugpio82gpio83zgsbi7gsbi7_uart_4pinsmuxugpio82gpio83gpio84gpio85zgsbi7i2c7o"u"muxugpio84gpio85zgsbi7pinconfugpio84gpio85i2c7_pins_sleepo#u#muxugpio84gpio85zgpiopinconfugpio84gpio85riva-fm-activeugpio14gpio15zriva_fmoNuNriva-bt-activeugpio16gpio17zriva_btoMuMriva-wlan-active#ugpio64gpio65gpio66gpio67gpio68 zriva_wlanoLuLhdmi-pinctrloDuDmuxugpio70gpio71gpio72zhdmipinconf_ddcugpio70gpio71pinconf_hpdugpio72gsbi5-uart-pin-activeourxugpio52zgsbi5txugpio51zgsbi5sdcc3-cd-pin-activeugpio26zgpioo<u<syscon@1200000!syscon] o u interrupt-controller@2000000!qcom,msm-qgic2] outimer@200a0005!qcom,kpss-timerqcom,kpss-wdt-apq8064qcom,msm-timer$T]lclock-controller@2088000!qcom,kpss-acc-v1]ouclock-controller@2098000!qcom,kpss-acc-v1] ouclock-controller@20a8000!qcom,kpss-acc-v1] ouclock-controller@20b8000!qcom,kpss-acc-v1] o u power-controller@2089000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2]oupower-controller@2099000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2] oupower-controller@20a9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2] o u power-controller@20b9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2] o u sps-sic-non-secure@12100000!syscon]ougsbi@12440000 disabled!qcom,gsbi-v1.0.0]D. 5ifaceaserial@12450000%!qcom,msm-uartdm-v1.3qcom,msm-uartdm]E@ T.  5coreiface disabledi2c@12460000!qcom,i2c-qup-v1.1.1k]defaultsleep]F T.  5coreifacegsbi@12480000 disabled!qcom,gsbi-v1.0.0]H. 5ifaceai2c@124a0000!qcom,i2c-qup-v1.1.1]Jk]defaultsleep T.  5coreifacegsbi@16200000 disabled!qcom,gsbi-v1.0.0] . 5ifaceai2c@16280000!qcom,i2c-qup-v1.1.1k]defaultsleep]( T.  5coreifacegsbi@16300000 disabled!qcom,gsbi-v1.0.0]0. 5ifaceai2c@16380000!qcom,i2c-qup-v1.1.1k]defaultsleep]8 T.  5coreifacegsbi@1a200000ok!qcom,gsbi-v1.0.0] . 5ifacea serial@1a240000%!qcom,msm-uartdm-v1.3qcom,msm-uartdm]$  T.  5coreifaceok]defaultkspi@1a280000!qcom,spi-qup-v1.1.1]( Tk]defaultsleep.  5coreiface disabledgsbi@16500000 disabled!qcom,gsbi-v1.0.0]P. 5ifaceaserial@16540000%!qcom,msm-uartdm-v1.3qcom,msm-uartdm]TP T.  5coreiface disabledi2c@16580000!qcom,i2c-qup-v1.1.1k !]defaultsleep]X T.  5coreifacegsbi@16600000 disabled!qcom,gsbi-v1.0.0]`. 5ifaceaserial@16640000%!qcom,msm-uartdm-v1.3qcom,msm-uartdm]d` T.  5coreiface disabledi2c@16680000!qcom,i2c-qup-v1.1.1k"#]defaultsleep]h T.  5coreiface disabledrng@1a500000 !qcom,prng]P. 5coressbi@c00000 !qcom,ssbi] pmic-arbiterpmic@1 !qcom,pm8821,$TLmpps@50!qcom,pm8821-mppqcom,ssbi-mpp]P TAQqcom,ssbi@500000 !qcom,ssbi]P pmic-arbiterpmic@0 !qcom,pm8921,$TJo%u%gpio@150 !qcom,pm8921-gpioqcom,ssbi-gpio]P`TAQoguggpio-keys-pin-activeugpio3gpio4gpio29gpio35znormal*:GThofufmpps@50!qcom,pm8921-mppqcom,ssbi-mpp]PAQ`Trtc@11d!qcom,pm8921-rtc,%T']~pwrkey@1c!qcom,pm8921-pwrkey],%T23= qfprom@700000 !qcom,qfprom]pacalib]o&u&backup_calib]o'u'clock-controller@900000!qcom,gcc-apq8064]@&'calibcalib_backup_o u clock-controller@28000000!qcom,lcc-apq8064](_clock-controller@4000000!qcom,mmcc-apq8064]_o?u?clock-controller@2011000!syscon]ourpm@108000!qcom,rpm-apq8064] $Tackerrwakeupclock-controller!qcom,rpmcc-apq8064qcom,rpmcc_ouregulators!qcom,rpm-pm8921-regulators((())8(H*W*f+u+s1((0o*u*s2  joOuOs3 0I>oJuJs4w@w@jo(u(s7  0o+u+s8!!jl1l2OOl3..o0u0l4w@w@o1u1l5-p-po9u9l6-p-po)u)l7:-pl8**l9--l10,@ ,@ oPuPl11--l12OOl14w@w@l15w@-pl16**l17l18OOl21l22'@'@l23w@w@l24 q0oKuKl25l26l27l28l29lvs1lvs2oQuQlvs3lvs4lvs5lvs6lvs7usb-switchhdmi-switchncpw@w@jusb@12500000 !qcom,ci-hdrc]PP Td. ~ 5coreiface  @core+ulpi4E,Jusb-phyokayTotgo/u/ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy\.-. 5sleepref/porg0s1o,u,usb@12520000 !qcom,ci-hdrc]RR T. ) ' 5coreiface ) dcore+ulpi4E2Jusb-phy disabledo3u3ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy\.-. 5sleepref3poro2u2usb@12530000 !qcom,ci-hdrc]SS T. , * 5coreiface , ecore+ulpi4E4Jusb-phy disabledo5u5ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy\.-. 5sleepref5poro4u4phy@1b400000!qcom,apq8064-sata-phy disabled]@phy_mem. -5cfg\o6u6sata@29000000!qcom,apq8064-ahcigeneric-ahci disabled]) T(. ; . )5slave_ifaceifacebusrxoobcore_pmalive E6 Jsata-phydma@12402000!qcom,bam-v1.3.0]@  Tb. n5bam_clko8u8dma@12182000!qcom,bam-v1.3.0]  T`. p5bam_clko:u:dma@121c2000!qcom,bam-v1.3.0]  T_. q5bam_clko=u=amba !simple-busasdcc@12400000okay!arm,pl18xarm,primecell]defaultk7]@  Thcmd_irq. x n5mclkapb_pclk88txrx9)(sdcc@12180000!arm,pl18xarm,primecellokay]  Tfcmd_irq. z p5mclkapb_pclk q6::txrx) ?$]defaultk;<sdcc@121c0000!arm,pl18xarm,primecell disabled]  Tecmd_irq. { q5mclkapb_pclkl==txrx]defaultk>syscon@1a400000!qcom,tcsr-apq8064syscon]@ouadreno-3xx@4300000!qcom,adreno-3xx]0kgsl_3d0_reg_memory TP kgsl_3d0_irq)5core_clkiface_clkmem_clkmem_iface_clk .?G??!?HT@@@@@@@@@@ @ @ @ @ @@@@@@@@@@@@@@@@@@AAAAAAAAAA A A A A AAAAAAAAAAAAAAAAAAqcom,gpu-pwrlevels!qcom,gpu-pwrlevelsqcom,gpu-pwrlevel@0[tqcom,gpu-pwrlevel@1[syscon@5700000!syscon]ppoCuCmdss_dsi@4700000!qcom,mdss-dsi-ctrliMDSS DSI CTRL->0 TR]p dsi_ctrl8.????9?T?j?XD5iface_clkbus_clkcore_mmss_clksrc_clkbyte_clkpixel_clkcore_clk ?S?W?8?i oBBBBCEBportsport@0]endpointport@1]endpointdsi-phy@4700200!qcom,dsi-phy-28nm-8960_]ppp\"dsi_plldsi_phydsi_phy_regulator 5iface_clk.?oBuBiommu@7500000!qcom,apq8064-iommu5smmu_pclkiommu_clk.? ?]PT?@oFuFiommu@7600000!qcom,apq8064-iommu5smmu_pclkiommu_clk.? ?]`T=>oGuGiommu@7c00000!qcom,apq8064-iommu5smmu_pclkiommu_clk.? ?!]TEFo@u@iommu@7d00000!qcom,apq8064-iommu5smmu_pclkiommu_clk.? ?!]ToAuApci@1b500000!qcom,pcie-apq8064snps,dw-pcie ]PP `dbielbiparfconfigQpci0a Tmsi$%&'. + . -5coreifacephy( l k j i haxiahbporpciphy disabledhdmi-tx@4a00000!qcom,hdmi-tx-8960]defaultkD]core_physical TO.?>? ?*5core_clkmaster_iface_clkslave_iface_clkEE Jhdmi-phyportsport@0]endpointport@1]endpointhdmi-phy@4a00400!qcom,hdmi-phy-8960]`hdmi_phyhdmi_pll.?5slave_iface_clkoEuEmdp@5100000 !qcom,mdp4] TK0.?M???N?_?`35core_clkiface_clkbus_clklut_clkhdmi_clktv_clk TFFGGportsport@0]endpointport@1]endpointport@2]endpointport@3]endpointriva-pil@3204000!qcom,riva-pil]   @ ccudxepmuH wdogfatalIJK(okay]default kLMNoRuRiris !qcom,wcn3660..5xo)16ODPQQsmd-edge T irivawcnss !qcom,wcnss _WCNSS_CTRLqRbt!qcom,wcnss-btwifi!qcom,wcnss-wlanTtxrx{S S tx-enabletx-rings-emptyetb@1a01000!coresight-etb10arm,primecell]. 5apb_pclkportendpointToVuVtpiu@1a03000!!arm,coresight-tpiuarm,primecell]0. 5apb_pclkportendpointUoWuWreplicator!arm,coresight-replicator. 5apb_pclkportsport@0]endpointVoTuTport@1]endpointWoUuUport@2]endpointXo]u]funnel@1a04000#!arm,coresight-funnelarm,primecell]@. 5apb_pclkportsport@0]endpointYo_u_port@1]endpointZoauaport@4]endpoint[ocucport@5]endpoint\oeueport@8]endpoint]oXuXetm@1a1c000"!arm,coresight-etm3xarm,primecell]. 5apb_pclk^portendpoint_oYuYetm@1a1d000"!arm,coresight-etm3xarm,primecell]. 5apb_pclk`portendpointaoZuZetm@1a1e000"!arm,coresight-etm3xarm,primecell]. 5apb_pclkbportendpointco[u[etm@1a1f000"!arm,coresight-etm3xarm,primecell]. 5apb_pclkdportendpointeo\u\gpio-keys !gpio-keys gpio-keys]defaultkfcamera-focus icamera_focus Bgcamera-snapshoticamera_snapshot Bgvolume-down ivolume_down Bgrvolume-up ivolume_up Bg#s #address-cells#size-cellsmodelcompatibleinterrupt-parentstdout-pathserial0device_typeregrangesno-maplinux,phandleenable-methodnext-level-cacheqcom,accqcom,sawcpu-idle-statescache-levelentry-latency-usexit-latency-usmin-residency-uspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresisinterrupts#clock-cellsclock-frequencysyscon#hwlock-cellsmemory-regionhwlocksqcom,ipcqcom,smd-edgestatusqcom,ipc-1qcom,ipc-2qcom,ipc-3qcom,ipc-4#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsclocksclock-namesgpio-controller#gpio-cellspinctrl-namespinctrl-0pinsfunctiondrive-strenghbias-disablebias-pull-updrive-strengthoutput-highbias-pull-downcpu-offsetregulatorcell-indexsyscon-tcsrpinctrl-1qcom,modeqcom,controller-typedrive-push-pullinput-enablepower-sourceqcom,drive-strengthqcom,pull-up-strengthallow-set-timedebouncenvmem-cellsnvmem-cell-names#reset-cells#thermal-sensor-cellsinterrupt-namesvin_l1_l2_l12_l18-supplyvin_lvs_1_3_6-supplyvin_lvs_4_5_7-supplyvin_ncp-supplyvin_lvs2-supplyvin_l24-supplyvin_l25-supplyvin_l27-supplyvin_l28-supplyregulator-always-onregulator-min-microvoltregulator-max-microvoltqcom,switch-mode-frequencyqcom,force-modeassigned-clocksassigned-clock-ratesresetsreset-namesphy_typeahb-burst-configphysphy-namesdr_mode#phy-cellsv3p3-supplyv1p8-supplyreg-namesports-implemented#dma-cellsqcom,eearm,primecell-periphidbus-widthmax-frequencynon-removablecap-sd-highspeedcap-mmc-highspeeddmasdma-namesvmmc-supplyvqmmc-supplyno-1-8-vcd-gpiosqcom,chipidiommusqcom,gpu-freqlabelassigned-clock-parentssyscon-sfpb#iommu-cellsqcom,ncblinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapinterrupts-extendedvddcx-supplyvddmx-supplyvddpx-supplyvddxo-supplyvddrfa-supplyvddpa-supplyvdddig-supplyqcom,smd-channelsqcom,mmioqcom,smem-statesqcom,smem-state-namesslave-moderemote-endpointcpuinput-namelinux,input-typelinux,code