hn8bL("bTechnexion Pico i.MX7D Board !technexion,imx7d-picofsl,imx7dchosenmemory,memory8aliases%host disabledusbmisc@30b10200F$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc80  usbmisc@30b30200F$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc80 ##usbphynop1!usb-nop-xceiv Qmain_clk usbphynop3!usb-nop-xceivn Qmain_clk ""usdhc@30b40000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc80 |V QipgahbperS disabledusdhc@30b50000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc80 |V QipgahbperS disabledusdhc@30b60000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc80 |V QipgahbperSokay"defaultstate_100mhzstate_200mhz$]%g&mׄqzsdma@30bd0000!fsl,imx7d-sdmafsl,imx35-sdma80 |ZQipgahbimx/sdma/sdma-imx7d.bin ethernet@30be0000!fsl,imx7d-fecfsl,imx6sx-fec80$|vwx(RR*"Qipgahbptpenet_clk_refenet_outokaydefault'm}+rgmii(mdioethernet-phy@1!ethernet-phy-ieee802.3-c228okay ((usb@30b20000!fsl,imx7d-usbfsl,imx27-usb80 |*)*okay)+>hostusbmisc@30b20200F$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc80 **usbphynop2!usb-nop-xceiv Qmain_clk ))ethernet@30bf0000!fsl,imx7d-fecfsl,imx6sx-fec80$|def(RR*"Qipgahbptpenet_clk_refenet_out disabledpcie@0x33800000!fsl,imx7d-pciesnps,dw-pcie83@O dbiconfig,pci0JO@@ |zmsi)<z{|}r+vQpciepcie_buspcie_phymsw})+J],k-- rpciephyapps disableddma-apbh@33000000&!fsl,imx7d-dma-apbhfsl,imx28-dma-apbh83 0|    gpmi0gpmi1gpmi2gpmi3~ ..gpmi-nand@33002000!fsl,imx7d-gpmi-nand83 3@@gpmi-nandbch |bchQgpmi_iogpmi_bch_apbh.^rx-tx disabledm}(etm@3007d000"!arm,coresight-etm3xarm,primecell80 Vx/J Qapb_pclkportendpointh0 regulator-2p5v!regulator-fixed 2P5V/&%G&% regulator-3p3v!regulator-fixed 3P3V/2ZG2Zregulator-usb-otg1-vbus!regulator-fixed usb_otg1_vbus/LK@GLK@ 1 !!regulator-usb-otg2-vbus!regulator-fixed usb_otg2_vbus/LK@GLK@ ++regulator-vref-1v8!regulator-fixed  vref-1v8/w@Gw@ sound!simple-audio-cardimx7-sgtl5000i2s22simple-audio-card,cpu3simple-audio-card,codec4J 22 #address-cells#size-cellsmodelcompatibledevice_typereggpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2i2c3mmc0mmc1mmc2serial0serial1serial2serial3serial4serial5serial6spi0spi1spi2spi3clock-frequencyclock-latencyclocksoperating-pointslinux,phandle#clock-cellsclock-output-namesinterrupt-parentrangesclock-namesslave-moderemote-endpointcpuinterrupts#interrupt-cellsinterrupt-controllergpio-controller#gpio-cellsgpio-rangespinctrl-namespinctrl-0fsl,ext-reset-outputstatusfsl,input-selfsl,pinsregulator-nameregulator-min-microvoltregulator-max-microvoltanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitregmapvaluemasklinux,keycodewakeup-source#reset-cells#power-domain-cellspower-supply#pwm-cells#sound-dai-cellsdma-namesdmasassigned-clocksassigned-clock-parentsassigned-clock-ratesVDDA-supplyVDDIO-supplyregulator-boot-onregulator-always-onregulator-ramp-delayfsl,usbphyfsl,usbmiscphy-clkgate-delay-usvbus-supplyphy_typedr_mode#index-cellsbus-widthpinctrl-1pinctrl-2no-1-8-vfsl,tuning-stepnon-removable#dma-cellsfsl,sdma-ram-script-namefsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packetreg-namesnum-lanesinterrupt-namesinterrupt-map-maskinterrupt-mapfsl,max-link-speedpower-domainsresetsreset-namesdma-channelsarm,primecell-periphidgpiosimple-audio-card,namesimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersound-dai