8( \&Arrow Electronics, APQ8064 SD_600eval!arrow,sd_600evalqcom,apq8064,chosenaliases#=/soc/gsbi@16600000/serial@16640000#E/soc/gsbi@12440000/serial@12450000 M/soc/gsbi@12480000/i2c@124a0000 R/soc/gsbi@16200000/i2c@16280000 W/soc/gsbi@16300000/i2c@16380000 \/soc/gsbi@16600000/i2c@16680000 a/soc/gsbi@1a200000/spi@1a280000memoryfmemoryrreserved-memoryvsmem@80000000r }wcnss@8f000000rp}Vcpuscpu@0 !qcom,kraitqcom,kpss-acc-v1fcpurjcpu@1 !qcom,kraitqcom,kpss-acc-v1fcpurlcpu@2 !qcom,kraitqcom,kpss-acc-v1fcpur ncpu@3 !qcom,kraitqcom,kpss-acc-v1fcpur  pl2-cache!cacheidle-statesspc#!qcom,idle-state-spcarm,idle-state thermal-zonescpu-thermal0 !/ ?tripstrip0L$Xmpassivetrip1LX mcriticalcpu-thermal1 !/ ?ltripstrip0L$Xmpassivetrip1LX mcriticalcpu-thermal2 !/ ?tripstrip0L$Xmpassivetrip1LX mcriticalcpu-thermal3 !/ ?ltripstrip0L$Xmpassivetrip1LX mcriticalcpu-pmu!qcom,krait-pmu c clockscxo_board !fixed-clockn{$2pxo_board !fixed-clockn{sleep_clk !fixed-clockn{1hwmutex!qcom,sfpb-mutex  smem !qcom,smemsmd !qcom,smdmodem@0 c%  disabledq6@1 cZ  disableddsps@3 c @ disabledriva@6 c  disabledsmsm !qcom,smsm    @apps@0r_modem@1r c&,q6@2r cY,wcnss@3r c,Udsps@4r c,firmwarescm!qcom,scm-apq8064= Dcoreiio-hwmon !iio-hwmonTP   socv !simple-buspinctrl@800000!qcom,apq8064-pinctrlr@\l, cxdefaultsdc4-gpiosDpios*gpio63gpio64gpio65gpio66gpio67gpio68sdc4sdcc1-pin-active=clk sdc1_clkcmd sdc1_cmd data sdc1_data sdcc3-pin-activeclk sdc3_clkcmd sdc3_cmddata sdc3_dataps_holdmuxgpio78ps_holdi2c1muxgpio20gpio21gsbi1pinconfgpio20gpio21i2c1_pins_sleepmuxgpio20gpio21gpiopinconfgpio20gpio21gsbi1_uart_2pinsmuxgpio18gpio19gsbi1gsbi1_uart_4pinsmuxgpio18gpio19gpio20gpio21gsbi1i2c2muxgpio24gpio25gsbi2pinconfgpio24gpio25i2c2_pins_sleepmuxgpio24gpio25gpiopinconfgpio24gpio25i2c3mux gpio8gpio9gsbi3pinconf gpio8gpio9i2c3_pins_sleep mux gpio8gpio9gpiopinconf gpio8gpio9i2c4!muxgpio12gpio13gsbi4pinconfgpio12gpio13i2c4_pins_sleep"muxgpio12gpio13gpiopinconfgpio12gpio13spi5_default#pinmuxgpio51gpio52gpio54gsbi5pinmux_csgpiogpio53pinconfgpio51gpio52gpio54pinconf_csgpio53spi5_sleep$pinmuxgpiogpio51gpio52gpio53gpio54pinconfgpio51gpio52gpio53gpio54i2c6%muxgpio16gpio17gsbi6pinconfgpio16gpio17i2c6_pins_sleep&muxgpio16gpio17gpiopinconfgpio16gpio17gsbi6_uart_2pinsmuxgpio14gpio15gsbi6gsbi6_uart_4pinsmuxgpio14gpio15gpio16gpio17gsbi6gsbi7_uart_2pins'muxgpio82gpio83gsbi7gsbi7_uart_4pinsmuxgpio82gpio83gpio84gpio85gsbi7i2c7(muxgpio84gpio85gsbi7pinconfgpio84gpio85i2c7_pins_sleep)muxgpio84gpio85gpiopinconfgpio84gpio85riva-fm-activegpio14gpio15riva_fmZriva-bt-activegpio16gpio17riva_btYriva-wlan-active#gpio64gpio65gpio66gpio67gpio68 riva_wlanXhdmi-pinctrlMmuxgpio70gpio71gpio72hdmipinconf_ddcgpio70gpio71pinconf_hpdgpio72card-detectBmuxgpio26gpiopcie-pinmuxLmuxgpio27gpioconfgpio27 user-ledsrmuxgpio3gpio7gpio10gpio11gpioconfgpio3gpio7gpio10gpio11gpiomagneto-pinsmuxgpio31gpio48gpiosyscon@1200000!sysconr  interrupt-controller@2000000!qcom,msm-qgic2,r timer@200a0005!qcom,kpss-timerqcom,kpss-wdt-apq8064qcom,msm-timer$cr{clock-controller@2088000!qcom,kpss-acc-v1rclock-controller@2098000!qcom,kpss-acc-v1r clock-controller@20a8000!qcom,kpss-acc-v1r clock-controller@20b8000!qcom,kpss-acc-v1r  power-controller@2089000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2rpower-controller@2099000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2r power-controller@20a9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2r  power-controller@20b9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2r  sps-sic-non-secure@12100000!sysconrgsbi@12440000okay!qcom,gsbi-v1.0.0rD= Difacev'serial@12450000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmrE@ c=  Dcoreifaceokay 1LS-UART1xdefaulti2c@12460000!qcom,i2c-qup-v1.1.17xdefaultsleeprF c=  Dcoreiface disabledgsbi@12480000okay!qcom,gsbi-v1.0.0rH= Difacev'i2c@124a0000!qcom,i2c-qup-v1.1.1rJ7xdefaultsleep c=  Dcoreifaceokay1LS-I2C0lis3mdl_mag@1e!st,lis3mdl-magnrALxdefault,Yc0gsbi@16200000okay!qcom,gsbi-v1.0.0r = Difacev'i2c@16280000!qcom,i2c-qup-v1.1.17 xdefaultsleepr( c=  Dcoreifaceokay1LS-I2C1{ @eeprom@52 !atmel,24c128rRi@gsbi@16300000okay!qcom,gsbi-v1.0.0r0= Difacev'i2c@16380000!qcom,i2c-qup-v1.1.1!7"xdefaultsleepr8 c=  Dcoreifaceokay 1HS-CAM-I2C3gsbi@1a200000okay!qcom,gsbi-v1.0.0r = Difacevserial@1a240000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmr$  c=  Dcoreiface disabledspi@1a280000!qcom,spi-qup-v1.1.1r( c#7$xdefaultsleep=  Dcoreifaceokay1LS-SPI0gsbi@16500000 disabled!qcom,gsbi-v1.0.0rP= Difacevserial@16540000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmrTP c=  Dcoreiface disabledi2c@16580000!qcom,i2c-qup-v1.1.1%7&xdefaultsleeprX c=  Dcoreiface disabledgsbi@16600000okay!qcom,gsbi-v1.0.0r`= Difacev'serial@16640000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmrd` c=  Dcoreifaceokay 1LS-UART0xdefault'i2c@16680000!qcom,i2c-qup-v1.1.1(7)xdefaultsleeprh c=  Dcoreifaceokay 1HS-CAM-I2C2rng@1a500000 !qcom,prngrP= Dcoressbi@c00000 !qcom,ssbir rpmic-arbiterpmic@1 !qcom,pm8821,cL,mpps@50!qcom,pm8821-mppqcom,ssbi-mpprP c\lqcom,ssbi@500000 !qcom,ssbirP rpmic-arbiterpmic@0 !qcom,pm8921,cJ,*gpio@150 !qcom,pm8921-gpioqcom,ssbi-gpiorP`c\lmpps@50!qcom,pm8921-mppqcom,ssbi-mpprP\l`ctmpp-ledsspinconf mpp7mpp8digitalrtc@11d!qcom,pm8921-rtc,*c'rpwrkey@1c!qcom,pm8921-pwrkeyr,*c23= xoadc@197!qcom,pm8921-adcr *Nadc-channel@00radc-channel@01radc-channel@02radc-channel@04radc-channel@08radc-channel@09r adc-channel@0ar adc-channel@0br adc-channel@0cr adc-channel@0dr adc-channel@0eradc-channel@0frqfprom@700000 !qcom,qfpromrpvcalibr+backup_calibr,clock-controller@900000!qcom,gcc-apq8064r@+,calibcalib_backupn clock-controller@28000000!qcom,lcc-apq8064r(nclock-controller@4000000!qcom,mmcc-apq8064rnEclock-controller@2011000!sysconrrpm@108000!qcom,rpm-apq8064r $cackerrwakeupclock-controller!qcom,rpmcc-apq8064qcom,rpmccnregulators!qcom,rpm-pm8921-regulators-#-1-?-M-[-i-w-------.).8/G/V/ey.s1((0.s2  j[s3B@\I>Js4w@w@js7  0/s8l1l2l3.2Z4l4B@w@5l5)0- ?l6-p-pAl7l8l9l10\l11l12l14l15w@w@l16l17l18l21l22l238l24Wl25l26l27l28l29lvs1lvs2]lvs3lvs4lvs5lvs6Klvs7<usb-switchhdmi-switchOncpusb@12500000 !qcom,ci-hdrcrPP cd= ~ Dcoreiface .C @JcoreVulpi_p0uusb-phyokay peripheral3ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy=12 DsleeprefC3Jpor450usb@12520000 !qcom,ci-hdrcrRR c= ) ' Dcoreiface ).C dJcoreVulpi_p6uusb-phyokayotg7ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy=12 DsleeprefC7Jpor486usb@12530000 !qcom,ci-hdrcrSS c= , * Dcoreiface ,.C eJcoreVulpi_p9uusb-phyokayotg:ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy=12 DsleeprefC:Jpor489phy@1b400000!qcom,apq8064-sata-phyokayr@phy_mem= -Dcfg;sata@29000000!qcom,apq8064-ahcigeneric-ahciokayr) c(= ; . )Dslave_ifaceifacebusrxoobcore_pmalive .p; usata-phy<dma@12402000!qcom,bam-v1.3.0r@  cb= nDbam_clk>dma@12182000!qcom,bam-v1.3.0r  c`= pDbam_clk@dma@121c2000!qcom,bam-v1.3.0r  c_= qDbam_clkCamba !simple-busvsdcc@12400000okay!arm,pl18xarm,primecellxdefault=r@  chcmd_irq= x nDmclkapb_pclk$5G>>LtxrxV?bsdcc@12180000!arm,pl18xarm,primecellokayr  cfcmd_irq= z pDmclkapb_pclk$5 qoG@@LtxrxVAxdefaultB xsdcc@121c0000!arm,pl18xarm,primecell disabledr  cecmd_irq= { qDmclkapb_pclk$5lGCCLtxrxxdefaultDsyscon@1a400000!qcom,tcsr-apq8064sysconr@adreno-3xx@4300000!qcom,adreno-3xxr0kgsl_3d0_reg_memory cP kgsl_3d0_irq)Dcore_clkiface_clkmem_clkmem_iface_clk =EGEE!EFFFFFFFFFF F F F F FFFFFFFFFFFFFFFFFFGGGGGGGGGG G G G G GGGGGGGGGGGGGGGGGGqcom,gpu-pwrlevels!qcom,gpu-pwrlevelsqcom,gpu-pwrlevel@0tqcom,gpu-pwrlevel@1syscon@5700000!sysconrppImdss_dsi@4700000!qcom,mdss-dsi-ctrl1MDSS DSI CTRL->0 cRrp dsi_ctrl8=EEEE9ETEjEXDDiface_clkbus_clkcore_mmss_clksrc_clkbyte_clkpixel_clkcore_clk ESEWE8Ei HHHHIpHportsport@0rendpointport@1rendpointdsi-phy@4700200!qcom,dsi-phy-28nm-8960nrppp\"dsi_plldsi_phydsi_phy_regulator Diface_clk=EHiommu@7500000!qcom,apq8064-iommuDsmmu_pclkiommu_clk=E ErPc?@Riommu@7600000!qcom,apq8064-iommuDsmmu_pclkiommu_clk=E Er`c=>Siommu@7c00000!qcom,apq8064-iommuDsmmu_pclkiommu_clk=E E!rcEFFiommu@7d00000!qcom,apq8064-iommuDsmmu_pclkiommu_clk=E E!rcGpci@1b500000!qcom,pcie-apq8064snps,dw-pcie rPP `dbielbiparfconfigfpci0v cmsi,$%&'= + . -Dcoreifacephy(C l k j i hJaxiahbporpciphyokay!J-K=Lxdefault Phdmi-tx@4a00000!qcom,hdmi-tx-8960xdefaultMrcore_physical cO=E>E E*Dcore_clkmaster_iface_clkslave_iface_clkpN uhdmi-phyokay[Ol |Hportsport@0rendpointPTport@1rendpointQuhdmi-phy@4a00400!qcom,hdmi-phy-8960r`hdmi_phyhdmi_pll=EDslave_iface_clkokay[ONmdp@5100000 !qcom,mdp4r cK0=EMEEENE_E`3Dcore_clkiface_clkbus_clklut_clkhdmi_clktv_clk RRSSokayportsport@0rendpointport@1rendpointport@2rendpointport@3rendpointTPriva-pil@3204000!qcom,riva-pilr   @ ccudxepmuU wdogfatalVJWokayxdefault XYZ^iris !qcom,wcn3660=2Dxo5[\]smd-edge c 1rivawcnss !qcom,wcnss WCNSS_CTRL ^bt!qcom,wcnss-btwifi!qcom,wcnss-wlanctxrx _ _  tx-enabletx-rings-emptyetb@1a01000!coresight-etb10arm,primecellr= Dapb_pclkportendpoint 5`btpiu@1a03000!!arm,coresight-tpiuarm,primecellr0= Dapb_pclkportendpoint 5acreplicator!arm,coresight-replicator= Dapb_pclkportsport@0rendpointb`port@1rendpointcaport@2rendpoint 5difunnel@1a04000#!arm,coresight-funnelarm,primecellr@= Dapb_pclkportsport@0rendpoint 5ekport@1rendpoint 5fmport@4rendpoint 5goport@5rendpoint 5hqport@8rendpointidetm@1a1c000"!arm,coresight-etm3xarm,primecellr= Dapb_pclk @jportendpointkeetm@1a1d000"!arm,coresight-etm3xarm,primecellr= Dapb_pclk @lportendpointmfetm@1a1e000"!arm,coresight-etm3xarm,primecellr= Dapb_pclk @nportendpointogetm@1a1f000"!arm,coresight-etm3xarm,primecellr= Dapb_pclk @pportendpointqhledsxdefaultrs !gpio-ledsuser-led0 1user0-led { Dheartbeat Zoffuser-led1 1user1-led { Dmmc0 Zoffuser-led2 1user2-led {  Dmmc1 Zoffuser-led3 1user3-led {  Dnone Zoffwifi-led 1WiFi-led {t Zoffbt-led1BT-led {t Zoffregulators !simple-busregulator-fixed@1!regulator-fixedD D  hVPH wvoltage -vcc3v3!regulator-fixed hVCC3V32Z2Zhdmi-out!hdmi-connectormaportendpointuQ #address-cells#size-cellsmodelcompatibleinterrupt-parentserial0serial1i2c0i2c1i2c2i2c3spi0device_typeregrangesno-mapphandleenable-methodnext-level-cacheqcom,accqcom,sawcpu-idle-statescache-levelentry-latency-usexit-latency-usmin-residency-uspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresisinterrupts#clock-cellsclock-frequencysyscon#hwlock-cellsmemory-regionhwlocksqcom,ipcqcom,smd-edgestatusqcom,ipc-1qcom,ipc-2qcom,ipc-3qcom,ipc-4#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsclocksclock-namesio-channelsgpio-controller#gpio-cellspinctrl-namespinctrl-0pinsfunctiondrive-strenghbias-disablebias-pull-updrive-strengthoutput-highbias-pull-downoutput-lowcpu-offsetregulatorcell-indexsyscon-tcsrqcom,modelabelpinctrl-1vdd-supplyvddio-supplyst,drdy-int-pinpagesizeqcom,controller-typeallow-set-timedebounceinterrupts-extended#io-channel-cellsnvmem-cellsnvmem-cell-names#reset-cells#thermal-sensor-cellsinterrupt-namesvdd_s1-supplyvdd_s2-supplyvdd_s3-supplyvdd_s4-supplyvdd_s5-supplyvdd_s6-supplyvdd_s7-supplyvdd_l1_l2_l12_l18-supplyvdd_l3_l15_l17-supplyvdd_l4_l14-supplyvdd_l5_l8_l16-supplyvdd_l6_l7-supplyvdd_l9_l11-supplyvdd_l10_l22-supplyvdd_l21_l23_l29-supplyvdd_l24-supplyvdd_l25-supplyvdd_l26-supplyvdd_l27-supplyvdd_l28-supplyvin_lvs1_3_6-supplyvin_lvs2-supplyvin_lvs4_5_7-supplyregulator-always-onregulator-min-microvoltregulator-max-microvoltqcom,switch-mode-frequencyqcom,force-moderegulator-boot-onassigned-clocksassigned-clock-ratesresetsreset-namesphy_typeahb-burst-configphysphy-namesdr_mode#phy-cellsv3p3-supplyv1p8-supplyreg-namesports-implementedtarget-supply#dma-cellsqcom,eearm,primecell-periphidbus-widthmax-frequencynon-removablecap-sd-highspeedcap-mmc-highspeeddmasdma-namesvmmc-supplyvqmmc-supplyno-1-8-vcd-gpiosqcom,chipidiommusqcom,gpu-freqassigned-clock-parentssyscon-sfpb#iommu-cellsqcom,ncblinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapvdda-supplyvdda_phy-supplyvdda_refclk-supplyperst-gpiocore-vdda-supplyhdmi-mux-supplyhpd-gpioremote-endpointvddcx-supplyvddmx-supplyvddpx-supplyvddxo-supplyvddrfa-supplyvddpa-supplyvdddig-supplyqcom,smd-channelsqcom,mmioqcom,smem-statesqcom,smem-state-namesslave-modecpulinux,default-triggerdefault-stateregulator-nameregulator-type