Ð þíì8(ØÜ7marvell,berlin4ct-dmpmarvell,berlin4ctmarvell,berlin +7Marvell BG4CT DMP boardaliases#=/soc@f7000000/apb@fc0000/uart@d000psciarm,psci-1.0arm,psci-0.2Esmccpus+cpu@0arm,cortex-a53LcpuX\pscij{‹cpu@1arm,cortex-a53LcpuX\pscij{‹cpu@2arm,cortex-a53LcpuX\pscij{‹cpu@3arm,cortex-a53LcpuX\pscij{‹cachecache‹idle-states“pscicpu-sleep-0arm,idle-state ±ÈKÙ›éè‹osc fixed-clockú}x@‹ pmu#arm,cortex-a53-pmuarm,armv8-pmuv30"timerarm,armv8-timer0   soc@f7000000 simple-bus+5÷interrupt-controller@901000 arm,gic-400<M X @ `   ‹apb@e80000 simple-bus+ 5è gpio@400snps,dw-apb-gpioX+gpio-port@0snps,dw-apb-gpio-portbr~ XM<gpio@800snps,dw-apb-gpioX+gpio-port@1snps,dw-apb-gpio-portbr~ XM<gpio@c00snps,dw-apb-gpioX +gpio-port@2snps,dw-apb-gpio-portbr~ XM<gpio@1000snps,dw-apb-gpioX+gpio-port@3snps,dw-apb-gpio-portbr~ XM<interrupt-controller@3800snps,dw-apb-ictlX80M<  ‹pin-controller@ea8000marvell,berlin4ct-soc-pinctrlXê€pin-controller@ea8400marvell,berlin4ct-avio-pinctrlXê„apb@fc0000 simple-bus+ 5ü interrupt-controller@1000snps,dw-apb-ictlX0M<  ‹ watchdog@3000 snps,dw-wdtX0Œ watchdog@4000 snps,dw-wdtX@Œ watchdog@5000 snps,dw-wdtXPŒ gpio@8000snps,dw-apb-gpioX€+gpio-port@4snps,dw-apb-gpio-portbr~ Xgpio@9000snps,dw-apb-gpioX+gpio-port@5snps,dw-apb-gpio-portbr~ Xuart@d000snps,dw-apb-uartXÐŒ “okay¤ ®defaultpin-controller@fe2200!marvell,berlin4ct-system-pinctrlXþ" uart0-pmux¼SM_URT0_TXDSM_URT0_RXDÃuart0‹ chosenÌserial0:115200n8memory@1000000LmemoryX compatibleinterrupt-parent#address-cells#size-cellsmodelserial0methoddevice_typeregenable-methodnext-level-cachecpu-idle-statesphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-us#clock-cellsclock-frequencyinterruptsinterrupt-affinityranges#interrupt-cellsinterrupt-controllergpio-controller#gpio-cellssnps,nr-gpiosclocksreg-shiftstatuspinctrl-0pinctrl-namesgroupsfunctionstdout-path