8(ET timll,omap3-devkit8000ti,omap3&7TimLL OMAP3 Devkit8000chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/serial@4806a000T/ocp/serial@4806c000\/ocp/serial@49020000 d/connector@0 m/connector@1memoryvmemorycpuscpu@0arm,cortex-a8vcpucpu(HАg8 Odp` 'ppmuarm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocpti,omap3-l3-smxsimple-bush l3_mainl4@48000000ti,omap3-l4-coresimple-bus Hscm@2000ti,omap3-scmsimple-bus  pinmux@30 ti,omap3-padconfpinctrl-single08pinmux_twl4030_pins5AIOpinmux_dss_dpi_pins5IOscm_conf@270sysconsimple-busp0 p0IOpbias_regulatorti,pbias-omap3ti,pbias-omapWpbias_mmc_omap2430^pbias_mmc_omap2430mw@-IOclocksmcbsp5_mux_fckti,composite-mux-clockhIOmcbsp5_fckti,composite-clockmcbsp1_mux_fckti,composite-mux-clockI O mcbsp1_fckti,composite-clock mcbsp2_mux_fckti,composite-mux-clock I O mcbsp2_fckti,composite-clock mcbsp3_mux_fckti,composite-mux-clock hIOmcbsp3_fckti,composite-clock mcbsp4_mux_fckti,composite-mux-clock hIOmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \pinmux_twl4030_vpins 5IOaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocksvirt_16_8m_ck fixed-clockYIOosc_sys_ck ti,mux-clock @IOsys_ckti,divider-clockpIOsys_clkout1ti,gate-clock pdpll3_x2_ckfixed-factor-clockdpll3_m2x2_ckfixed-factor-clockIOdpll4_x2_ckfixed-factor-clockcorex2_fckfixed-factor-clockIOwkup_l4_ickfixed-factor-clockIMOMcorex2_d3_fckfixed-factor-clockIOcorex2_d5_fckfixed-factor-clockIOclockdomainscm@48004000 ti,omap3-cmH@@clocksdummy_apb_pclk fixed-clockomap_32k_fck fixed-clockI?O?virt_12m_ck fixed-clockIOvirt_13m_ck fixed-clock]@IOvirt_19200000_ck fixed-clock$IOvirt_26000000_ck fixed-clockIOvirt_38_4m_ck fixed-clockIIOdpll4_ckti,omap3-dpll-per-clock D 0IOdpll4_m2_ckti,divider-clock? HIOdpll4_m2x2_mul_ckfixed-factor-clockI O dpll4_m2x2_ckti,gate-clock   I!O!omap_96m_alwon_fckfixed-factor-clock!I(O(dpll3_ckti,omap3-dpll-core-clock @ 0IOdpll3_m3_ckti,divider-clock@I"O"dpll3_m3x2_mul_ckfixed-factor-clock"I#O#dpll3_m3x2_ckti,gate-clock#   I$O$emu_core_alwon_ckfixed-factor-clock$IaOasys_altclk fixed-clockI-O-mcbsp_clks fixed-clockIOdpll3_m2_ckti,divider-clock @IOcore_ckfixed-factor-clockI%O%dpll1_fckti,divider-clock% @I&O&dpll1_ckti,omap3-dpll-clock&  $ @ 4IOdpll1_x2_ckfixed-factor-clockI'O'dpll1_x2m2_ckti,divider-clock' DI;O;cm_96m_fckfixed-factor-clock(I)O)omap_96m_fck ti,mux-clock) @IDODdpll4_m3_ckti,divider-clock @I*O*dpll4_m3x2_mul_ckfixed-factor-clock*I+O+dpll4_m3x2_ckti,gate-clock+  I,O,omap_54m_fck ti,mux-clock,- @I7O7cm_96m_d2_fckfixed-factor-clock)I.O.omap_48m_fck ti,mux-clock.- @I/O/omap_12m_fckfixed-factor-clock/IFOFdpll4_m4_ckti,divider-clock @I0O0dpll4_m4x2_mul_ckti,fixed-factor-clock0#1>I1O1dpll4_m4x2_ckti,gate-clock1  >IOdpll4_m5_ckti,divider-clock?@I2O2dpll4_m5x2_mul_ckti,fixed-factor-clock2#1>I3O3dpll4_m5x2_ckti,gate-clock3  >IiOidpll4_m6_ckti,divider-clock?@I4O4dpll4_m6x2_mul_ckfixed-factor-clock4I5O5dpll4_m6x2_ckti,gate-clock5  I6O6emu_per_alwon_ckfixed-factor-clock6IbObclkout2_src_gate_ck ti,composite-no-wait-gate-clock% pI8O8clkout2_src_mux_ckti,composite-mux-clock%)7 pI9O9clkout2_src_ckti,composite-clock89I:O:sys_clkout2ti,divider-clock:@ pQmpu_ckfixed-factor-clock;I<O<arm_fckti,divider-clock< $emu_mpu_alwon_ckfixed-factor-clock<IcOcl3_ickti,divider-clock% @I=O=l4_ickti,divider-clock= @I>O>rm_ickti,divider-clock> @gpt10_gate_fckti,composite-gate-clock  I@O@gpt10_mux_fckti,composite-mux-clock? @IAOAgpt10_fckti,composite-clock@Agpt11_gate_fckti,composite-gate-clock  IBOBgpt11_mux_fckti,composite-mux-clock? @ICOCgpt11_fckti,composite-clockBCcore_96m_fckfixed-factor-clockDIOmmchs2_fckti,wait-gate-clock IOmmchs1_fckti,wait-gate-clock IOi2c3_fckti,wait-gate-clock IOi2c2_fckti,wait-gate-clock IOi2c1_fckti,wait-gate-clock IOmcbsp5_gate_fckti,composite-gate-clock  IOmcbsp1_gate_fckti,composite-gate-clock  IOcore_48m_fckfixed-factor-clock/IEOEmcspi4_fckti,wait-gate-clockE IOmcspi3_fckti,wait-gate-clockE IOmcspi2_fckti,wait-gate-clockE IOmcspi1_fckti,wait-gate-clockE IOuart2_fckti,wait-gate-clockE IOuart1_fckti,wait-gate-clockE  IOcore_12m_fckfixed-factor-clockFIGOGhdq_fckti,wait-gate-clockG IOcore_l3_ickfixed-factor-clock=IHOHsdrc_ickti,wait-gate-clockH IOgpmc_fckfixed-factor-clockHcore_l4_ickfixed-factor-clock>IIOImmchs2_ickti,omap3-interface-clockI IOmmchs1_ickti,omap3-interface-clockI IOhdq_ickti,omap3-interface-clockI IOmcspi4_ickti,omap3-interface-clockI IOmcspi3_ickti,omap3-interface-clockI IOmcspi2_ickti,omap3-interface-clockI IOmcspi1_ickti,omap3-interface-clockI IOi2c3_ickti,omap3-interface-clockI IOi2c2_ickti,omap3-interface-clockI IOi2c1_ickti,omap3-interface-clockI IOuart2_ickti,omap3-interface-clockI IOuart1_ickti,omap3-interface-clockI  IOgpt11_ickti,omap3-interface-clockI  IOgpt10_ickti,omap3-interface-clockI  IOmcbsp5_ickti,omap3-interface-clockI  IOmcbsp1_ickti,omap3-interface-clockI  IOomapctrl_ickti,omap3-interface-clockI IOdss_tv_fckti,gate-clock7IOdss_96m_fckti,gate-clockDIOdss2_alwon_fckti,gate-clockIOdummy_ck fixed-clockgpt1_gate_fckti,composite-gate-clock IJOJgpt1_mux_fckti,composite-mux-clock? @IKOKgpt1_fckti,composite-clockJKaes2_ickti,omap3-interface-clockI IOwkup_32k_fckfixed-factor-clock?ILOLgpio1_dbckti,gate-clockL IOsha12_ickti,omap3-interface-clockI IOwdt2_fckti,wait-gate-clockL IOwdt2_ickti,omap3-interface-clockM IOwdt1_ickti,omap3-interface-clockM IOgpio1_ickti,omap3-interface-clockM IOomap_32ksync_ickti,omap3-interface-clockM IOgpt12_ickti,omap3-interface-clockM IOgpt1_ickti,omap3-interface-clockM IOper_96m_fckfixed-factor-clock(I O per_48m_fckfixed-factor-clock/INONuart3_fckti,wait-gate-clockN IOgpt2_gate_fckti,composite-gate-clockIOOOgpt2_mux_fckti,composite-mux-clock?@IPOPgpt2_fckti,composite-clockOPgpt3_gate_fckti,composite-gate-clockIQOQgpt3_mux_fckti,composite-mux-clock?@IRORgpt3_fckti,composite-clockQRgpt4_gate_fckti,composite-gate-clockISOSgpt4_mux_fckti,composite-mux-clock?@ITOTgpt4_fckti,composite-clockSTgpt5_gate_fckti,composite-gate-clockIUOUgpt5_mux_fckti,composite-mux-clock?@IVOVgpt5_fckti,composite-clockUVgpt6_gate_fckti,composite-gate-clockIWOWgpt6_mux_fckti,composite-mux-clock?@IXOXgpt6_fckti,composite-clockWXgpt7_gate_fckti,composite-gate-clockIYOYgpt7_mux_fckti,composite-mux-clock?@IZOZgpt7_fckti,composite-clockYZgpt8_gate_fckti,composite-gate-clock I[O[gpt8_mux_fckti,composite-mux-clock?@I\O\gpt8_fckti,composite-clock[\gpt9_gate_fckti,composite-gate-clock I]O]gpt9_mux_fckti,composite-mux-clock?@I^O^gpt9_fckti,composite-clock]^per_32k_alwon_fckfixed-factor-clock?I_O_gpio6_dbckti,gate-clock_IOgpio5_dbckti,gate-clock_IOgpio4_dbckti,gate-clock_IOgpio3_dbckti,gate-clock_IOgpio2_dbckti,gate-clock_ IOwdt3_fckti,wait-gate-clock_ IOper_l4_ickfixed-factor-clock>I`O`gpio6_ickti,omap3-interface-clock`IOgpio5_ickti,omap3-interface-clock`IOgpio4_ickti,omap3-interface-clock`IOgpio3_ickti,omap3-interface-clock`IOgpio2_ickti,omap3-interface-clock` IOwdt3_ickti,omap3-interface-clock` IOuart3_ickti,omap3-interface-clock` IOuart4_ickti,omap3-interface-clock`IOgpt9_ickti,omap3-interface-clock` IOgpt8_ickti,omap3-interface-clock` IOgpt7_ickti,omap3-interface-clock`IOgpt6_ickti,omap3-interface-clock`IOgpt5_ickti,omap3-interface-clock`IOgpt4_ickti,omap3-interface-clock`IOgpt3_ickti,omap3-interface-clock`IOgpt2_ickti,omap3-interface-clock`IOmcbsp2_ickti,omap3-interface-clock`IOmcbsp3_ickti,omap3-interface-clock`IOmcbsp4_ickti,omap3-interface-clock`IOmcbsp2_gate_fckti,composite-gate-clockI O mcbsp3_gate_fckti,composite-gate-clockI O mcbsp4_gate_fckti,composite-gate-clockIOemu_src_mux_ck ti,mux-clockabc@IdOdemu_src_ckti,clkdm-gate-clockdIeOepclk_fckti,divider-clocke@pclkx2_fckti,divider-clocke@atclk_fckti,divider-clocke@traceclk_src_fck ti,mux-clockabc@IfOftraceclk_fckti,divider-clockf @secure_32k_fck fixed-clockIgOggpt12_fckfixed-factor-clockgwdt1_fckfixed-factor-clockgsecurity_l4_ick2fixed-factor-clock>IhOhaes1_ickti,omap3-interface-clockh rng_ickti,omap3-interface-clockh sha11_ickti,omap3-interface-clockh des1_ickti,omap3-interface-clockh cam_mclkti,gate-clocki>cam_ick!ti,omap3-no-wait-interface-clock>IOcsi2_96m_fckti,gate-clockIOsecurity_l3_ickfixed-factor-clock=IjOjpka_ickti,omap3-interface-clockj icr_ickti,omap3-interface-clockI des2_ickti,omap3-interface-clockI mspro_ickti,omap3-interface-clockI mailboxes_ickti,omap3-interface-clockI ssi_l4_ickfixed-factor-clock>IqOqsr1_fckti,wait-gate-clock sr2_fckti,wait-gate-clock sr_l4_ickfixed-factor-clock>dpll2_fckti,divider-clock%@IkOkdpll2_ckti,omap3-dpll-clockk$@4gyIlOldpll2_m2_ckti,divider-clocklDImOmiva2_ckti,wait-gate-clockmIOmodem_fckti,omap3-interface-clock IOsad2d_ickti,omap3-interface-clock= IOmad2d_ickti,omap3-interface-clock= IOmspro_fckti,wait-gate-clock ssi_ssr_gate_fck_3430es2 ti,composite-no-wait-gate-clock InOnssi_ssr_div_fck_3430es2ti,composite-divider-clock @$IoOossi_ssr_fck_3430es2ti,composite-clocknoIpOpssi_sst_fck_3430es2fixed-factor-clockpIOhsotgusb_ick_3430es2"ti,omap3-hsotgusb-interface-clockH IOssi_ick_3430es2ti,omap3-ssi-interface-clockq IOusim_gate_fckti,composite-gate-clockD  I|O|sys_d2_ckfixed-factor-clockIsOsomap_96m_d2_fckfixed-factor-clockDItOtomap_96m_d4_fckfixed-factor-clockDIuOuomap_96m_d8_fckfixed-factor-clockDIvOvomap_96m_d10_fckfixed-factor-clockD IwOwdpll5_m2_d4_ckfixed-factor-clockrIxOxdpll5_m2_d8_ckfixed-factor-clockrIyOydpll5_m2_d16_ckfixed-factor-clockrIzOzdpll5_m2_d20_ckfixed-factor-clockrI{O{usim_mux_fckti,composite-mux-clock(stuvwxyz{ @I}O}usim_fckti,composite-clock|}usim_ickti,omap3-interface-clockM  IOdpll5_ckti,omap3-dpll-clock  $ L 4gyI~O~dpll5_m2_ckti,divider-clock~ PIrOrsgx_gate_fckti,composite-gate-clock% IOcore_d3_ckfixed-factor-clock%IOcore_d4_ckfixed-factor-clock%IOcore_d6_ckfixed-factor-clock%IOomap_192m_alwon_fckfixed-factor-clock!IOcore_d2_ckfixed-factor-clock%IOsgx_mux_fckti,composite-mux-clock ) @IOsgx_fckti,composite-clocksgx_ickti,wait-gate-clock= IOcpefuse_fckti,gate-clock IOts_fckti,gate-clock? IOusbtll_fckti,wait-gate-clockr IOusbtll_ickti,omap3-interface-clockI IOmmchs3_ickti,omap3-interface-clockI IOmmchs3_fckti,wait-gate-clock IOdss1_alwon_fck_3430es2ti,dss-gate-clock>IOdss_ick_3430es2ti,omap3-dss-interface-clock>IOusbhost_120m_fckti,gate-clockrIOusbhost_48m_fckti,dss-gate-clock/IOusbhost_ickti,omap3-dss-interface-clock>IOclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainhemu_clkdmti,clockdomainedpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainld2d_clkdmti,clockdomain dpll5_clkdmti,clockdomain~sgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain counter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH IOdma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH`  `IOgpio@48310000ti,omap3-gpioH1gpio1IOgpio@49050000ti,omap3-gpioIgpio2gpio@49052000ti,omap3-gpioI gpio3gpio@49054000ti,omap3-gpioI@ gpio4gpio@49056000ti,omap3-gpioI`!gpio5gpio@49058000ti,omap3-gpioI"gpio6IOserial@4806a000ti,omap3-uartH H12txrxuart1lserial@4806c000ti,omap3-uartHI34txrxuart2lserial@49020000ti,omap3-uartIJ56txrxuart3li2c@48070000 ti,omap3-i2cH8txrxi2c1'@twl@48H ti,twl4030defaultaudioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci  watchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1m ' regulator-vdacti,twl4030-vdacmw@w@IOregulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1m:0IOregulator-vmmc2ti,twl4030-vmmc2m:0regulator-vusb1v5ti,twl4030-vusb1v5IOregulator-vusb1v8ti,twl4030-vusb1v8IOregulator-vusb3v1ti,twl4030-vusb3v1IOregulator-vpll1ti,twl4030-vpll1 ^vdds_dsimw@w@IOregulator-vpll2ti,twl4030-vpll2mw@w@regulator-vsimti,twl4030-vsimmw@-IOgpioti,twl4030-gpio.:IOtwl4030-usbti,twl4030-usb GUcqzpwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadD?  @A Bsrmadcti,twl4030-madci2c@48072000 ti,omap3-i2cH 9txrxi2c2IOi2c@48060000 ti,omap3-i2cH=txrxi2c3 disabledmailbox@48094000ti,omap3-mailboxmailboxH @dsp   spi@48098000ti,omap2-mcspiH Amcspi1@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH Bmcspi2 +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [mcspi3 tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0mcspi4FGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1-=>txrx:GScmmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrx disabledmmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx disabledmmu@480bd400mti,omap2-iommuH mmu_ispzIOmmu@5d000000mti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2 disabledmcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1 txrx disabledmcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxokayIOmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrx disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4txrx disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5txrx disabledsham@480c3000ti,omap3-shamshamH 0d1Erxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_coreH smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivaH timer@48318000ti,omap3430-timerH1%timer1timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11timer@48304000ti,omap3430-timerH0@_timer12usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hsohci@48064400ti,ohci-omap3HD&Lehci@48064800 ti,ehci-omapHH&Mgpmc@6e000000ti,omap3430-gpmcgpmcnrxtx,nand@0,0  +sw;LZ,l,~",(6@RR(x-loader@0 ,X-Loaderbootloaders@80000,U-Bootbootloaders_env@260000 ,U-Boot Env&kernel@280000,Kernel(@filesystem@680000 ,File Systemhethernet@0,0davicom,dm90002&=OaoLZl~066ZZ "usb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs9DL dss@48050000 ti,omap3-dssHok dss_corefckdefaultUedispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH ok dss_vencfckuportendpointIOportendpoint@0IOssi-controller@48058000 ti,omap3-ssissiokHHsysgddGgdd_mpu p ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrx&CDssi-port@4805b000ti,omap3-ssi-portHHtxrx&EFpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$isp@480bc000 ti,omap3-ispH H |Wportsleds gpio-ledsheartbeat,devkit8000::led1 on heartbeatmmc,devkit8000::led2 onnoneusr,devkit8000::led3 onusrpmu_stat,devkit8000::pmu_stat soundti,omap-twl4030 devkit8000IExt SpkPREDRIVELExt SpkPREDRIVERMAINMICMain MicMain MicMic Bias 1gpio_keys gpio-keysuser,user encoder@0 ti,tfp410 !portsport@0endpoint@0IOport@1endpoint@0IOconnector@0dvi-connector,dvi19portendpointIOconnector@1svideo-connector,tvportendpointIO #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2display1display2device_typeregclocksclock-namesclock-latencyoperating-pointsinterruptsti,hwmodsranges#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinslinux,phandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyti,use-ledsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cellsstatus#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplybus-width#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-securegpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthdavicom,no-eepromgpmc,mux-add-datagpmc,wait-pingpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsmultipointnum-epsram-bitsvdds_dsi-supplyvdda_dac-supplyvdda-supplyremote-endpointti,channelsdata-linesiommusti,phy-typegpiosdefault-statelinux,default-triggerti,modelti,mcbspti,audio-routinglinux,codewakeup-sourcepowerdown-gpiosdigitalddc-i2c-bus