* M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 001 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 1 2 ;## C Compiler OUTPUT 3 ;## ccom308 Version 5.05.01.000 4 ;## Copyright(C) 1999(2005). Renesas Technology Corp. 5 ;## and Renesas Solutions Corp., All Rights Reserved. 6 ;## Compile Start Time Fri Jun 27 17:36:30 2014 7 8 ;## COMMAND_LINE: ccom308 C:\Users\Administrator\Downloads\ssp_rsk_r8c23_hew-20140307\ssp\target\rsk_m32c87_hew\ssp_workspace\libkernel\Debug\task_mana 9 10 11 ;## Normal Optimize OFF 12 ;## ROM size Optimize OFF 13 ;## Speed Optimize OFF 14 ;## Default ROM is far 15 ;## Default RAM is near 16 17 .GLB __SB__ 18 .SB __SB__ 19 .FB 0 20 21 22 23 24 25 ;## # FUNCTION TOPPERS_assert_abort 26 27 28 29 30 ;## # FUNCTION _syslog_0 31 32 ;## # FUNCTION _syslog_1 33 34 ;## # FUNCTION _syslog_2 35 36 ;## # FUNCTION _syslog_3 37 38 ;## # FUNCTION _syslog_4 39 40 ;## # FUNCTION _syslog_5 41 42 ;## # FUNCTION _syslog_6 43 44 45 ;## # FUNCTION get_flgreg 46 47 ;## # FUNCTION set_flgreg 48 49 ;## # FUNCTION clr_ipl 50 51 ;## # FUNCTION disint 52 53 ;## # FUNCTION enaint 54 55 ;## # FUNCTION jmp_dispatcher 56 57 58 ;## # FUNCTION TOPPERS_disint 59 60 ;## # FUNCTION TOPPERS_enaint 61 62 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 002 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 63 ;## # FUNCTION sil_reb_mem 64 65 ;## # FUNCTION sil_wrb_mem 66 67 ;## # FUNCTION sil_reh_mem 68 69 ;## # FUNCTION sil_wrh_mem 70 71 ;## # FUNCTION sil_reh_bem 72 73 ;## # FUNCTION sil_wrh_bem 74 75 ;## # FUNCTION sil_rew_mem 76 77 ;## # FUNCTION sil_wrw_mem 78 79 ;## # FUNCTION sil_rew_bem 80 81 ;## # FUNCTION sil_wrw_bem 82 83 84 85 86 87 ;## # FUNCTION reset_isp 88 89 90 ;## # FUNCTION sense_context 91 92 ;## # FUNCTION t_lock_cpu 93 94 ;## # FUNCTION i_lock_cpu 95 96 ;## # FUNCTION t_unlock_cpu 97 98 ;## # FUNCTION i_unlock_cpu 99 100 ;## # FUNCTION x_sense_lock 101 102 ;## # FUNCTION x_set_ipm 103 104 ;## # FUNCTION x_get_ipm 105 106 ;## # FUNCTION x_disable_int 107 108 ;## # FUNCTION x_enable_int 109 110 ;## # FUNCTION x_clear_int 111 112 ;## # FUNCTION x_probe_int 113 114 ;## # FUNCTION x_define_inh 115 116 ;## # FUNCTION i_begin_int 117 118 ;## # FUNCTION i_end_int 119 120 ;## # FUNCTION x_define_exc 121 122 ;## # FUNCTION idle_loop 123 124 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 003 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 125 126 ;## # FUNCTION actque_set 127 128 ;## # FUNCTION actque_clear 129 130 ;## # FUNCTION actque_test 131 132 133 ;## # FUNCTION act_tsk 134 ;## # FRAME AUTO ( tskid) size 2, offset -10 135 ;## # FRAME AUTO ( ercd) size 2, offset -8 136 ;## # FRAME AUTO ( itskpri) size 2, offset -10 137 ;## # FRAME AUTO ( ipl) size 2, offset -6 138 ;## # FRAME AUTO ( ipl) size 2, offset -4 139 ;## # FRAME AUTO ( flg_reg) size 2, offset -2 140 ;## # FRAME AUTO ( ipri) size 2, offset -4 141 ;## # FRAME AUTO ( ipri) size 2, offset -4 142 ;## # REGISTER ARG ( tskid) size 2, REGISTER R0 143 ;## # ARG Size(0) Auto Size(10) Context Size(8) 144 145 146 .SECTION program,CODE,ALIGN 147 .align 148 ;## # C_SRC : { 149 .glb $act_tsk 150 000000 $act_tsk: 151 000000 EC0A enter #0aH 152 000002 8F40 pushm R1 153 000004 31F6 S mov.w R0,-10[FB] ; tskid tskid 154 ;## # C_SRC : return (intnest > 0); 155 000006 E6D00000r Q cmp.b #00H,__kernel_intnest:16 156 00000A 8B04 jleu L295 157 00000C F9A1 Q mov.w #0001H,R0 158 00000E 4A S jmp L297 159 00000F L295: 160 00000F 03 Z mov.w #0000H,R0 161 000010 L297: 162 ;## # C_SRC : CHECK_TSKCTX_UNL(); 163 000010 E990 Q cmp.w #0000H,R0 164 000012 9A06 jne L401 165 ;## # C_SRC : return lock_flag; 166 000014 190000r S mov.w __kernel_lock_flag:16,R0 167 ;## # C_SRC : CHECK_TSKCTX_UNL(); 168 000017 DA08 jeq L285 169 000019 L401: 170 000019 35F8E7FF S mov.w #0ffe7H,-8[FB] ; ercd 171 00001D CE8900 W jmp L395 172 000020 L285: 173 ;## # C_SRC : CHECK_TSKID_SELF(tskid); 174 000020 E3D1F6 Q cmp.w #0001H,-10[FB] ; tskid 175 000023 FA09 jlt L413 176 000025 B3E6000000rF6 cmp.w __kernel_tmax_tskid,-10[FB] ; tskid 177 00002B EB0B jle L311 178 00002D L413: 179 00002D 39F6 S mov.w -10[FB],R0 ; tskid 180 00002F DA07 jeq L425 181 000031 35F8EEFF S mov.w #0ffeeH,-8[FB] ; ercd 182 000035 BB71 B jmp L395 183 000037 L425: 184 000037 L311: 185 ;## # C_SRC : itskpri = get_ipri_self(tskid); 186 000037 39F6 S mov.w -10[FB],R0 ; tskid * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 004 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 187 000039 CD000000r A jsr $_kernel_get_ipri_self 188 00003D 31F6 S mov.w R0,-10[FB] ; itskpri 189 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 190 ;#### ASM START 191 00003F 01D3DAFA stc flg, -6[FB] 192 ;#### ASM END 193 ;## # C_SRC : return ipl; 194 000043 39FA S mov.w -6[FB],R0 ; ipl 195 ;## # C_SRC : { 196 000045 883F8F and.b #8fH,R0H 197 000048 882F50 or.b #50H,R0H 198 00004B 31FC S mov.w R0,-4[FB] ; ipl 199 ;## # C_SRC : uint16_t flg_reg = ipl; 200 00004D 93FBFCFE mov.w -4[FB],-2[FB] ; ipl flg_reg 201 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 202 ;#### ASM START 203 000051 01D3CAFE ldc -2[FB], flg 204 ;#### ASM END 205 ;## # C_SRC : lock_flag = true; 206 000055 F7E10000r Q mov.w #0001H,__kernel_lock_flag:16 207 ;## # C_SRC : if (test_dormant(itskpri)) { 208 000059 39F6 S mov.w -10[FB],R0 ; itskpri 209 00005B CD000000r A jsr $_kernel_test_dormant 210 00005F E990 Q cmp.w #0000H,R0 211 000061 DA15 jeq L371 212 ;## # C_SRC : if(make_active(itskpri)) { 213 000063 39F6 S mov.w -10[FB],R0 ; itskpri 214 000065 CD000000r A jsr $_kernel_make_active 215 000069 E990 Q cmp.w #0000H,R0 216 00006B DA07 jeq L367 217 ;## # C_SRC : run_task(itskpri); 218 00006D 39F6 S mov.w -10[FB],R0 ; itskpri 219 00006F CD000000r A jsr $_kernel_run_task 220 000073 L367: 221 ;## # C_SRC : ercd = E_OK; 222 000073 33F8 Z mov.w #0000H,-8[FB] ; ercd 223 ;## # C_SRC : } 224 000075 BB2C B jmp L379 225 ;## # C_SRC : else if(!actque_test(itskpri)) { 226 000077 L371: 227 ;## # C_SRC : { 228 000077 93FBF6FC mov.w -10[FB],-4[FB] ; itskpri ipri 229 ;## # C_SRC : return ((actque_bitmap & ACTQUE_BIT(ipri)) != 0U); 230 00007B 987BFC mov.b -4[FB],R1H ; ipri 231 00007E F9A1 Q mov.w #0001H,R0 232 000080 A9BE shl.w R1H,R0 233 000082 B9BD0000r and.w _actque_bitmap:16,R0 234 000086 D9B2 scnz R0 235 ;## # C_SRC : else if(!actque_test(itskpri)) { 236 000088 E990 Q cmp.w #0000H,R0 237 00008A 9A13 jne L377 238 ;## # C_SRC : { 239 00008C 93FBF6FC mov.w -10[FB],-4[FB] ; itskpri ipri 240 ;## # C_SRC : actque_bitmap |= ACTQUE_BIT(ipri); 241 000090 987BFC mov.b -4[FB],R1H ; ipri 242 000093 F9A1 Q mov.w #0001H,R0 243 000095 A9BE shl.w R1H,R0 244 000097 C7E50000r or.w R0,_actque_bitmap:16 245 ;## # C_SRC : ercd = E_OK; 246 00009B 33F8 Z mov.w #0000H,-8[FB] ; ercd 247 ;## # C_SRC : } 248 00009D 5B S jmp L379 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 005 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 249 ;## # C_SRC : else { 250 00009E L377: 251 ;## # C_SRC : ercd = E_QOVR; 252 00009E 35F8D5FF S mov.w #0ffd5H,-8[FB] ; ercd 253 ;## # C_SRC : } 254 0000A2 L379: 255 ;## # C_SRC : lock_flag = false; 256 0000A2 130000r Z mov.w #0000H,__kernel_lock_flag:16 257 ;## # C_SRC : Asm(" ldipl #0"); 258 ;#### ASM START 259 0000A5 D5E8 ldipl #0 260 ;#### ASM END 261 ;## # C_SRC : } 262 0000A7 L395: 263 ;## # C_SRC : return(ercd); 264 0000A7 39F8 S mov.w -8[FB],R0 ; ercd 265 0000A9 8E02 popm R1 266 0000AB FC exitd 267 0000AC E1: 268 0000AC M2: 269 270 271 ;## # FUNCTION iact_tsk 272 ;## # FRAME AUTO ( tskid) size 2, offset -16 273 ;## # FRAME AUTO ( ercd) size 2, offset -14 274 ;## # FRAME AUTO ( itskpri) size 2, offset -16 275 ;## # FRAME AUTO ( ipl) size 2, offset -12 276 ;## # FRAME AUTO ( ipl) size 2, offset -10 277 ;## # FRAME AUTO ( ipl) size 2, offset -8 278 ;## # FRAME AUTO ( flg_reg) size 2, offset -6 279 ;## # FRAME AUTO ( ipri) size 2, offset -8 280 ;## # FRAME AUTO ( ipri) size 2, offset -8 281 ;## # FRAME AUTO ( ipl) size 2, offset -4 282 ;## # FRAME AUTO ( ipl) size 2, offset -8 283 ;## # FRAME AUTO ( flg_reg) size 2, offset -2 284 ;## # REGISTER ARG ( tskid) size 2, REGISTER R0 285 ;## # ARG Size(0) Auto Size(16) Context Size(8) 286 287 .align 288 ;## # C_SRC : { 289 .glb $iact_tsk 290 0000AC $iact_tsk: 291 0000AC EC10 enter #010H 292 0000AE 8F40 pushm R1 293 0000B0 31F0 S mov.w R0,-16[FB] ; tskid tskid 294 ;## # C_SRC : return (intnest > 0); 295 0000B2 E6D00000r Q cmp.b #00H,__kernel_intnest:16 296 0000B6 8B04 jleu L439 297 0000B8 F9A1 Q mov.w #0001H,R0 298 0000BA 4A S jmp L441 299 0000BB L439: 300 0000BB 03 Z mov.w #0000H,R0 301 0000BC L441: 302 ;## # C_SRC : CHECK_INTCTX_UNL(); 303 0000BC E990 Q cmp.w #0000H,R0 304 0000BE DA06 jeq L545 305 ;## # C_SRC : return lock_flag; 306 0000C0 190000r S mov.w __kernel_lock_flag:16,R0 307 ;## # C_SRC : CHECK_INTCTX_UNL(); 308 0000C3 DA08 jeq L429 309 0000C5 L545: 310 0000C5 35F2E7FF S mov.w #0ffe7H,-14[FB] ; ercd * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 006 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 311 0000C9 CEAD00 W jmp L537 312 0000CC L429: 313 ;## # C_SRC : CHECK_TSKID(tskid); 314 0000CC E3D1F0 Q cmp.w #0001H,-16[FB] ; tskid 315 0000CF FA09 jlt L557 316 0000D1 B3E6000000rF0 cmp.w __kernel_tmax_tskid,-16[FB] ; tskid 317 0000D7 EB08 jle L459 318 0000D9 L557: 319 0000D9 35F2EEFF S mov.w #0ffeeH,-14[FB] ; ercd 320 0000DD CE9900 W jmp L537 321 0000E0 L459: 322 ;## # C_SRC : itskpri = get_ipri(tskid); 323 0000E0 39F0 S mov.w -16[FB],R0 ; tskid 324 0000E2 CD000000r A jsr $_kernel_get_ipri 325 0000E6 31F0 S mov.w R0,-16[FB] ; itskpri 326 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 327 ;#### ASM START 328 0000E8 01D3DAF4 stc flg, -12[FB] 329 ;#### ASM END 330 ;## # C_SRC : return ipl; 331 0000EC 39F4 S mov.w -12[FB],R0 ; ipl 332 ;## # C_SRC : ipl = get_flgreg(); 333 0000EE 31F6 S mov.w R0,-10[FB] ; ipl 334 ;## # C_SRC : if (IPL_LOCK > ipl) { 335 0000F0 77F60050 S cmp.w #5000H,-10[FB] ; ipl 336 0000F4 CA13 jgeu L499 337 ;## # C_SRC : { 338 0000F6 39F6 S mov.w -10[FB],R0 ; ipl 339 0000F8 883F8F and.b #8fH,R0H 340 0000FB 882F50 or.b #50H,R0H 341 0000FE 31F8 S mov.w R0,-8[FB] ; ipl 342 ;## # C_SRC : uint16_t flg_reg = ipl; 343 000100 93FBF8FA mov.w -8[FB],-6[FB] ; ipl flg_reg 344 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 345 ;#### ASM START 346 000104 01D3CAFA ldc -6[FB], flg 347 ;#### ASM END 348 000108 L499: 349 ;## # C_SRC : saved_ipl = ipl; 350 000108 97FBF60000r mov.w -10[FB],__kernel_saved_ipl:16 ; ipl 351 ;## # C_SRC : lock_flag = true; 352 00010D F7E10000r Q mov.w #0001H,__kernel_lock_flag:16 353 ;## # C_SRC : if (test_dormant(itskpri)) { 354 000111 39F0 S mov.w -16[FB],R0 ; itskpri 355 000113 CD000000r A jsr $_kernel_test_dormant 356 000117 E990 Q cmp.w #0000H,R0 357 000119 DA13 jeq L511 358 ;## # C_SRC : if(make_active(itskpri)) { 359 00011B 39F0 S mov.w -16[FB],R0 ; itskpri 360 00011D CD000000r A jsr $_kernel_make_active 361 000121 E990 Q cmp.w #0000H,R0 362 000123 97DF0000r0100 stnz.w #0001H,__kernel_reqflg:16 363 ;## # C_SRC : ercd = E_OK; 364 000129 33F2 Z mov.w #0000H,-14[FB] ; ercd 365 ;## # C_SRC : } 366 00012B BB2C B jmp L519 367 ;## # C_SRC : else if(!actque_test(itskpri)) { 368 00012D L511: 369 ;## # C_SRC : { 370 00012D 93FBF0F8 mov.w -16[FB],-8[FB] ; itskpri ipri 371 ;## # C_SRC : return ((actque_bitmap & ACTQUE_BIT(ipri)) != 0U); 372 000131 987BF8 mov.b -8[FB],R1H ; ipri * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 007 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 373 000134 F9A1 Q mov.w #0001H,R0 374 000136 A9BE shl.w R1H,R0 375 000138 B9BD0000r and.w _actque_bitmap:16,R0 376 00013C D9B2 scnz R0 377 ;## # C_SRC : else if(!actque_test(itskpri)) { 378 00013E E990 Q cmp.w #0000H,R0 379 000140 9A13 jne L517 380 ;## # C_SRC : { 381 000142 93FBF0F8 mov.w -16[FB],-8[FB] ; itskpri ipri 382 ;## # C_SRC : actque_bitmap |= ACTQUE_BIT(ipri); 383 000146 987BF8 mov.b -8[FB],R1H ; ipri 384 000149 F9A1 Q mov.w #0001H,R0 385 00014B A9BE shl.w R1H,R0 386 00014D C7E50000r or.w R0,_actque_bitmap:16 387 ;## # C_SRC : ercd = E_OK; 388 000151 33F2 Z mov.w #0000H,-14[FB] ; ercd 389 ;## # C_SRC : } 390 000153 5B S jmp L519 391 ;## # C_SRC : else { 392 000154 L517: 393 ;## # C_SRC : ercd = E_QOVR; 394 000154 35F2D5FF S mov.w #0ffd5H,-14[FB] ; ercd 395 ;## # C_SRC : } 396 000158 L519: 397 ;## # C_SRC : lock_flag = false; 398 000158 130000r Z mov.w #0000H,__kernel_lock_flag:16 399 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 400 ;#### ASM START 401 00015B 01D3DAFC stc flg, -4[FB] 402 ;#### ASM END 403 ;## # C_SRC : return ipl; 404 00015F 39FC S mov.w -4[FB],R0 ; ipl 405 ;## # C_SRC : { 406 000161 5F0000r S mov.w __kernel_saved_ipl:16,R1 407 000164 89FF0070 and.w #7000H,R1 408 000168 883F8F and.b #8fH,R0H 409 00016B C9B5 or.w R1,R0 410 00016D 31F8 S mov.w R0,-8[FB] ; ipl 411 ;## # C_SRC : uint16_t flg_reg = ipl; 412 00016F 93FBF8FE mov.w -8[FB],-2[FB] ; ipl flg_reg 413 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 414 ;#### ASM START 415 000173 01D3CAFE ldc -2[FB], flg 416 ;#### ASM END 417 ;## # C_SRC : } 418 000177 L537: 419 ;## # C_SRC : return(ercd); 420 000177 39F2 S mov.w -14[FB],R0 ; ercd 421 000179 8E02 popm R1 422 00017B FC exitd 423 00017C E2: 424 00017C M5: 425 426 .glb $psnd_dtq 427 .glb $ipsnd_dtq 428 .glb $prcv_dtq 429 .glb $set_flg 430 .glb $iset_flg 431 .glb $clr_flg 432 .glb $pol_flg 433 .glb _loc_cpu 434 .glb _iloc_cpu * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 008 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 435 .glb _unl_cpu 436 .glb _iunl_cpu 437 .glb _dis_dsp 438 .glb _ena_dsp 439 .glb _sns_ctx 440 .glb _sns_loc 441 .glb _sns_dsp 442 .glb _sns_dpn 443 .glb _sns_ker 444 .glb _ext_ker 445 .glb $dis_int 446 .glb $ena_int 447 .glb $sta_cyc 448 .glb $stp_cyc 449 .glb $sta_alm 450 .glb $stp_alm 451 .glb _get_tim 452 .glb $syslog_wri_log 453 .glb _syslog_printf 454 .glb _syslog_print 455 .glb $syslog_lostmsg 456 .glb _syslog 457 .glb _sil_dly_nse 458 .glb $target_fput_log 459 .glb _sio_initialize 460 .glb $sio_opn_por 461 .glb _sio_cls_por 462 .glb _sio_isr_rcv 463 .glb _sio_isr_snd 464 .glb _sio_snd_chr 465 .glb _sio_rcv_chr 466 .glb _sio_ena_cbr 467 .glb _sio_dis_cbr 468 .glb _sio_irdy_snd 469 .glb _sio_irdy_rcv 470 .glb $sio_pol_snd_chr 471 .glb __kernel_target_initialize 472 .glb __kernel_target_exit 473 .glb __kernel_intnest 474 .glb __kernel_lock_flag 475 .glb __kernel_saved_ipl 476 .glb __kernel_intc_reg 477 .glb __kernel_intpri_table 478 .glb $_kernel_x_config_int 479 .glb __kernel_prc_initialize 480 .glb __kernel_start_dispatch 481 .glb __kernel_call_exit_kernel 482 .glb __kernel_prc_terminate 483 .glb __kernel_initialize_object 484 .glb __kernel_call_inirtn 485 .glb __kernel_call_terrtn 486 .glb _istksz 487 .glb _istk 488 .glb __kernel_kerflg 489 .glb _sta_ker 490 .glb __kernel_exit_kernel 491 .glb __kernel_tmax_tskid 492 .glb __kernel_ready_primap 493 .glb _actque_bitmap 494 .glb __kernel_reqflg 495 .glb __kernel_disdsp 496 .glb __kernel_runtsk_curpri * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 009 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 497 .glb __kernel_runtsk_ipri 498 .glb __kernel_initialize_task 499 .glb $_kernel_make_active 500 .glb $_kernel_test_dormant 501 .glb __kernel_search_schedtsk 502 .glb $_kernel_run_task 503 .glb __kernel_dispatcher 504 .glb $_kernel_get_ipri_self 505 .glb $_kernel_get_ipri 506 ;################################# 507 ;### STATIC DATA INFORMATION ### 508 ;################################# 509 ;################################# 510 ;################################# 511 ;################################# 512 513 .END Information List TOTAL ERROR(S) 00000 TOTAL WARNING(S) 00000 TOTAL LINE(S) 00513 LINES Section List Attr Size Name CODE 00000380(00017CH) program