* M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 001 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 1 2 ;## C Compiler OUTPUT 3 ;## ccom308 Version 5.05.01.000 4 ;## Copyright(C) 1999(2005). Renesas Technology Corp. 5 ;## and Renesas Solutions Corp., All Rights Reserved. 6 ;## Compile Start Time Fri Jun 27 17:36:29 2014 7 8 ;## COMMAND_LINE: ccom308 C:\Users\Administrator\Downloads\ssp_rsk_r8c23_hew-20140307\ssp\target\rsk_m32c87_hew\ssp_workspace\libkernel\Debug\prc_confi 9 10 11 ;## Normal Optimize OFF 12 ;## ROM size Optimize OFF 13 ;## Speed Optimize OFF 14 ;## Default ROM is far 15 ;## Default RAM is near 16 17 .GLB __SB__ 18 .SB __SB__ 19 .FB 0 20 21 22 23 24 25 ;## # FUNCTION TOPPERS_assert_abort 26 27 28 29 30 ;## # FUNCTION _syslog_0 31 32 ;## # FUNCTION _syslog_1 33 34 ;## # FUNCTION _syslog_2 35 36 ;## # FUNCTION _syslog_3 37 38 ;## # FUNCTION _syslog_4 39 40 ;## # FUNCTION _syslog_5 41 42 ;## # FUNCTION _syslog_6 43 44 45 ;## # FUNCTION get_flgreg 46 47 ;## # FUNCTION set_flgreg 48 49 ;## # FUNCTION clr_ipl 50 51 ;## # FUNCTION disint 52 53 ;## # FUNCTION enaint 54 55 ;## # FUNCTION jmp_dispatcher 56 57 58 ;## # FUNCTION TOPPERS_disint 59 60 ;## # FUNCTION TOPPERS_enaint 61 62 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 002 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 63 ;## # FUNCTION sil_reb_mem 64 65 ;## # FUNCTION sil_wrb_mem 66 67 ;## # FUNCTION sil_reh_mem 68 69 ;## # FUNCTION sil_wrh_mem 70 71 ;## # FUNCTION sil_reh_bem 72 73 ;## # FUNCTION sil_wrh_bem 74 75 ;## # FUNCTION sil_rew_mem 76 77 ;## # FUNCTION sil_wrw_mem 78 79 ;## # FUNCTION sil_rew_bem 80 81 ;## # FUNCTION sil_wrw_bem 82 83 84 85 86 87 ;## # FUNCTION reset_isp 88 89 90 ;## # FUNCTION sense_context 91 92 ;## # FUNCTION t_lock_cpu 93 94 ;## # FUNCTION i_lock_cpu 95 96 ;## # FUNCTION t_unlock_cpu 97 98 ;## # FUNCTION i_unlock_cpu 99 100 ;## # FUNCTION x_sense_lock 101 102 ;## # FUNCTION x_set_ipm 103 104 ;## # FUNCTION x_get_ipm 105 106 ;## # FUNCTION x_disable_int 107 108 ;## # FUNCTION x_enable_int 109 110 ;## # FUNCTION x_clear_int 111 112 ;## # FUNCTION x_probe_int 113 114 ;## # FUNCTION x_define_inh 115 116 ;## # FUNCTION i_begin_int 117 118 ;## # FUNCTION i_end_int 119 120 ;## # FUNCTION x_define_exc 121 122 ;## # FUNCTION idle_loop 123 124 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 003 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 125 126 ;## # FUNCTION _kernel_start_dispatch 127 ;## # ARG Size(0) Auto Size(0) Context Size(4) 128 129 130 .SECTION program,CODE,ALIGN 131 .align 132 ;## # C_SRC : { 133 .glb __kernel_start_dispatch 134 000000 __kernel_start_dispatch: 135 ;## # C_SRC : Asm(" fset i"); 136 ;#### ASM START 137 000000 D1EE fset i 138 ;## # C_SRC : Asm(" .glb __kernel_istkpt"); 139 .glb __kernel_istkpt 140 ;## # C_SRC : Asm(" ldc __kernel_istkpt, isp"); 141 000002 D787000000r ldc __kernel_istkpt, isp 142 ;## # C_SRC : Asm(" .glb __kernel_dispatcher"); 143 .glb __kernel_dispatcher 144 ;## # C_SRC : Asm(" jmp __kernel_dispatcher"); 145 000007 CC000000r A jmp __kernel_dispatcher 146 ;#### ASM END 147 ;## # C_SRC : } 148 00000B DF rts 149 00000C E1: 150 00000C M1: 151 152 153 ;## # FUNCTION _kernel_prc_initialize 154 ;## # FRAME AUTO ( ipl) size 2, offset -6 155 ;## # FRAME AUTO ( ipl) size 2, offset -4 156 ;## # FRAME AUTO ( flg_reg) size 2, offset -2 157 ;## # ARG Size(0) Auto Size(6) Context Size(8) 158 159 .align 160 ;## # C_SRC : { 161 .glb __kernel_prc_initialize 162 00000C __kernel_prc_initialize: 163 00000C EC06 enter #06H 164 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 165 ;#### ASM START 166 00000E 01D3DAFA stc flg, -6[FB] 167 ;#### ASM END 168 ;## # C_SRC : return ipl; 169 000012 39FA S mov.w -6[FB],R0 ; ipl 170 ;## # C_SRC : { 171 000014 883F8F and.b #8fH,R0H 172 000017 882F50 or.b #50H,R0H 173 00001A 31FC S mov.w R0,-4[FB] ; ipl 174 ;## # C_SRC : uint16_t flg_reg = ipl; 175 00001C 93FBFCFE mov.w -4[FB],-2[FB] ; ipl flg_reg 176 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 177 ;#### ASM START 178 000020 01D3CAFE ldc -2[FB], flg 179 ;#### ASM END 180 ;## # C_SRC : lock_flag = true; 181 000024 F7E10000r Q mov.w #0001H,__kernel_lock_flag:16 182 ;## # C_SRC : saved_ipl = IPL_ENAALL; 183 000028 130000r Z mov.w #0000H,__kernel_saved_ipl:16 184 ;## # C_SRC : } 185 00002B FC exitd 186 00002C E2: * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 004 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 187 00002C M2: 188 189 190 ;## # FUNCTION _kernel_prc_terminate 191 ;## # ARG Size(0) Auto Size(0) Context Size(4) 192 193 .align 194 ;## # C_SRC : { 195 .glb __kernel_prc_terminate 196 00002C __kernel_prc_terminate: 197 ;## # C_SRC : } 198 00002C DF rts 199 00002D E3: 200 00002D M3: 201 202 203 ;## # FUNCTION _kernel_call_exit_kernel 204 ;## # ARG Size(0) Auto Size(0) Context Size(4) 205 206 00002D DE .align 207 ;## # C_SRC : { 208 .glb __kernel_call_exit_kernel 209 00002E __kernel_call_exit_kernel: 210 ;## # C_SRC : Asm(" .glb __kernel_istkpt"); 211 ;#### ASM START 212 .glb __kernel_istkpt 213 ;## # C_SRC : Asm(" ldc __kernel_istkpt, isp"); 214 00002E D787000000r ldc __kernel_istkpt, isp 215 ;#### ASM END 216 ;## # C_SRC : exit_kernel(); 217 000033 CD000000r A jsr __kernel_exit_kernel 218 ;## # C_SRC : } 219 000037 DF rts 220 000038 E4: 221 000038 M4: 222 223 224 ;## # FUNCTION _kernel_x_config_int 225 ;## # FRAME AUTO ( intno) size 2, offset -4 226 ;## # FRAME AUTO ( intno) size 2, offset -2 227 ;## # FRAME AUTO ( intno) size 2, offset -2 228 ;## # FRAME ARG ( intatr) size 2, offset 8 229 ;## # FRAME ARG ( intpri) size 2, offset 10 230 ;## # REGISTER ARG ( intno) size 2, REGISTER R0 231 ;## # ARG Size(4) Auto Size(4) Context Size(8) 232 233 .align 234 ;## # C_SRC : { 235 .glb $_kernel_x_config_int 236 000038 $_kernel_x_config_int: 237 000038 EC04 enter #04H 238 00003A 8F78 pushm R1,R2,R3,A0 239 00003C 31FC S mov.w R0,-4[FB] ; intno intno 240 ;## # C_SRC : assert(VALID_INTNO_CFGINT(intno)); 241 00003E 77FC4000 S cmp.w #0040H,-4[FB] ; intno 242 000042 CA03 jgeu L287 243 000044 03 Z mov.w #0000H,R0 244 000045 6A S jmp L289 245 000046 L287: 246 ;## # C_SRC : while(1) 247 000046 L291: 248 000046 F9A1 Q mov.w #0001H,R0 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 005 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 249 000048 9AFD jne L291 250 ;## # C_SRC : assert(VALID_INTNO_CFGINT(intno)); 251 00004A 03 Z mov.w #0000H,R0 252 00004B L289: 253 ;## # C_SRC : assert(TMIN_INTPRI <= intpri && intpri <= TMAX_INTPRI); 254 00004B E3DB0A Q cmp.w #0fffbH,10[FB] ; intpri 255 00004E FA08 jlt L325 256 000050 E3DF0A Q cmp.w #0ffffH,10[FB] ; intpri 257 000053 AB03 jgt L439 258 000055 03 Z mov.w #0000H,R0 259 000056 6A S jmp L327 260 000057 L439: 261 000057 L325: 262 ;## # C_SRC : while(1) 263 000057 L329: 264 000057 F9A1 Q mov.w #0001H,R0 265 000059 9AFD jne L329 266 ;## # C_SRC : assert(TMIN_INTPRI <= intpri && intpri <= TMAX_INTPRI); 267 00005B 03 Z mov.w #0000H,R0 268 00005C L327: 269 ;## # C_SRC : { 270 00005C 93FBFCFE mov.w -4[FB],-2[FB] ; intno intno 271 ;## # C_SRC : if(intpri_table[intno] == 0U) 272 000060 39FE S mov.w -2[FB],R0 ; intno 273 000062 F920 Q mov.w #0H,R2 274 000064 C1A3 mov.l R2R0,A0 275 000066 81A2 add.l A0,A0 276 000068 B98B000000r mov.w __kernel_intpri_table[A0],R0 277 00006D 9A04 jne L341 278 ;## # C_SRC : return (false); 279 00006F 03 Z mov.w #0000H,R0 280 000070 BB1B B jmp L343 281 000072 L341: 282 ;## # C_SRC : *intc_reg[intno] &= ~INTC_LVLMASK; 283 000072 39FE S mov.w -2[FB],R0 ; intno 284 000074 F920 Q mov.w #0H,R2 285 000076 C1A3 mov.l R2R0,A0 286 000078 80A102 shlnc.l #2,A0 287 00007B B983000000r mov.l __kernel_intc_reg[A0],R2R0 288 000080 C1A3 mov.l R2R0,A0 289 000082 0188CB extz [A0],R1 290 000085 88FFF8 and.b #0f8H,R1L 291 000088 C03B mov.b R1L,[A0] 292 ;## # C_SRC : return(true); 293 00008A F9A1 Q mov.w #0001H,R0 294 ;## # C_SRC : } 295 00008C L343: 296 ;## # C_SRC : if((intatr & TA_POSEDGE) != 0U) 297 00008C D2C108 btst 1,8[FB] ; intatr 298 00008F DA27 jz L347 299 ;## # C_SRC : *(intc_reg[intno]) = (*(intc_reg[intno]) & ~INTC_LVSMASK) | INTC_POLHIGH; 300 000091 39FC S mov.w -4[FB],R0 ; intno 301 000093 F920 Q mov.w #0H,R2 302 000095 C1A3 mov.l R2R0,A0 303 000097 80A102 shlnc.l #2,A0 304 00009A B183000000r mov.l __kernel_intc_reg[A0],A0 305 00009F 01888B extz [A0],R0 306 0000A2 D8B5 bclr 05H,R0L 307 0000A4 D8BC bset 4,R0L 308 0000A6 7FFC S mov.w -4[FB],R1 ; intno 309 0000A8 F960 Q mov.w #0H,R3 310 0000AA C1B3 mov.l R3R1,A0 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 006 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 311 0000AC 80A102 shlnc.l #2,A0 312 0000AF 09C62B000000r mov.b R0L,[__kernel_intc_reg[A0]] 313 ;## # C_SRC : } 314 0000B5 BB7B B jmp L441 315 ;## # C_SRC : else if((intatr & TA_NEGEDGE) != 0U) 316 0000B7 L347: 317 0000B7 D2C208 btst 2,8[FB] ; intatr 318 0000BA DA2E jz L357 319 ;## # C_SRC : *(intc_reg[intno]) &= (*(intc_reg[intno]) & ~(INTC_POLMASK|INTC_LVSMASK)); 320 0000BC 39FC S mov.w -4[FB],R0 ; intno 321 0000BE F920 Q mov.w #0H,R2 322 0000C0 C1A3 mov.l R2R0,A0 323 0000C2 80A102 shlnc.l #2,A0 324 0000C5 B983000000r mov.l __kernel_intc_reg[A0],R2R0 325 0000CA 7FFC S mov.w -4[FB],R1 ; intno 326 0000CC F960 Q mov.w #0H,R3 327 0000CE C1B3 mov.l R3R1,A0 328 0000D0 80A102 shlnc.l #2,A0 329 0000D3 B183000000r mov.l __kernel_intc_reg[A0],A0 330 0000D8 0188CB extz [A0],R1 331 0000DB 88FFCF and.b #0cfH,R1L 332 0000DE C1A3 mov.l R2R0,A0 333 0000E0 01888B extz [A0],R0 334 0000E3 C9BD and.w R1,R0 335 0000E5 C02B mov.b R0L,[A0] 336 ;## # C_SRC : } 337 0000E7 BB49 B jmp L441 338 ;## # C_SRC : else if((intatr & TA_HIGHLEVEL) != 0U) 339 0000E9 L357: 340 0000E9 D2C308 btst 3,8[FB] ; intatr 341 0000EC DA1B jz L367 342 ;## # C_SRC : *(intc_reg[intno]) |= (INTC_POLHIGH | INTC_LVSLVL); 343 0000EE 39FC S mov.w -4[FB],R0 ; intno 344 0000F0 F920 Q mov.w #0H,R2 345 0000F2 C1A3 mov.l R2R0,A0 346 0000F4 80A102 shlnc.l #2,A0 347 0000F7 B983000000r mov.l __kernel_intc_reg[A0],R2R0 348 0000FC C1A3 mov.l R2R0,A0 349 0000FE 0188CB extz [A0],R1 350 000101 88EF30 or.b #30H,R1L 351 000104 C03B mov.b R1L,[A0] 352 ;## # C_SRC : } 353 000106 BB2A B jmp L441 354 ;## # C_SRC : else if((intatr & TA_LOWLEVEL) != 0U) 355 000108 L367: 356 000108 D2C408 btst 4,8[FB] ; intatr 357 00010B DA25 jz L377 358 ;## # C_SRC : *(intc_reg[intno]) = (*(intc_reg[intno]) & ~INTC_POLMASK) | INTC_LVSLVL; 359 00010D 39FC S mov.w -4[FB],R0 ; intno 360 00010F F920 Q mov.w #0H,R2 361 000111 C1A3 mov.l R2R0,A0 362 000113 80A102 shlnc.l #2,A0 363 000116 B183000000r mov.l __kernel_intc_reg[A0],A0 364 00011B 01888B extz [A0],R0 365 00011E D8B4 bclr 04H,R0L 366 000120 D8BD bset 5,R0L 367 000122 7FFC S mov.w -4[FB],R1 ; intno 368 000124 F960 Q mov.w #0H,R3 369 000126 C1B3 mov.l R3R1,A0 370 000128 80A102 shlnc.l #2,A0 371 00012B 09C62B000000r mov.b R0L,[__kernel_intc_reg[A0]] 372 000131 L377: * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 007 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 373 000131 L441: 374 ;## # C_SRC : if ((intatr & TA_ENAINT) != 0U) { 375 000131 D2C008 btst 0,8[FB] ; intatr 376 000134 DA4C jz L399 377 ;## # C_SRC : { 378 000136 93FBFCFE mov.w -4[FB],-2[FB] ; intno intno 379 ;## # C_SRC : if(intpri_table[intno] == 0u) 380 00013A 39FE S mov.w -2[FB],R0 ; intno 381 00013C F920 Q mov.w #0H,R2 382 00013E C1A3 mov.l R2R0,A0 383 000140 81A2 add.l A0,A0 384 000142 B98B000000r mov.w __kernel_intpri_table[A0],R0 385 000147 9A04 jne L393 386 ;## # C_SRC : return (false); 387 000149 03 Z mov.w #0000H,R0 388 00014A BB36 B jmp L443 389 00014C L393: 390 ;## # C_SRC : *intc_reg[intno] = (*intc_reg[intno] & ~INTC_LVLMASK) | IPM2ILVL(intpri_table[intno]); 391 00014C 39FE S mov.w -2[FB],R0 ; intno 392 00014E F920 Q mov.w #0H,R2 393 000150 C1A3 mov.l R2R0,A0 394 000152 80A102 shlnc.l #2,A0 395 000155 B183000000r mov.l __kernel_intc_reg[A0],A0 396 00015A 01888B extz [A0],R0 397 00015D 4CF8 S and.b #0f8H,R0L 398 00015F 7FFE S mov.w -2[FB],R1 ; intno 399 000161 F960 Q mov.w #0H,R3 400 000163 C1B3 mov.l R3R1,A0 401 000165 81A2 add.l A0,A0 402 000167 B9CB000000r mov.w __kernel_intpri_table[A0],R1 403 00016C A9EF neg.w R1 404 00016E C9B5 or.w R1,R0 405 000170 7FFE S mov.w -2[FB],R1 ; intno 406 000172 F960 Q mov.w #0H,R3 407 000174 C1B3 mov.l R3R1,A0 408 000176 80A102 shlnc.l #2,A0 409 000179 09C62B000000r mov.b R0L,[__kernel_intc_reg[A0]] 410 ;## # C_SRC : return(true); 411 00017F F9A1 Q mov.w #0001H,R0 412 000181 L443: 413 000181 L399: 414 ;## # C_SRC : } 415 000181 8E1E popm R1,R2,R3,A0 416 000183 FC exitd 417 000184 E5: 418 000184 M5: 419 420 421 422 ;## # FUNCTION actque_set 423 424 ;## # FUNCTION actque_clear 425 426 ;## # FUNCTION actque_test 427 428 429 ;## # FUNCTION _kernel_interrupt_dispatch 430 ;## # FRAME AUTO ( ipl) size 2, offset -6 431 ;## # FRAME AUTO ( ipl) size 2, offset -4 432 ;## # FRAME AUTO ( flg_reg) size 2, offset -2 433 ;## # ARG Size(0) Auto Size(6) Context Size(8) 434 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 008 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 435 .align 436 ;## # C_SRC : { 437 .glb __kernel_interrupt_dispatch 438 000184 __kernel_interrupt_dispatch: 439 000184 EC06 enter #06H 440 ;## # C_SRC : lock_flag = true; 441 000186 F7E10000r Q mov.w #0001H,__kernel_lock_flag:16 442 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 443 ;#### ASM START 444 00018A 01D3DAFA stc flg, -6[FB] 445 ;#### ASM END 446 ;## # C_SRC : return ipl; 447 00018E 39FA S mov.w -6[FB],R0 ; ipl 448 ;## # C_SRC : { 449 000190 883F8F and.b #8fH,R0H 450 000193 882F50 or.b #50H,R0H 451 000196 31FC S mov.w R0,-4[FB] ; ipl 452 ;## # C_SRC : uint16_t flg_reg = ipl; 453 000198 93FBFCFE mov.w -4[FB],-2[FB] ; ipl flg_reg 454 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 455 ;#### ASM START 456 00019C 01D3CAFE ldc -2[FB], flg 457 ;## # C_SRC : Asm(" fset i"); 458 0001A0 D1EE fset i 459 ;#### ASM END 460 ;## # C_SRC : run_task(search_schedtsk()); 461 0001A2 CD000000r A jsr __kernel_search_schedtsk 462 0001A6 CD000000r A jsr $_kernel_run_task 463 ;## # C_SRC : } 464 0001AA FC exitd 465 0001AB E6: 466 0001AB M6: 467 468 .glb $act_tsk 469 .glb $iact_tsk 470 .glb $psnd_dtq 471 .glb $ipsnd_dtq 472 .glb $prcv_dtq 473 .glb $set_flg 474 .glb $iset_flg 475 .glb $clr_flg 476 .glb $pol_flg 477 .glb _loc_cpu 478 .glb _iloc_cpu 479 .glb _unl_cpu 480 .glb _iunl_cpu 481 .glb _dis_dsp 482 .glb _ena_dsp 483 .glb _sns_ctx 484 .glb _sns_loc 485 .glb _sns_dsp 486 .glb _sns_dpn 487 .glb _sns_ker 488 .glb _ext_ker 489 .glb $dis_int 490 .glb $ena_int 491 .glb $sta_cyc 492 .glb $stp_cyc 493 .glb $sta_alm 494 .glb $stp_alm 495 .glb _get_tim 496 .glb $syslog_wri_log * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 009 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 497 .glb _syslog_printf 498 .glb _syslog_print 499 .glb $syslog_lostmsg 500 .glb _syslog 501 .glb _sil_dly_nse 502 .glb $target_fput_log 503 .glb _sio_initialize 504 .glb $sio_opn_por 505 .glb _sio_cls_por 506 .glb _sio_isr_rcv 507 .glb _sio_isr_snd 508 .glb _sio_snd_chr 509 .glb _sio_rcv_chr 510 .glb _sio_ena_cbr 511 .glb _sio_dis_cbr 512 .glb _sio_irdy_snd 513 .glb _sio_irdy_rcv 514 .glb $sio_pol_snd_chr 515 .glb __kernel_target_initialize 516 .glb __kernel_target_exit 517 .glb __kernel_intpri_table 518 .glb __kernel_initialize_object 519 .glb __kernel_call_inirtn 520 .glb __kernel_call_terrtn 521 .glb _istksz 522 .glb _istk 523 .glb __kernel_kerflg 524 .glb _sta_ker 525 .glb __kernel_exit_kernel 526 .glb __kernel_tmax_tskid 527 .glb __kernel_ready_primap 528 .glb _actque_bitmap 529 .glb __kernel_reqflg 530 .glb __kernel_disdsp 531 .glb __kernel_runtsk_curpri 532 .glb __kernel_runtsk_ipri 533 .glb __kernel_initialize_task 534 .glb $_kernel_make_active 535 .glb $_kernel_test_dormant 536 .glb __kernel_search_schedtsk 537 .glb $_kernel_run_task 538 .glb __kernel_dispatcher 539 .glb $_kernel_get_ipri_self 540 .glb $_kernel_get_ipri 541 542 .SECTION bss_NE,DATA,ALIGN 543 .glb __kernel_lock_flag 544 000000 __kernel_lock_flag: 545 000000(000002H) .blkb 2 546 .glb __kernel_saved_ipl 547 000002 __kernel_saved_ipl: 548 000002(000002H) .blkb 2 549 550 .SECTION bss_NO,DATA 551 .glb __kernel_intnest 552 000000 __kernel_intnest: 553 000000(000001H) .blkb 1 554 555 .SECTION rom_FE,ROMDATA,ALIGN 556 .glb __kernel_intc_reg 557 000000 __kernel_intc_reg: 558 000000 0000 .word 0000H * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 010 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 559 000002 0000 .word 0000H 560 000004 0000 .word 0000H 561 000006 0000 .word 0000H 562 000008 0000 .word 0000H 563 00000A 0000 .word 0000H 564 00000C 0000 .word 0000H 565 00000E 0000 .word 0000H 566 000010 0000 .word 0000H 567 000012 0000 .word 0000H 568 000014 0000 .word 0000H 569 000016 0000 .word 0000H 570 000018 0000 .word 0000H 571 00001A 0000 .word 0000H 572 00001C 0000 .word 0000H 573 00001E 0000 .word 0000H 574 000020 6800 .word 0068H 575 000022 0000 .word 0000H 576 000024 8800 .word 0088H 577 000026 0000 .word 0000H 578 000028 6A00 .word 006aH 579 00002A 0000 .word 0000H 580 00002C 8A00 .word 008aH 581 00002E 0000 .word 0000H 582 000030 6C00 .word 006cH 583 000032 0000 .word 0000H 584 000034 8C00 .word 008cH 585 000036 0000 .word 0000H 586 000038 6E00 .word 006eH 587 00003A 0000 .word 0000H 588 00003C 8E00 .word 008eH 589 00003E 0000 .word 0000H 590 000040 7000 .word 0070H 591 000042 0000 .word 0000H 592 000044 9000 .word 0090H 593 000046 0000 .word 0000H 594 000048 7200 .word 0072H 595 00004A 0000 .word 0000H 596 00004C 9200 .word 0092H 597 00004E 0000 .word 0000H 598 000050 7400 .word 0074H 599 000052 0000 .word 0000H 600 000054 9400 .word 0094H 601 000056 0000 .word 0000H 602 000058 7600 .word 0076H 603 00005A 0000 .word 0000H 604 00005C 9600 .word 0096H 605 00005E 0000 .word 0000H 606 000060 7800 .word 0078H 607 000062 0000 .word 0000H 608 000064 9800 .word 0098H 609 000066 0000 .word 0000H 610 000068 7A00 .word 007aH 611 00006A 0000 .word 0000H 612 00006C 9A00 .word 009aH 613 00006E 0000 .word 0000H 614 000070 7C00 .word 007cH 615 000072 0000 .word 0000H 616 000074 9C00 .word 009cH 617 000076 0000 .word 0000H 618 000078 7E00 .word 007eH 619 00007A 0000 .word 0000H 620 00007C 9E00 .word 009eH * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 011 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 621 00007E 0000 .word 0000H 622 000080 6900 .word 0069H 623 000082 0000 .word 0000H 624 000084 8900 .word 0089H 625 000086 0000 .word 0000H 626 000088 6B00 .word 006bH 627 00008A 0000 .word 0000H 628 00008C 8B00 .word 008bH 629 00008E 0000 .word 0000H 630 000090 6D00 .word 006dH 631 000092 0000 .word 0000H 632 000094 8D00 .word 008dH 633 000096 0000 .word 0000H 634 000098 6F00 .word 006fH 635 00009A 0000 .word 0000H 636 00009C 8F00 .word 008fH 637 00009E 0000 .word 0000H 638 0000A0 7100 .word 0071H 639 0000A2 0000 .word 0000H 640 0000A4 9100 .word 0091H 641 0000A6 0000 .word 0000H 642 0000A8 7300 .word 0073H 643 0000AA 0000 .word 0000H 644 0000AC 9300 .word 0093H 645 0000AE 0000 .word 0000H 646 0000B0 7500 .word 0075H 647 0000B2 0000 .word 0000H 648 0000B4 9500 .word 0095H 649 0000B6 0000 .word 0000H 650 0000B8 7700 .word 0077H 651 0000BA 0000 .word 0000H 652 0000BC 9700 .word 0097H 653 0000BE 0000 .word 0000H 654 0000C0 7900 .word 0079H 655 0000C2 0000 .word 0000H 656 0000C4 9900 .word 0099H 657 0000C6 0000 .word 0000H 658 0000C8 0000 .word 0000H 659 0000CA 0000 .word 0000H 660 0000CC 0000 .word 0000H 661 0000CE 0000 .word 0000H 662 0000D0 7D00 .word 007dH 663 0000D2 0000 .word 0000H 664 0000D4 9D00 .word 009dH 665 0000D6 0000 .word 0000H 666 0000D8 7F00 .word 007fH 667 0000DA 0000 .word 0000H 668 0000DC 0000 .word 0000H 669 0000DE 0000 .word 0000H 670 0000E0 0000 .word 0000H 671 0000E2 0000 .word 0000H 672 0000E4 8100 .word 0081H 673 0000E6 0000 .word 0000H 674 0000E8 0000 .word 0000H 675 0000EA 0000 .word 0000H 676 0000EC 0000 .word 0000H 677 0000EE 0000 .word 0000H 678 0000F0 0000 .word 0000H 679 0000F2 0000 .word 0000H 680 0000F4 0000 .word 0000H 681 0000F6 0000 .word 0000H 682 0000F8 0000 .word 0000H * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 012 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 683 0000FA 0000 .word 0000H 684 0000FC 0000 .word 0000H 685 0000FE 0000 .word 0000H 686 ;################################# 687 ;### STATIC DATA INFORMATION ### 688 ;################################# 689 ;################################# 690 ;################################# 691 ;################################# 692 693 .END Information List TOTAL ERROR(S) 00000 TOTAL WARNING(S) 00000 TOTAL LINE(S) 00693 LINES Section List Attr Size Name CODE 00000427(0001ABH) program DATA 00000004(000004H) bss_NE DATA 00000001(000001H) bss_NO ROMDATA 00000256(000100H) rom_FE