* M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 001 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 1 2 ;## C Compiler OUTPUT 3 ;## ccom308 Version 5.05.01.000 4 ;## Copyright(C) 1999(2005). Renesas Technology Corp. 5 ;## and Renesas Solutions Corp., All Rights Reserved. 6 ;## Compile Start Time Fri Jun 27 17:36:29 2014 7 8 ;## COMMAND_LINE: ccom308 C:\Users\Administrator\Downloads\ssp_rsk_r8c23_hew-20140307\ssp\target\rsk_m32c87_hew\ssp_workspace\libkernel\Debug\alarm.i - 9 10 11 ;## Normal Optimize OFF 12 ;## ROM size Optimize OFF 13 ;## Speed Optimize OFF 14 ;## Default ROM is far 15 ;## Default RAM is near 16 17 .GLB __SB__ 18 .SB __SB__ 19 .FB 0 20 21 22 23 24 25 ;## # FUNCTION TOPPERS_assert_abort 26 27 28 29 30 ;## # FUNCTION _syslog_0 31 32 ;## # FUNCTION _syslog_1 33 34 ;## # FUNCTION _syslog_2 35 36 ;## # FUNCTION _syslog_3 37 38 ;## # FUNCTION _syslog_4 39 40 ;## # FUNCTION _syslog_5 41 42 ;## # FUNCTION _syslog_6 43 44 45 ;## # FUNCTION get_flgreg 46 47 ;## # FUNCTION set_flgreg 48 49 ;## # FUNCTION clr_ipl 50 51 ;## # FUNCTION disint 52 53 ;## # FUNCTION enaint 54 55 ;## # FUNCTION jmp_dispatcher 56 57 58 ;## # FUNCTION TOPPERS_disint 59 60 ;## # FUNCTION TOPPERS_enaint 61 62 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 002 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 63 ;## # FUNCTION sil_reb_mem 64 65 ;## # FUNCTION sil_wrb_mem 66 67 ;## # FUNCTION sil_reh_mem 68 69 ;## # FUNCTION sil_wrh_mem 70 71 ;## # FUNCTION sil_reh_bem 72 73 ;## # FUNCTION sil_wrh_bem 74 75 ;## # FUNCTION sil_rew_mem 76 77 ;## # FUNCTION sil_wrw_mem 78 79 ;## # FUNCTION sil_rew_bem 80 81 ;## # FUNCTION sil_wrw_bem 82 83 84 85 86 87 ;## # FUNCTION reset_isp 88 89 90 ;## # FUNCTION sense_context 91 92 ;## # FUNCTION t_lock_cpu 93 94 ;## # FUNCTION i_lock_cpu 95 96 ;## # FUNCTION t_unlock_cpu 97 98 ;## # FUNCTION i_unlock_cpu 99 100 ;## # FUNCTION x_sense_lock 101 102 ;## # FUNCTION x_set_ipm 103 104 ;## # FUNCTION x_get_ipm 105 106 ;## # FUNCTION x_disable_int 107 108 ;## # FUNCTION x_enable_int 109 110 ;## # FUNCTION x_clear_int 111 112 ;## # FUNCTION x_probe_int 113 114 ;## # FUNCTION x_define_inh 115 116 ;## # FUNCTION i_begin_int 117 118 ;## # FUNCTION i_end_int 119 120 ;## # FUNCTION x_define_exc 121 122 ;## # FUNCTION idle_loop 123 124 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 003 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 125 126 127 ;## # FUNCTION queue_initialize 128 129 ;## # FUNCTION queue_insert_prev 130 131 ;## # FUNCTION queue_delete_next 132 133 ;## # FUNCTION queue_empty 134 135 136 137 ;## # FUNCTION _kernel_initialize_alarm 138 ;## # ARG Size(0) Auto Size(0) Context Size(4) 139 140 141 .SECTION program,CODE,ALIGN 142 .align 143 ;## # C_SRC : { 144 .glb __kernel_initialize_alarm 145 000000 __kernel_initialize_alarm: 146 ;## # C_SRC : almcb_almact = 0U; 147 000000 130000r Z mov.w #0000H,__kernel_almcb_almact:16 148 ;## # C_SRC : } 149 000003 DF rts 150 000004 E1: 151 000004 M1: 152 153 154 ;## # FUNCTION sta_alm 155 ;## # FRAME AUTO ( almid) size 2, offset -12 156 ;## # FRAME AUTO ( index) size 2, offset -10 157 ;## # FRAME AUTO ( ercd) size 2, offset -8 158 ;## # FRAME AUTO ( ipl) size 2, offset -6 159 ;## # FRAME AUTO ( ipl) size 2, offset -4 160 ;## # FRAME AUTO ( flg_reg) size 2, offset -2 161 ;## # FRAME ARG ( almtim) size 2, offset 8 162 ;## # REGISTER ARG ( almid) size 2, REGISTER R0 163 ;## # ARG Size(2) Auto Size(12) Context Size(8) 164 165 .align 166 ;## # C_SRC : { 167 .glb $sta_alm 168 000004 $sta_alm: 169 000004 EC0C enter #0cH 170 000006 8F60 pushm R1,R2 171 000008 31F4 S mov.w R0,-12[FB] ; almid almid 172 ;## # C_SRC : uint_t index = INDEX_ALM(almid); 173 00000A 39F4 S mov.w -12[FB],R0 ; almid 174 00000C E9BF Q add.w #-1,R0 175 00000E 31F6 S mov.w R0,-10[FB] ; index 176 ;## # C_SRC : return (intnest > 0); 177 000010 E6D00000r Q cmp.b #00H,__kernel_intnest:16 178 000014 8B04 jleu L305 179 000016 F9A1 Q mov.w #0001H,R0 180 000018 4A S jmp L307 181 000019 L305: 182 000019 03 Z mov.w #0000H,R0 183 00001A L307: 184 ;## # C_SRC : CHECK_TSKCTX_UNL(); 185 00001A E990 Q cmp.w #0000H,R0 186 00001C 9A06 jne L377 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 004 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 187 ;## # C_SRC : return lock_flag; 188 00001E 190000r S mov.w __kernel_lock_flag:16,R0 189 ;## # C_SRC : CHECK_TSKCTX_UNL(); 190 000021 DA08 jeq L295 191 000023 L377: 192 000023 35F8E7FF S mov.w #0ffe7H,-8[FB] ; ercd 193 000027 CE8300 W jmp L371 194 00002A L295: 195 ;## # C_SRC : CHECK_ALMID(almid); 196 00002A E3D1F4 Q cmp.w #0001H,-12[FB] ; almid 197 00002D FA09 jlt L389 198 00002F B3E6000000rF4 cmp.w __kernel_tmax_almid,-12[FB] ; almid 199 000035 EB07 jle L321 200 000037 L389: 201 000037 35F8EEFF S mov.w #0ffeeH,-8[FB] ; ercd 202 00003B BB6F B jmp L371 203 00003D L321: 204 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 205 ;#### ASM START 206 00003D 01D3DAFA stc flg, -6[FB] 207 ;#### ASM END 208 ;## # C_SRC : return ipl; 209 000041 39FA S mov.w -6[FB],R0 ; ipl 210 ;## # C_SRC : { 211 000043 883F8F and.b #8fH,R0H 212 000046 882F50 or.b #50H,R0H 213 000049 31FC S mov.w R0,-4[FB] ; ipl 214 ;## # C_SRC : uint16_t flg_reg = ipl; 215 00004B 93FBFCFE mov.w -4[FB],-2[FB] ; ipl flg_reg 216 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 217 ;#### ASM START 218 00004F 01D3CAFE ldc -2[FB], flg 219 ;#### ASM END 220 ;## # C_SRC : lock_flag = true; 221 000053 F7E10000r Q mov.w #0001H,__kernel_lock_flag:16 222 ;## # C_SRC : if((almcb_almact & ALMACT_BIT(index)) != 0U) { 223 000057 987BF6 mov.b -10[FB],R1H ; index 224 00005A F9A1 Q mov.w #0001H,R0 225 00005C A9BE shl.w R1H,R0 226 00005E B9BD0000r and.w __kernel_almcb_almact:16,R0 227 000062 DA10 jeq L359 228 ;## # C_SRC : time_event_dequeue(ALM_EVTID(almid)); 229 000064 39F4 S mov.w -12[FB],R0 ; almid 230 000066 E9BF Q add.w #-1,R0 231 000068 B9A8000000r add.w __kernel_almevtid_offset,R0 232 00006D CD000000r A jsr $_kernel_time_event_dequeue 233 ;## # C_SRC : } 234 000071 BB0C B jmp L361 235 ;## # C_SRC : else { 236 000073 L359: 237 ;## # C_SRC : almcb_almact |= ALMACT_BIT(index); 238 000073 987BF6 mov.b -10[FB],R1H ; index 239 000076 F9A1 Q mov.w #0001H,R0 240 000078 A9BE shl.w R1H,R0 241 00007A C7E50000r or.w R0,__kernel_almcb_almact:16 242 ;## # C_SRC : } 243 00007E L361: 244 ;## # C_SRC : current_time + (EVTTIM)almtim , (CBACK)call_almhdr , index); 245 00007E 39F6 S mov.w -10[FB],R0 ; index 246 000080 F920 Q mov.w #0H,R2 247 000082 A881 push.l R2R0 248 000084 B65300000000r push.l #$_kernel_call_almhdr * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 005 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 249 00008A 3908 S mov.w 8[FB],R0 ; almtim 250 00008C F920 Q mov.w #0H,R2 251 00008E B9B20000r add.l __kernel_current_time:16,R2R0 252 000092 A881 push.l R2R0 253 000094 39F4 S mov.w -12[FB],R0 ; almid 254 000096 E9BF Q add.w #-1,R0 255 000098 B9A8000000r add.w __kernel_almevtid_offset,R0 256 00009D CD000000r A jsr $_kernel_time_event_enqueue 257 0000A1 B6030C S add.l #0cH,SP 258 ;## # C_SRC : ercd = E_OK; 259 0000A4 33F8 Z mov.w #0000H,-8[FB] ; ercd 260 ;## # C_SRC : lock_flag = false; 261 0000A6 130000r Z mov.w #0000H,__kernel_lock_flag:16 262 ;## # C_SRC : Asm(" ldipl #0"); 263 ;#### ASM START 264 0000A9 D5E8 ldipl #0 265 ;#### ASM END 266 ;## # C_SRC : } 267 0000AB L371: 268 ;## # C_SRC : return ercd; 269 0000AB 39F8 S mov.w -8[FB],R0 ; ercd 270 0000AD 8E06 popm R1,R2 271 0000AF FC exitd 272 0000B0 E2: 273 0000B0 M2: 274 275 276 ;## # FUNCTION stp_alm 277 ;## # FRAME AUTO ( almid) size 2, offset -12 278 ;## # FRAME AUTO ( index) size 2, offset -10 279 ;## # FRAME AUTO ( ercd) size 2, offset -8 280 ;## # FRAME AUTO ( ipl) size 2, offset -6 281 ;## # FRAME AUTO ( ipl) size 2, offset -4 282 ;## # FRAME AUTO ( flg_reg) size 2, offset -2 283 ;## # REGISTER ARG ( almid) size 2, REGISTER R0 284 ;## # ARG Size(0) Auto Size(12) Context Size(8) 285 286 .align 287 ;## # C_SRC : { 288 .glb $stp_alm 289 0000B0 $stp_alm: 290 0000B0 EC0C enter #0cH 291 0000B2 8F40 pushm R1 292 0000B4 31F4 S mov.w R0,-12[FB] ; almid almid 293 ;## # C_SRC : uint_t index = INDEX_ALM(almid); 294 0000B6 39F4 S mov.w -12[FB],R0 ; almid 295 0000B8 E9BF Q add.w #-1,R0 296 0000BA 31F6 S mov.w R0,-10[FB] ; index 297 ;## # C_SRC : return (intnest > 0); 298 0000BC E6D00000r Q cmp.b #00H,__kernel_intnest:16 299 0000C0 8B04 jleu L405 300 0000C2 F9A1 Q mov.w #0001H,R0 301 0000C4 4A S jmp L407 302 0000C5 L405: 303 0000C5 03 Z mov.w #0000H,R0 304 0000C6 L407: 305 ;## # C_SRC : CHECK_TSKCTX_UNL(); 306 0000C6 E990 Q cmp.w #0000H,R0 307 0000C8 9A06 jne L477 308 ;## # C_SRC : return lock_flag; 309 0000CA 190000r S mov.w __kernel_lock_flag:16,R0 310 ;## # C_SRC : CHECK_TSKCTX_UNL(); * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 006 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 311 0000CD DA07 jeq L395 312 0000CF L477: 313 0000CF 35F8E7FF S mov.w #0ffe7H,-8[FB] ; ercd 314 0000D3 BB5C B jmp L471 315 0000D5 L395: 316 ;## # C_SRC : CHECK_ALMID(almid); 317 0000D5 E3D1F4 Q cmp.w #0001H,-12[FB] ; almid 318 0000D8 FA09 jlt L489 319 0000DA B3E6000000rF4 cmp.w __kernel_tmax_almid,-12[FB] ; almid 320 0000E0 EB07 jle L421 321 0000E2 L489: 322 0000E2 35F8EEFF S mov.w #0ffeeH,-8[FB] ; ercd 323 0000E6 BB49 B jmp L471 324 0000E8 L421: 325 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 326 ;#### ASM START 327 0000E8 01D3DAFA stc flg, -6[FB] 328 ;#### ASM END 329 ;## # C_SRC : return ipl; 330 0000EC 39FA S mov.w -6[FB],R0 ; ipl 331 ;## # C_SRC : { 332 0000EE 883F8F and.b #8fH,R0H 333 0000F1 882F50 or.b #50H,R0H 334 0000F4 31FC S mov.w R0,-4[FB] ; ipl 335 ;## # C_SRC : uint16_t flg_reg = ipl; 336 0000F6 93FBFCFE mov.w -4[FB],-2[FB] ; ipl flg_reg 337 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 338 ;#### ASM START 339 0000FA 01D3CAFE ldc -2[FB], flg 340 ;#### ASM END 341 ;## # C_SRC : lock_flag = true; 342 0000FE F7E10000r Q mov.w #0001H,__kernel_lock_flag:16 343 ;## # C_SRC : if((almcb_almact & ALMACT_BIT(index)) != 0U) { 344 000102 987BF6 mov.b -10[FB],R1H ; index 345 000105 F9A1 Q mov.w #0001H,R0 346 000107 A9BE shl.w R1H,R0 347 000109 B9BD0000r and.w __kernel_almcb_almact:16,R0 348 00010D DA1B jeq L459 349 ;## # C_SRC : almcb_almact &= ~ALMACT_BIT(index); 350 00010F 987BF6 mov.b -10[FB],R1H ; index 351 000112 F9A1 Q mov.w #0001H,R0 352 000114 A9BE shl.w R1H,R0 353 000116 A99E not.w R0 354 000118 C7ED0000r and.w R0,__kernel_almcb_almact:16 355 ;## # C_SRC : time_event_dequeue(ALM_EVTID(almid)); 356 00011C 39F4 S mov.w -12[FB],R0 ; almid 357 00011E E9BF Q add.w #-1,R0 358 000120 B9A8000000r add.w __kernel_almevtid_offset,R0 359 000125 CD000000r A jsr $_kernel_time_event_dequeue 360 000129 L459: 361 ;## # C_SRC : ercd = E_OK; 362 000129 33F8 Z mov.w #0000H,-8[FB] ; ercd 363 ;## # C_SRC : lock_flag = false; 364 00012B 130000r Z mov.w #0000H,__kernel_lock_flag:16 365 ;## # C_SRC : Asm(" ldipl #0"); 366 ;#### ASM START 367 00012E D5E8 ldipl #0 368 ;#### ASM END 369 ;## # C_SRC : } 370 000130 L471: 371 ;## # C_SRC : return ercd; 372 000130 39F8 S mov.w -8[FB],R0 ; ercd * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 007 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 373 000132 8E02 popm R1 374 000134 FC exitd 375 000135 E3: 376 000135 M3: 377 378 379 ;## # FUNCTION _kernel_call_almhdr 380 ;## # FRAME AUTO ( almidx) size 2, offset -12 381 ;## # FRAME AUTO ( ipl) size 2, offset -10 382 ;## # FRAME AUTO ( ipl) size 2, offset -8 383 ;## # FRAME AUTO ( flg_reg) size 2, offset -6 384 ;## # FRAME AUTO ( ipl) size 2, offset -4 385 ;## # FRAME AUTO ( ipl) size 2, offset -8 386 ;## # FRAME AUTO ( ipl) size 2, offset -12 387 ;## # FRAME AUTO ( flg_reg) size 2, offset -2 388 ;## # REGISTER ARG ( almidx) size 2, REGISTER R0 389 ;## # ARG Size(0) Auto Size(12) Context Size(8) 390 391 000135 DE .align 392 ;## # C_SRC : { 393 .glb $_kernel_call_almhdr 394 000136 $_kernel_call_almhdr: 395 000136 EC0C enter #0cH 396 000138 8F68 pushm R1,R2,A0 397 00013A 31F4 S mov.w R0,-12[FB] ; almidx almidx 398 ;## # C_SRC : almcb_almact &= ~ALMACT_BIT(almidx); 399 00013C 987BF4 mov.b -12[FB],R1H ; almidx 400 00013F F9A1 Q mov.w #0001H,R0 401 000141 A9BE shl.w R1H,R0 402 000143 A99E not.w R0 403 000145 C7ED0000r and.w R0,__kernel_almcb_almact:16 404 ;## # C_SRC : lock_flag = false; 405 000149 130000r Z mov.w #0000H,__kernel_lock_flag:16 406 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 407 ;#### ASM START 408 00014C 01D3DAF6 stc flg, -10[FB] 409 ;#### ASM END 410 ;## # C_SRC : return ipl; 411 000150 39F6 S mov.w -10[FB],R0 ; ipl 412 ;## # C_SRC : { 413 000152 5F0000r S mov.w __kernel_saved_ipl:16,R1 414 000155 89FF0070 and.w #7000H,R1 415 000159 883F8F and.b #8fH,R0H 416 00015C C9B5 or.w R1,R0 417 00015E 31F8 S mov.w R0,-8[FB] ; ipl 418 ;## # C_SRC : uint16_t flg_reg = ipl; 419 000160 93FBF8FA mov.w -8[FB],-6[FB] ; ipl flg_reg 420 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 421 ;#### ASM START 422 000164 01D3CAFA ldc -6[FB], flg 423 ;#### ASM END 424 ;## # C_SRC : (*alminib_almhdr[almidx])(alminib_exinf[almidx]); 425 000168 39F4 S mov.w -12[FB],R0 ; almidx 426 00016A F920 Q mov.w #0H,R2 427 00016C 88A102 shlnc.l #2,R2R0 428 00016F 88B100000000r add.l #(0FFFFFFH & __kernel_alminib_exinf),R2R0 429 000175 C1A3 mov.l R2R0,A0 430 000177 A001 push.l [A0] 431 000179 39F4 S mov.w -12[FB],R0 ; almidx 432 00017B F920 Q mov.w #0H,R2 433 00017D C1A3 mov.l R2R0,A0 434 00017F 80A102 shlnc.l #2,A0 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 008 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 435 000182 9601000000r jsri.a __kernel_alminib_almhdr[A0] 436 000187 53 Q add.l #04H,SP 437 ;## # C_SRC : return lock_flag; 438 000188 190000r S mov.w __kernel_lock_flag:16,R0 439 ;## # C_SRC : if (!i_sense_lock()) { 440 00018B 9A2A jne L515 441 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 442 ;#### ASM START 443 00018D 01D3DAFC stc flg, -4[FB] 444 ;#### ASM END 445 ;## # C_SRC : return ipl; 446 000191 39FC S mov.w -4[FB],R0 ; ipl 447 ;## # C_SRC : ipl = get_flgreg(); 448 000193 31F8 S mov.w R0,-8[FB] ; ipl 449 ;## # C_SRC : if (IPL_LOCK > ipl) { 450 000195 77F80050 S cmp.w #5000H,-8[FB] ; ipl 451 000199 CA13 jgeu L507 452 ;## # C_SRC : { 453 00019B 39F8 S mov.w -8[FB],R0 ; ipl 454 00019D 883F8F and.b #8fH,R0H 455 0001A0 882F50 or.b #50H,R0H 456 0001A3 31F4 S mov.w R0,-12[FB] ; ipl 457 ;## # C_SRC : uint16_t flg_reg = ipl; 458 0001A5 93FBF4FE mov.w -12[FB],-2[FB] ; ipl flg_reg 459 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 460 ;#### ASM START 461 0001A9 01D3CAFE ldc -2[FB], flg 462 ;#### ASM END 463 0001AD L507: 464 ;## # C_SRC : saved_ipl = ipl; 465 0001AD 97FBF80000r mov.w -8[FB],__kernel_saved_ipl:16 ; ipl 466 ;## # C_SRC : lock_flag = true; 467 0001B2 F7E10000r Q mov.w #0001H,__kernel_lock_flag:16 468 0001B6 L515: 469 ;## # C_SRC : } 470 0001B6 8E16 popm R1,R2,A0 471 0001B8 FC exitd 472 0001B9 E4: 473 0001B9 M4: 474 475 .glb $act_tsk 476 .glb $iact_tsk 477 .glb $psnd_dtq 478 .glb $ipsnd_dtq 479 .glb $prcv_dtq 480 .glb $set_flg 481 .glb $iset_flg 482 .glb $clr_flg 483 .glb $pol_flg 484 .glb _loc_cpu 485 .glb _iloc_cpu 486 .glb _unl_cpu 487 .glb _iunl_cpu 488 .glb _dis_dsp 489 .glb _ena_dsp 490 .glb _sns_ctx 491 .glb _sns_loc 492 .glb _sns_dsp 493 .glb _sns_dpn 494 .glb _sns_ker 495 .glb _ext_ker 496 .glb $dis_int * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 009 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 497 .glb $ena_int 498 .glb $sta_cyc 499 .glb $stp_cyc 500 .glb _get_tim 501 .glb $syslog_wri_log 502 .glb _syslog_printf 503 .glb _syslog_print 504 .glb $syslog_lostmsg 505 .glb _syslog 506 .glb _sil_dly_nse 507 .glb $target_fput_log 508 .glb _sio_initialize 509 .glb $sio_opn_por 510 .glb _sio_cls_por 511 .glb _sio_isr_rcv 512 .glb _sio_isr_snd 513 .glb _sio_snd_chr 514 .glb _sio_rcv_chr 515 .glb _sio_ena_cbr 516 .glb _sio_dis_cbr 517 .glb _sio_irdy_snd 518 .glb _sio_irdy_rcv 519 .glb $sio_pol_snd_chr 520 .glb __kernel_target_initialize 521 .glb __kernel_target_exit 522 .glb __kernel_intnest 523 .glb __kernel_lock_flag 524 .glb __kernel_saved_ipl 525 .glb __kernel_intc_reg 526 .glb __kernel_intpri_table 527 .glb $_kernel_x_config_int 528 .glb __kernel_prc_initialize 529 .glb __kernel_start_dispatch 530 .glb __kernel_call_exit_kernel 531 .glb __kernel_prc_terminate 532 .glb __kernel_initialize_object 533 .glb __kernel_call_inirtn 534 .glb __kernel_call_terrtn 535 .glb _istksz 536 .glb _istk 537 .glb __kernel_kerflg 538 .glb _sta_ker 539 .glb __kernel_exit_kernel 540 .glb __kernel_almevtid_offset 541 .glb __kernel_tmax_almid 542 .glb __kernel_alminib_almhdr 543 .glb __kernel_alminib_exinf 544 .glb __kernel_almcb_almact 545 .glb __kernel_tnum_tmevt_queue 546 .glb __kernel_tmevt_queue 547 .glb __kernel_tmevt_time 548 .glb __kernel_tmevt_callback 549 .glb __kernel_tmevt_arg 550 .glb __kernel_current_time 551 .glb __kernel_initialize_time_event 552 .glb $_kernel_time_event_enqueue 553 .glb $_kernel_time_event_dequeue 554 .glb __kernel_signal_time 555 ;################################# 556 ;### STATIC DATA INFORMATION ### 557 ;################################# 558 ;################################# * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 010 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 559 ;################################# 560 ;################################# 561 562 .END Information List TOTAL ERROR(S) 00000 TOTAL WARNING(S) 00000 TOTAL LINE(S) 00562 LINES Section List Attr Size Name CODE 00000441(0001B9H) program