6502 instruction set

The 6502 instruction set

For each instruction is given the mnemonic, the description of what does the instruction, a symbolic description of what the instruction is doing, the affected status flag, and finaly the various adressing mode available for that instruction with the corresponding opcode.

Symbols:

ADC

Add to Accumulator with Carry
A+M+C -> A,C
N, Z, C, V

AND

AND Memory with Accumulator
A and M -> A
N, Z

ASL

Arithmetic Shift Left
           +-+-+-+-+-+-+-+-+ 
      C <- |7|6|5|4|3|2|1|0| <- 0    
           +-+-+-+-+-+-+-+-+
N, Z, C

BCC

Branch on Carry Clear
branch on C=0
no flags

BCS

Branch on Carry Set
branch on C=1
no flags

BEQ

Branch Zero Set
branch on Z=1
no flags

BIT

Test Bits in Memory with Accumulator
A and M, M7 -> N, M6 -> V (neither A nor M are altered)
N=M7, V=M6, Z=1 if A and M = 0

BMI

Branch on Result Minus
branch on N=1
no flags

BNE

Branch on Z reset
branch on Z=0
no flags

BPL

Branch on Result Plus
branch on N=0
no flags

BRK

Force a Break
forced interrupt
B=1, I=1

BVC

Branch on Overflow Clear
branch on V=0
no flags

BVS

Branch on Overflow Set
branch on V=1
no flags

CLC

Clear Carry Flag
0 -> C
C=0

CLD

Clear Decimal Mode
0 -> D
D=0

CLI

Clear Interrupt Disable
0 -> I
I=0

CLV

Clear Overflow Flag
0 -> V
V=0

CMP

Compare Memory and Accumulator
A compared with M
A, X, or Y < Memory ---> N=1, Z=0, C=0

CPX

Compare Memory and X register
X compared with M
A, X, or Y < Memory ---> N=1, Z=0, C=0

CPY

Compare Memory and Y register
Y compare with M
A, X, or Y < Memory ---> N=1, Z=0, C=0

DEC

Decrement Memory by One
M - 1 -> M
N, Z

DEX

Decrement X
X - 1 -> X
N, Z

DEY

Decrement Y
Y - 1 -> Y
N, Z

EOR

Exclusive-OR Memory with Accumulator
A xor M -> A
N, Z

INC

Increment Memory by one
M + 1 -> M
N, Z

INX

Increment X by one
X + 1 -> X
N, Z

INY

Increment Y by one
Y + 1 -> Y
N, Z

JMP

Jump

JSR

Jump to subroutine

LDA

Load Accumulator with memory
M -> A
N, Z

LDX

Load X with Memory
M -> X
N, Z

LDY

Load Y with Memory
M -> Y
N, Z

LSR

Logical Shift Right
     +-+-+-+-+-+-+-+-+ 
0 -> |7|6|5|4|3|2|1|0| -> C    
     +-+-+-+-+-+-+-+-+
N, Z, C

NOP

No Operation

ORA

OR Memory with Accumulator
A or M -> A
N, Z

PHA

Push Accumulator on Stack
A -> Stack

PHP

Push Processor Status on Stack
P -> Stack

PLA

Pull Accumulator from Stack
Stack -> A
N, Z

PLP

Pull Processor Status from Stack
Stack -> P
P from stack

ROL

Rotate Left
     +-+-+-+-+-+-+-+-+ 
C <- |7|6|5|4|3|2|1|0| <- C    
     +-+-+-+-+-+-+-+-+
N, Z, C

ROR

Rotate Right
     +-+-+-+-+-+-+-+-+ 
C -> |7|6|5|4|3|2|1|0| -> C    
     +-+-+-+-+-+-+-+-+
N, Z, C

RTI

Return from Interrupt

RTS

Return from Subroutine

SBC

Subtract from Accumulator with Carry
A - M - ~C -> A (~C is NOT C)
N, Z, C, V

SEC

Set Carry Flag

SED

Set Decimal Mode

SEI

Set Interrupt Disable

STA

Store Accumulator in Memory

STX

Store X in Memory

STY

Store Y in Memory

TAX

Transfer Accumulator to X
A -> X
N, Z

TAY

Transfer Accumulator to Y
A -> Y
N, Z

TSX

Transfer Stack to X
S -> X
N, Z

TXA

Transfer X to Accumulator
X -> A
N, Z

TXS

Transfer X to Stack
X -> S
N, Z

TYA

Transfer Y to Accumulator
Y -> A
N, Z