:x87(|7apm,mustangapm,xgene-storm +7APM X-Gene Mustang boardcpus+cpu@000=cpuapm,potenzaarm,armv8I Mspin-table[cpu@001=cpuapm,potenzaarm,armv8I Mspin-table[cpu@100=cpuapm,potenzaarm,armv8I Mspin-table[cpu@101=cpuapm,potenzaarm,armv8I Mspin-table[cpu@200=cpuapm,potenzaarm,armv8I Mspin-table[cpu@201=cpuapm,potenzaarm,armv8I Mspin-table[cpu@300=cpuapm,potenzaarm,armv8I Mspin-table[cpu@301=cpuapm,potenzaarm,armv8I Mspin-table[interrupt-controller@78010000arm,cortex-a15-gicl}@Ixxx x   timerarm,armv8-timer0 pmu apm,potenza-pmuarm,armv8-pmuv3  soc simple-bus+system-clk-controller@17000000apm,xgene-scusysconI  clocks+refclk fixed-clockrefclkpcppll@17000100apm,xgene-pcppll-clockrefclkIpcppllDsocpll@17000120apm,xgene-socpll-clockrefclkI socpllDsocplldiv2fixed-factor-clock socplldiv2socpllqmlclkapm,xgene-device-clockqmlclkI csr-regqmlclkethclkapm,xgene-device-clockethclkI div-reg8# 1ethclkmenetclkapm,xgene-device-clockI csr-reg menetclksge0clk@1f21c000apm,xgene-device-clockI! csr-reg?sge0clksge1clk@1f21c000apm,xgene-device-clockI! csr-reg? sge1clkxge0clk@1f61c000apm,xgene-device-clockIa csr-reg?xge0clksataphy1clk@1f21c000apm,xgene-device-clockI! csr-reg sataphy1clkH?:Sa  sataphy1clk@1f22c000apm,xgene-device-clockI" csr-reg sataphy2clkH?:Sa  sataphy1clk@1f23c000apm,xgene-device-clockI# csr-reg sataphy3clkH?:Sasata01clk@1f21c000apm,xgene-device-clockI! csr-reg sata01clkH?Sa9sata23clk@1f22c000apm,xgene-device-clockI" csr-reg sata23clkH?Sa9sata45clk@1f23c000apm,xgene-device-clockI# csr-reg sata45clkH?Sa9pcie0clk@1f2bc000mokapm,xgene-device-clockI+ csr-reg pcie0clkpcie1clk@1f2cc000 mdisabledapm,xgene-device-clockI, csr-reg pcie1clkpcie2clk@1f2dc000 mdisabledapm,xgene-device-clockI- csr-reg pcie2clkpcie3clk@1f50c000 mdisabledapm,xgene-device-clockIP csr-reg pcie3clk  pcie4clk@1f51c000 mdisabledapm,xgene-device-clockIQ csr-reg pcie4clk  rtcclk@17000000apm,xgene-device-clockI  csr-regH ?Sartcclkrngpkaclk@17000000apm,xgene-device-clockI  csr-regH ?Sa rngpkaclkmsi@79000000xgene,gic-msiIytpcie@1f2b0000mok=pciapm,xgene-pciel+ I+  csrcfg88B@@@yypcie@1f2c0000 mdisabled=pciapm,xgene-pciel+ I,  csrcfg88B@@@yypcie@1f2d0000 mdisabled=pciapm,xgene-pciel+ I-  csrcfg88B@@@yypcie@1f500000 mdisabled=pciapm,xgene-pciel+ IP  csrcfg88B@@@yy pcie@1f510000 mdisabled=pciapm,xgene-pciel+ IQ  csrcfg88B@@@yy serial@1c020000=serialns16550I  Lserial@1c021000 mdisabled=serial ns16550aI  Mreboot@17000014syscon-reboot Cphy@1f21a000apm,xgene-phyI!  mdisabled  phy@1f22a000apm,xgene-phyI" mok  phy@1f23a000apm,xgene-phyI#mok  sata@1a000000apm,xgene-ahciPI!!!!p  mdisabled sata-physata@1a400000apm,xgene-ahciPI@""""p mok sata-physata@1a800000apm,xgene-ahci@I### mok sata-phydwusb@19000000 mdisabled snps,dwc3I hostdwusb@19800000 mdisabled snps,dwc3I hostrtc@10510000apm,xgene-rtcIQ Fdwgpio@1c024000snps,dw-apb-gpioI@+gpio-controller@0snps,dw-apb-gpio-port%5 Iethernet@17020000apm,xgene-enetmok0I enet_csrring_csrring_cmd <CUrgmiiimdioapm,xgene-mdio+menetphy@3ethernet-phy-id001c.c915Iethernet@1f210000apm,xgene1-sgenetmok0I!  enet_csrring_csrring_cmd CUsgmiiethernet@1f210030apm,xgene1-sgenetmok0I!0  enet_csrring_csrring_cmdtCUsgmiiethernet@1f610000apm,xgene1-xgenetmok0Ia` enet_csrring_csrring_cmd `CUxgmiirng@10520000apm,xgene-rngIR Achosenmemory=memoryI compatibleinterrupt-parent#address-cells#size-cellsmodeldevice_typeregenable-methodcpu-release-addr#interrupt-cellsinterrupt-controllerinterruptslinux,phandleclock-frequencyranges#clock-cellsclock-output-namesclocksclock-namesclock-multclock-divreg-namesdivider-offsetdivider-widthdivider-shiftcsr-maskcsr-offsetenable-offsetenable-maskstatusmsi-available-rangesib-rangesinterrupt-map-maskinterrupt-mapreg-shiftregmap#phy-cellsapm,tx-boost-gainapm,tx-eye-tuningphysphy-namesdma-coherentdr_modereg-io-widthgpio-controllersnps,nr-gpioslocal-mac-addressphy-connection-typephy-handleport-id