#8t([<&nokia,omap3-n900ti,omap3430ti,omap3 + 7Nokia N900chosenaliases=B/ocp@68000000/i2c@48070000G/ocp@68000000/i2c@48072000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/i2c@48060000'i/ocp@68000000/spi@48098000/acx565akm@2 r/connectorcpus+cpu@0arm,cortex-a8{cpucpu'pmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+4Rodefaultpinmux_uart2_pins }DFHJpinmux_uart3_pins}nppinmux_ethernet_pins} lpinmux_gpmc_pinsh}JLNnprtvxz|pinmux_i2c1_pins}pinmux_i2c2_pins}pinmux_i2c3_pins}pinmux_debug_led_pins}h(pinmux_mcspi4_pins }\ b `fpinmux_mmc1_pins0}pinmux_mmc2_pinsP}(*,.02468:pinmux_acx565akm_pins}pinmux_dss_sdi_pins0}pinmux_wl1251}Zpinmux_ssi@}PNRLTVXZpinmux_modem0}^pinmux_cameraX} pinmux_twl4030_pins}Ascm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68ti,composite-mux-clockh mcbsp5_fckti,composite-clock mcbsp1_mux_fck@4ti,composite-mux-clock mcbsp1_fckti,composite-clock  mcbsp2_mux_fck@4ti,composite-mux-clock mcbsp2_fckti,composite-clock  mcbsp3_mux_fck@68ti,composite-mux-clock hmcbsp3_fckti,composite-clock mcbsp4_mux_fck@68ti,composite-mux-clock hmcbsp4_fckti,composite-clock clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+4Rpinmux_twl4030_vpins }target-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lrevsyscsyss ick+ H `  #disabledaes1@0 ti,omap3-aesP*  /txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLrevsyscsyss ick+ H P  #disabledaes2@0 ti,omap3-aesP*AB/txrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clock9Yosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clockIpT!sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockkvdpll3_m2x2_ckfixed-factor-clockkv dpll4_x2_ckfixed-factor-clockkvcorex2_fckfixed-factor-clock kv"wkup_l4_ickfixed-factor-clock!kvQcorex2_d3_fckfixed-factor-clock"kvcorex2_d5_fckfixed-factor-clock"kvclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clock9omap_32k_fck fixed-clock9Cvirt_12m_ck fixed-clock9virt_13m_ck fixed-clock9]@virt_19200000_ck fixed-clock9$virt_26000000_ck fixed-clock9virt_38_4m_ck fixed-clock9Idpll4_ck@d00ti,omap3-dpll-per-clock!! D 0dpll4_m2_ck@d48ti,divider-clockI? HT#dpll4_m2x2_mul_ckfixed-factor-clock#kv$dpll4_m2x2_ck@d00ti,gate-clock$ %omap_96m_alwon_fckfixed-factor-clock%kv,dpll3_ck@d00ti,omap3-dpll-core-clock!! @ 0dpll3_m3_ck@1140ti,divider-clockI@T&dpll3_m3x2_mul_ckfixed-factor-clock&kv'dpll3_m3x2_ck@d00ti,gate-clock'  (emu_core_alwon_ckfixed-factor-clock(kvesys_altclk fixed-clock91mcbsp_clks fixed-clock9dpll3_m2_ck@d40ti,divider-clockI @Tcore_ckfixed-factor-clockkv)dpll1_fck@940ti,divider-clock)I @T*dpll1_ck@904ti,omap3-dpll-clock!*  $ @ 4dpll1_x2_ckfixed-factor-clockkv+dpll1_x2m2_ck@944ti,divider-clock+I DT?cm_96m_fckfixed-factor-clock,kv-omap_96m_fck@d40 ti,mux-clock-! @Hdpll4_m3_ck@e40ti,divider-clockI @T.dpll4_m3x2_mul_ckfixed-factor-clock.kv/dpll4_m3x2_ck@d00ti,gate-clock/ 0omap_54m_fck@d40 ti,mux-clock01 @;cm_96m_d2_fckfixed-factor-clock-kv2omap_48m_fck@d40 ti,mux-clock21 @3omap_12m_fckfixed-factor-clock3kvJdpll4_m4_ck@e40ti,divider-clockI@T4dpll4_m4x2_mul_ckti,fixed-factor-clock45dpll4_m4x2_ck@d00ti,gate-clock5 dpll4_m5_ck@f40ti,divider-clockI?@T6dpll4_m5x2_mul_ckti,fixed-factor-clock67dpll4_m5x2_ck@d00ti,gate-clock7 mdpll4_m6_ck@1140ti,divider-clockI?@T8dpll4_m6x2_mul_ckfixed-factor-clock8kv9dpll4_m6x2_ck@d00ti,gate-clock9 :emu_per_alwon_ckfixed-factor-clock:kvfclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock) p<clkout2_src_mux_ck@d70ti,composite-mux-clock)!-; p=clkout2_src_ckti,composite-clock<=>sys_clkout2@d70ti,divider-clock>I@ pmpu_ckfixed-factor-clock?kv@arm_fck@924ti,divider-clock@ $Iemu_mpu_alwon_ckfixed-factor-clock@kvgl3_ick@a40ti,divider-clock)I @TAl4_ick@a40ti,divider-clockAI @TBrm_ick@c40ti,divider-clockBI @Tgpt10_gate_fck@a00ti,composite-gate-clock!  Dgpt10_mux_fck@a40ti,composite-mux-clockC! @Egpt10_fckti,composite-clockDEgpt11_gate_fck@a00ti,composite-gate-clock!  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Ngpt1_mux_fck@c40ti,composite-mux-clockC! @Ogpt1_fckti,composite-clockNOaes2_ick@a10ti,omap3-interface-clockM wkup_32k_fckfixed-factor-clockCkvPgpio1_dbck@c00ti,gate-clockP sha12_ick@a10ti,omap3-interface-clockM wdt2_fck@c00ti,wait-gate-clockP wdt2_ick@c10ti,omap3-interface-clockQ wdt1_ick@c10ti,omap3-interface-clockQ gpio1_ick@c10ti,omap3-interface-clockQ omap_32ksync_ick@c10ti,omap3-interface-clockQ gpt12_ick@c10ti,omap3-interface-clockQ gpt1_ick@c10ti,omap3-interface-clockQ per_96m_fckfixed-factor-clock,kv per_48m_fckfixed-factor-clock3kvRuart3_fck@1000ti,wait-gate-clockR gpt2_gate_fck@1000ti,composite-gate-clock!Sgpt2_mux_fck@1040ti,composite-mux-clockC!@Tgpt2_fckti,composite-clockSTgpt3_gate_fck@1000ti,composite-gate-clock!Ugpt3_mux_fck@1040ti,composite-mux-clockC!@Vgpt3_fckti,composite-clockUVgpt4_gate_fck@1000ti,composite-gate-clock!Wgpt4_mux_fck@1040ti,composite-mux-clockC!@Xgpt4_fckti,composite-clockWXgpt5_gate_fck@1000ti,composite-gate-clock!Ygpt5_mux_fck@1040ti,composite-mux-clockC!@Zgpt5_fckti,composite-clockYZgpt6_gate_fck@1000ti,composite-gate-clock![gpt6_mux_fck@1040ti,composite-mux-clockC!@\gpt6_fckti,composite-clock[\gpt7_gate_fck@1000ti,composite-gate-clock!]gpt7_mux_fck@1040ti,composite-mux-clockC!@^gpt7_fckti,composite-clock]^gpt8_gate_fck@1000ti,composite-gate-clock! _gpt8_mux_fck@1040ti,composite-mux-clockC!@`gpt8_fckti,composite-clock_`gpt9_gate_fck@1000ti,composite-gate-clock! agpt9_mux_fck@1040ti,composite-mux-clockC!@bgpt9_fckti,composite-clockabper_32k_alwon_fckfixed-factor-clockCkvcgpio6_dbck@1000ti,gate-clockcgpio5_dbck@1000ti,gate-clockcgpio4_dbck@1000ti,gate-clockcgpio3_dbck@1000ti,gate-clockcgpio2_dbck@1000ti,gate-clockc wdt3_fck@1000ti,wait-gate-clockc per_l4_ickfixed-factor-clockBkvdgpio6_ick@1010ti,omap3-interface-clockdgpio5_ick@1010ti,omap3-interface-clockdgpio4_ick@1010ti,omap3-interface-clockdgpio3_ick@1010ti,omap3-interface-clockdgpio2_ick@1010ti,omap3-interface-clockd wdt3_ick@1010ti,omap3-interface-clockd uart3_ick@1010ti,omap3-interface-clockd uart4_ick@1010ti,omap3-interface-clockdgpt9_ick@1010ti,omap3-interface-clockd gpt8_ick@1010ti,omap3-interface-clockd gpt7_ick@1010ti,omap3-interface-clockdgpt6_ick@1010ti,omap3-interface-clockdgpt5_ick@1010ti,omap3-interface-clockdgpt4_ick@1010ti,omap3-interface-clockdgpt3_ick@1010ti,omap3-interface-clockdgpt2_ick@1010ti,omap3-interface-clockdmcbsp2_ick@1010ti,omap3-interface-clockdmcbsp3_ick@1010ti,omap3-interface-clockdmcbsp4_ick@1010ti,omap3-interface-clockdmcbsp2_gate_fck@1000ti,composite-gate-clock mcbsp3_gate_fck@1000ti,composite-gate-clockmcbsp4_gate_fck@1000ti,composite-gate-clockemu_src_mux_ck@1140 ti,mux-clock!efg@hemu_src_ckti,clkdm-gate-clockhipclk_fck@1140ti,divider-clockiI@Tpclkx2_fck@1140ti,divider-clockiI@Tatclk_fck@1140ti,divider-clockiI@Ttraceclk_src_fck@1140 ti,mux-clock!efg@jtraceclk_fck@1140ti,divider-clockj I@Tsecure_32k_fck fixed-clock9kgpt12_fckfixed-factor-clockkkvwdt1_fckfixed-factor-clockkkvsecurity_l4_ick2fixed-factor-clockBkvlaes1_ick@a14ti,omap3-interface-clockl rng_ick@a14ti,omap3-interface-clockl  sha11_ick@a14ti,omap3-interface-clockl des1_ick@a14ti,omap3-interface-clockl cam_mclk@f00ti,gate-clockmcam_ick@f10!ti,omap3-no-wait-interface-clockBcsi2_96m_fck@f00ti,gate-clocksecurity_l3_ickfixed-factor-clockAkvnpka_ick@a14ti,omap3-interface-clockn icr_ick@a10ti,omap3-interface-clockM des2_ick@a10ti,omap3-interface-clockM mspro_ick@a10ti,omap3-interface-clockM mailboxes_ick@a10ti,omap3-interface-clockM ssi_l4_ickfixed-factor-clockBkvusr1_fck@c00ti,wait-gate-clock! #sr2_fck@c00ti,wait-gate-clock! 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