;8( t'ti,omap3-evm-37xxti,omap3630ti,omap3 +7TI OMAP37XX EVM (TMDSEVM3730)chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/serial@49042000 l/displaycpus+cpu@0arm,cortex-a8ucpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+$9Wtdefaultpinmux_twl4030_pinsApinmux_dss_dpi_pins2 pinmux_mmc1_pinsP "$&pinmux_mmc2_pinsP(*,.02468:pinmux_uart3_pinsnAppinmux_ehci_port_select_pinspinmux_hsusb2_pins0      pinmux_wl12xx_gpioPNpinmux_smsc911x_pinsscm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68ti,composite-mux-clock h mcbsp5_fckti,composite-clock mcbsp1_mux_fck@4ti,composite-mux-clock mcbsp1_fckti,composite-clock mcbsp2_mux_fck@4ti,composite-mux-clock mcbsp2_fckti,composite-clockmcbsp3_mux_fck@68ti,composite-mux-clock hmcbsp3_fckti,composite-clockmcbsp4_mux_fck@68ti,composite-mux-clock hmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+$9Wpinmux_twl4030_vpins pinmux_dss_dpi_pins10   target-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lrevsyscsyss  %ick+ H ` aes1@0 ti,omap3-aesP2  7txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLrevsyscsyss  %ick+ H P aes2@0 ti,omap3-aesP2AB7txrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockAYosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clockQp\$sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock s~dpll3_m2x2_ckfixed-factor-clock!s~#dpll4_x2_ckfixed-factor-clock"s~corex2_fckfixed-factor-clock#s~%wkup_l4_ickfixed-factor-clock$s~Tcorex2_d3_fckfixed-factor-clock%s~corex2_d5_fckfixed-factor-clock%s~clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockAomap_32k_fck fixed-clockAFvirt_12m_ck fixed-clockAvirt_13m_ck fixed-clockA]@virt_19200000_ck fixed-clockA$virt_26000000_ck fixed-clockAvirt_38_4m_ck fixed-clockAIdpll4_ck@d00ti,omap3-dpll-per-j-type-clock$$ D 0"dpll4_m2_ck@d48ti,divider-clock"Q? H\&dpll4_m2x2_mul_ckfixed-factor-clock&s~'dpll4_m2x2_ck@d00ti,hsdiv-gate-clock' (omap_96m_alwon_fckfixed-factor-clock(s~/dpll3_ck@d00ti,omap3-dpll-core-clock$$ @ 0 dpll3_m3_ck@1140ti,divider-clock Q@\)dpll3_m3x2_mul_ckfixed-factor-clock)s~*dpll3_m3x2_ck@d00ti,hsdiv-gate-clock*  +emu_core_alwon_ckfixed-factor-clock+s~hsys_altclk fixed-clockA4mcbsp_clks fixed-clockA dpll3_m2_ck@d40ti,divider-clock Q @\!core_ckfixed-factor-clock!s~,dpll1_fck@940ti,divider-clock,Q @\-dpll1_ck@904ti,omap3-dpll-clock$-  $ @ 4dpll1_x2_ckfixed-factor-clocks~.dpll1_x2m2_ck@944ti,divider-clock.Q D\Bcm_96m_fckfixed-factor-clock/s~0omap_96m_fck@d40 ti,mux-clock0$ @Kdpll4_m3_ck@e40ti,divider-clock"Q @\1dpll4_m3x2_mul_ckfixed-factor-clock1s~2dpll4_m3x2_ck@d00ti,hsdiv-gate-clock2 3omap_54m_fck@d40 ti,mux-clock34 @>cm_96m_d2_fckfixed-factor-clock0s~5omap_48m_fck@d40 ti,mux-clock54 @6omap_12m_fckfixed-factor-clock6s~Mdpll4_m4_ck@e40ti,divider-clock"Q@\7dpll4_m4x2_mul_ckti,fixed-factor-clock78dpll4_m4x2_ck@d00ti,gate-clock8 dpll4_m5_ck@f40ti,divider-clock"Q?@\9dpll4_m5x2_mul_ckti,fixed-factor-clock9:dpll4_m5x2_ck@d00ti,hsdiv-gate-clock: pdpll4_m6_ck@1140ti,divider-clock"Q?@\;dpll4_m6x2_mul_ckfixed-factor-clock;s~<dpll4_m6x2_ck@d00ti,hsdiv-gate-clock< =emu_per_alwon_ckfixed-factor-clock=s~iclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock, p?clkout2_src_mux_ck@d70ti,composite-mux-clock,$0> p@clkout2_src_ckti,composite-clock?@Asys_clkout2@d70ti,divider-clockAQ@ pmpu_ckfixed-factor-clockBs~Carm_fck@924ti,divider-clockC $Qemu_mpu_alwon_ckfixed-factor-clockCs~jl3_ick@a40ti,divider-clock,Q @\Dl4_ick@a40ti,divider-clockDQ @\Erm_ick@c40ti,divider-clockEQ @\gpt10_gate_fck@a00ti,composite-gate-clock$  Ggpt10_mux_fck@a40ti,composite-mux-clockF$ @Hgpt10_fckti,composite-clockGHgpt11_gate_fck@a00ti,composite-gate-clock$  Igpt11_mux_fck@a40ti,composite-mux-clockF$ @Jgpt11_fckti,composite-clockIJcore_96m_fckfixed-factor-clockKs~ mmchs2_fck@a00ti,wait-gate-clock  mmchs1_fck@a00ti,wait-gate-clock  i2c3_fck@a00ti,wait-gate-clock  i2c2_fck@a00ti,wait-gate-clock  i2c1_fck@a00ti,wait-gate-clock  mcbsp5_gate_fck@a00ti,composite-gate-clock    mcbsp1_gate_fck@a00ti,composite-gate-clock    core_48m_fckfixed-factor-clock6s~Lmcspi4_fck@a00ti,wait-gate-clockL mcspi3_fck@a00ti,wait-gate-clockL mcspi2_fck@a00ti,wait-gate-clockL mcspi1_fck@a00ti,wait-gate-clockL uart2_fck@a00ti,wait-gate-clockL uart1_fck@a00ti,wait-gate-clockL  core_12m_fckfixed-factor-clockMs~Nhdq_fck@a00ti,wait-gate-clockN core_l3_ickfixed-factor-clockDs~Osdrc_ick@a10ti,wait-gate-clockO gpmc_fckfixed-factor-clockOs~core_l4_ickfixed-factor-clockEs~Pmmchs2_ick@a10ti,omap3-interface-clockP mmchs1_ick@a10ti,omap3-interface-clockP hdq_ick@a10ti,omap3-interface-clockP mcspi4_ick@a10ti,omap3-interface-clockP mcspi3_ick@a10ti,omap3-interface-clockP mcspi2_ick@a10ti,omap3-interface-clockP mcspi1_ick@a10ti,omap3-interface-clockP i2c3_ick@a10ti,omap3-interface-clockP i2c2_ick@a10ti,omap3-interface-clockP i2c1_ick@a10ti,omap3-interface-clockP uart2_ick@a10ti,omap3-interface-clockP uart1_ick@a10ti,omap3-interface-clockP  gpt11_ick@a10ti,omap3-interface-clockP  gpt10_ick@a10ti,omap3-interface-clockP  mcbsp5_ick@a10ti,omap3-interface-clockP  mcbsp1_ick@a10ti,omap3-interface-clockP  omapctrl_ick@a10ti,omap3-interface-clockP dss_tv_fck@e00ti,gate-clock>dss_96m_fck@e00ti,gate-clockKdss2_alwon_fck@e00ti,gate-clock$dummy_ck fixed-clockAgpt1_gate_fck@c00ti,composite-gate-clock$ Qgpt1_mux_fck@c40ti,composite-mux-clockF$ @Rgpt1_fckti,composite-clockQRaes2_ick@a10ti,omap3-interface-clockP wkup_32k_fckfixed-factor-clockFs~Sgpio1_dbck@c00ti,gate-clockS sha12_ick@a10ti,omap3-interface-clockP wdt2_fck@c00ti,wait-gate-clockS wdt2_ick@c10ti,omap3-interface-clockT wdt1_ick@c10ti,omap3-interface-clockT gpio1_ick@c10ti,omap3-interface-clockT omap_32ksync_ick@c10ti,omap3-interface-clockT gpt12_ick@c10ti,omap3-interface-clockT gpt1_ick@c10ti,omap3-interface-clockT per_96m_fckfixed-factor-clock/s~per_48m_fckfixed-factor-clock6s~Uuart3_fck@1000ti,wait-gate-clockU gpt2_gate_fck@1000ti,composite-gate-clock$Vgpt2_mux_fck@1040ti,composite-mux-clockF$@Wgpt2_fckti,composite-clockVWgpt3_gate_fck@1000ti,composite-gate-clock$Xgpt3_mux_fck@1040ti,composite-mux-clockF$@Ygpt3_fckti,composite-clockXYgpt4_gate_fck@1000ti,composite-gate-clock$Zgpt4_mux_fck@1040ti,composite-mux-clockF$@[gpt4_fckti,composite-clockZ[gpt5_gate_fck@1000ti,composite-gate-clock$\gpt5_mux_fck@1040ti,composite-mux-clockF$@]gpt5_fckti,composite-clock\]gpt6_gate_fck@1000ti,composite-gate-clock$^gpt6_mux_fck@1040ti,composite-mux-clockF$@_gpt6_fckti,composite-clock^_gpt7_gate_fck@1000ti,composite-gate-clock$`gpt7_mux_fck@1040ti,composite-mux-clockF$@agpt7_fckti,composite-clock`agpt8_gate_fck@1000ti,composite-gate-clock$ bgpt8_mux_fck@1040ti,composite-mux-clockF$@cgpt8_fckti,composite-clockbcgpt9_gate_fck@1000ti,composite-gate-clock$ dgpt9_mux_fck@1040ti,composite-mux-clockF$@egpt9_fckti,composite-clockdeper_32k_alwon_fckfixed-factor-clockFs~fgpio6_dbck@1000ti,gate-clockfgpio5_dbck@1000ti,gate-clockfgpio4_dbck@1000ti,gate-clockfgpio3_dbck@1000ti,gate-clockfgpio2_dbck@1000ti,gate-clockf wdt3_fck@1000ti,wait-gate-clockf per_l4_ickfixed-factor-clockEs~ggpio6_ick@1010ti,omap3-interface-clockggpio5_ick@1010ti,omap3-interface-clockggpio4_ick@1010ti,omap3-interface-clockggpio3_ick@1010ti,omap3-interface-clockggpio2_ick@1010ti,omap3-interface-clockg wdt3_ick@1010ti,omap3-interface-clockg uart3_ick@1010ti,omap3-interface-clockg uart4_ick@1010ti,omap3-interface-clockggpt9_ick@1010ti,omap3-interface-clockg gpt8_ick@1010ti,omap3-interface-clockg gpt7_ick@1010ti,omap3-interface-clockggpt6_ick@1010ti,omap3-interface-clockggpt5_ick@1010ti,omap3-interface-clockggpt4_ick@1010ti,omap3-interface-clockggpt3_ick@1010ti,omap3-interface-clockggpt2_ick@1010ti,omap3-interface-clockgmcbsp2_ick@1010ti,omap3-interface-clockgmcbsp3_ick@1010ti,omap3-interface-clockgmcbsp4_ick@1010ti,omap3-interface-clockgmcbsp2_gate_fck@1000ti,composite-gate-clock mcbsp3_gate_fck@1000ti,composite-gate-clock mcbsp4_gate_fck@1000ti,composite-gate-clock emu_src_mux_ck@1140 ti,mux-clock$hij@kemu_src_ckti,clkdm-gate-clockklpclk_fck@1140ti,divider-clocklQ@\pclkx2_fck@1140ti,divider-clocklQ@\atclk_fck@1140ti,divider-clocklQ@\traceclk_src_fck@1140 ti,mux-clock$hij@mtraceclk_fck@1140ti,divider-clockm Q@\secure_32k_fck fixed-clockAngpt12_fckfixed-factor-clockns~wdt1_fckfixed-factor-clockns~security_l4_ick2fixed-factor-clockEs~oaes1_ick@a14ti,omap3-interface-clocko rng_ick@a14ti,omap3-interface-clocko sha11_ick@a14ti,omap3-interface-clocko des1_ick@a14ti,omap3-interface-clocko cam_mclk@f00ti,gate-clockpcam_ick@f10!ti,omap3-no-wait-interface-clockEcsi2_96m_fck@f00ti,gate-clock security_l3_ickfixed-factor-clockDs~qpka_ick@a14ti,omap3-interface-clockq icr_ick@a10ti,omap3-interface-clockP des2_ick@a10ti,omap3-interface-clockP mspro_ick@a10ti,omap3-interface-clockP mailboxes_ick@a10ti,omap3-interface-clockP ssi_l4_ickfixed-factor-clockEs~xsr1_fck@c00ti,wait-gate-clock$ sr2_fck@c00ti,wait-gate-clock$ sr_l4_ickfixed-factor-clockEs~dpll2_fck@40ti,divider-clock,Q@\rdpll2_ck@4ti,omap3-dpll-clock$r$@4sdpll2_m2_ck@44ti,divider-clocksQD\tiva2_ck@0ti,wait-gate-clocktmodem_fck@a00ti,omap3-interface-clock$ sad2d_ick@a10ti,omap3-interface-clockD mad2d_ick@a18ti,omap3-interface-clockD mspro_fck@a00ti,wait-gate-clock  ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock% ussi_ssr_div_fck_3430es2@a40ti,composite-divider-clock% @$vssi_ssr_fck_3430es2ti,composite-clockuvwssi_sst_fck_3430es2fixed-factor-clockws~ hsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockO ssi_ick_3430es2@a10ti,omap3-ssi-interface-clockx usim_gate_fck@c00ti,composite-gate-clockK  sys_d2_ckfixed-factor-clock$s~zomap_96m_d2_fckfixed-factor-clockKs~{omap_96m_d4_fckfixed-factor-clockKs~|omap_96m_d8_fckfixed-factor-clockKs~}omap_96m_d10_fckfixed-factor-clockKs~ ~dpll5_m2_d4_ckfixed-factor-clockys~dpll5_m2_d8_ckfixed-factor-clockys~dpll5_m2_d16_ckfixed-factor-clockys~dpll5_m2_d20_ckfixed-factor-clockys~usim_mux_fck@c40ti,composite-mux-clock($z{|}~ @\usim_fckti,composite-clockusim_ick@c10ti,omap3-interface-clockT  dpll5_ck@d04ti,omap3-dpll-clock$$  $ L 4dpll5_m2_ck@d50ti,divider-clockQ P\ysgx_gate_fck@b00ti,composite-gate-clock, core_d3_ckfixed-factor-clock,s~core_d4_ckfixed-factor-clock,s~core_d6_ckfixed-factor-clock,s~omap_192m_alwon_fckfixed-factor-clock(s~core_d2_ckfixed-factor-clock,s~sgx_mux_fck@b40ti,composite-mux-clock 0 @sgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clockD cpefuse_fck@a08ti,gate-clock$ ts_fck@a08ti,gate-clockF usbtll_fck@a08ti,wait-gate-clocky usbtll_ick@a18ti,omap3-interface-clockP mmchs3_ick@a10ti,omap3-interface-clockP mmchs3_fck@a00ti,wait-gate-clock  dss1_alwon_fck_3430es2@e00ti,dss-gate-clockdss_ick_3430es2@e10ti,omap3-dss-interface-clockEusbhost_120m_fck@1400ti,gate-clockyusbhost_48m_fck@1400ti,dss-gate-clock6usbhost_ick@1410ti,omap3-dss-interface-clockEuart4_fck@1000ti,wait-gate-clockUclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomain dpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomainldpll4_clkdmti,clockdomain"wkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainsd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 revsyscSfckick+ H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intc$H target-module@48056000ti,sysc-omap2ti,syscH`H`,H`(revsyscsyss #  %Oick+ H`dma-controller@0ti,omap3630-sdmati,omap-sdma *5 B`gpio@48310000ti,omap3-gpioH1gpio1Oaq$gpio@49050000ti,omap3-gpioIgpio2aq$en_usb2_port}enable usb2 portgpio@49052000ti,omap3-gpioI gpio3aq$gpio@49054000ti,omap3-gpioI@ gpio4aq$gpio@49056000ti,omap3-gpioI`!gpio5aq$gpio@49058000ti,omap3-gpioI"gpio6aq$serial@4806a000ti,omap3-uartH HR2127txrxuart1Alserial@4806c000ti,omap3-uartHIJ2347txrxuart2Alserial@49020000ti,omap3-uartIJn2567txrxuart3Altdefaulti2c@48070000 ti,omap3-i2cH827txrx+i2c1A'@twl@48H  ti,twl4030$tdefaultrtcti,twl4030-rtc bciti,twl4030-bci  vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2usb_1v8w@w@regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0regulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5regulator-vusb1v8ti,twl4030-vusb1v8regulator-vusb3v1ti,twl4030-vusb3v1regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@ regulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpioaq$en_on_board_gpio_61}en_hsusb2_clktwl4030-usbti,twl4030-usb *3pwmti,twl4030-pwm>pwmledti,twl4030-pwmled>pwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadIY8l  7 Smadcti,twl4030-madcypower1ti,twl4030-power-omap3-evmti,twl4030-power-idlei2c@48072000 ti,omap3-i2cH 927txrx+i2c2Ai2c@48060000 ti,omap3-i2cH=27txrx+i2c3Atvp5146@5c ti,tvp5146m2\mailbox@48094000ti,omap3-mailboxmailboxH @dsp  spi@48098000ti,omap2-mcspiH A+mcspi1@2#$%&'()* 7tx0rx0tx1rx1tx2rx2tx3rx3tsc2046@0 ti,tsc2046B@ @'0(@P[  ispi@4809a000ti,omap2-mcspiH B+mcspi2 2+,-.7tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3 27tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi42FG7tx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1v2=>7txrxStdefaultmmc@480b4000ti,omap3-hsmmcH @Vmmc22/07txrxV.+tdefaultwlcore@2 ti,wl1271N irqwakeupImmc@480ad000ti,omap3-hsmmcH ^mmc32MN7txrx disabledmmu@480bd400ti,omap2-iommuH mmu_isp mmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp12 7txrxfck disabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Drevsyscsyss %ick+ H rng@0 ti,omap2-rng 4mcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone2!"7txrxfckick disabledmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetone27txrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp427txrxfck+ disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp527txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d12E7rxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1revsyscsyss ' %fckick+ H1<Ptimer@0ti,omap3430-timerfck%[jzFtarget-module@49032000ti,sysc-omap2-timerti,syscI I I revsyscsyss ' %fckick+ I timer@0ti,omap3430-timer&timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@revsyscsyss ' %fckick+ H0@timer@0ti,omap3430-timer_[usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ ehci-phyohci@48064400ti,ohci-omap3HDLehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcn27rxtx+$aq 0,ethernet@gpmcsmsc,lan9221smsc,lan9115 8R`r(--x$>KUKo  tdefaultnand@0,0ti,omap2-nand   hynix,h8kds0un0mer-4em   'bch8 7R`,r,",(6@RR(+partition@0 HX-Loaderpartition@80000 HU-Bootpartition@1c0000 HEnvironment$partition@280000 HKernel(Ppartition@780000 HFilesystemxusb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs N Y a  j y usb2-phy. 2dss@48050000 ti,omap3-dssHokay dss_corefck+   tdefault  dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clk+encoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH  disabled dss_vencfcktv_dac_clkportendpoint   ssi-controller@48058000 ti,omap3-ssissiokayHHsysgddGgdd_mpu+ w  ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFserial@49042000ti,omap3-uartI P2QR7txrxuart4Alregulator-abb-mpu ti,abb-v1 abb_mpu_iva+H0rH0hbase-addressint-address $  ` sO7pinmux@480025a0 ti,omap3-padconfpinctrl-singleH%\+$9Wtdefaultpinmux_ehci_phy_pinsJLpinmux_hsusb2_2_pins0PRT V X Z isp@480bc000 ti,omap3-ispH H   ports+bandgap@48002524H%$ti,omap36xx-bandgap 'target-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_coreH 8sysc  fck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3630-srti,syscsmartreflex_mpu_ivaH 8sysc  fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivatarget-module@50000000ti,sysc-omap4ti,syscPP revsysc  fckick+ Popp-tableoperating-points-v2-ti-cpuopp50-300000000 = Dssssss R copp100-600000000 =#F DOOOOOO Ropp130-800000000 =/ D777777 Ropp1g-1000000000 =; D R oopp_supplyti,omap-opp-supply zthermal-zonescpu_thermal   N  tripscpu_alert 8 |passivecpu_crit _  |criticalcooling-mapsmap0  regulator-vddvarioregulator-fixed vddvarioregulator-vdd33aregulator-fixedvdd33ahsusb2_power_regregulator-fixed hsusb2_vbus2Z2Z q p hsusb2_phyusb-nop-xceiv %3tdefaultleds gpio-ledsledb Homap3evm::ledb  1default-onwl12xx_vmmcregulator-fixedvwl1271w@w@ q p  Gtdefaultbacklightgpio-backlight R regulator-lcd-3v3regulator-fixedlcd_3v32Z2Z p qdisplaysharp,ls037v7dw01 Hlcd ] j w %$ portendpoint  memory@80000000umemory compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3display0device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsgpio-hoggpiosoutput-lowline-nameinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesregulator-always-onti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cellsti,use_poweroff#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csspi-max-frequencyvcc-supplyti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,swap-xywakeup-sourcependown-gpioti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplybus-widthnon-removablecap-power-off-cardinterrupt-namesref-clock-frequencystatus#iommu-cellsti,#tlb-entriesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsbank-widthgpmc,device-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addresslinux,mtd-namenand-bus-widthti,nand-ecc-optgpmc,sync-clk-pslabelmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdds_dsi-supplyvdda_video-supplyremote-endpointdata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicestartup-delay-usenable-active-highreset-gpioslinux,default-triggervin-supplydefault-onpower-supplyenvdd-supplyenable-gpiosmode-gpios