Ð þí h8ÿ,( <þô9compulab,omap3-cm-t3730ti,omap3630ti,omap36xxti,omap3 +7CompuLab CM-T3730chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8lcpux|ƒcpu“à±¼Ë×pmu@54000000arm,cortex-a8-pmuxT€ßêdebugsssocti,omap-inframpu ti,omap3-mpuêmpuiva ti,iva2.2êivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busxhß +ôêl3_mainl4@48000000ti,omap3-l4-coresimple-bus+ ôHscm@2000ti,omap3-scmsimple-busx + ô pinmux@30 ti,omap3-padconfpinctrl-singlex08+û 0Nÿpinmux_uart3_pinsknp×çpinmux_mmc1_pins0k×ôpinmux_green_led_pinsk²×pinmux_dss_dpi_pins_common°k¤¦¨ª¸º¼¾ÀÂÄÆÈÊÌÎÐÒÔÖØÚ× pinmux_dss_dpi_pins_cm_t35x0k¬®°²´¶pinmux_ads7846_pinskŠ×ðpinmux_mcspi1_pins k˜šœž×ïpinmux_i2c1_pinskŠŒ×èpinmux_mcbsp2_pins k ×ýpinmux_smsc1_pinskˆj× pinmux_hsusb0_pins`krtvxz|~€‚„†ˆ× pinmux_twl4030_pinsk°A×épinmux_mmc2_pins0k(*,.02×öpinmux_wl12xx_gpiok²4× scm_conf@270sysconsimple-busxp0+ ôp0×pbias_regulator@2b0ti,pbias-omap3ti,pbias-omapx°pbias_mmc_omap2430†pbias_mmc_omap2430•w@­-ÆÀ×óclocks+mcbsp5_mux_fck@68Åti,composite-mux-clock|Òxh× mcbsp5_fckÅti,composite-clock| ×mcbsp1_mux_fck@4Åti,composite-mux-clock|Òx× mcbsp1_fckÅti,composite-clock| ×úmcbsp2_mux_fck@4Åti,composite-mux-clock| Òx×mcbsp2_fckÅti,composite-clock|×ümcbsp3_mux_fck@68Åti,composite-mux-clock| xh×mcbsp3_fckÅti,composite-clock|×þmcbsp4_mux_fck@68Åti,composite-mux-clock| Òxh×mcbsp4_fckÅti,composite-clock|×ÿclockdomainspinmux@a00 ti,omap3-padconfpinctrl-singlex \+û 0Nÿpinmux_twl4030_vpins k×êpinmux_dss_dpi_pins_cm_t37300k ×target-module@480a6000ti,sysc-omap2ti,syscxH `DH `HH `Lßrevsyscsyssé ö|ƒick+ ôH ` aes1@0 ti,omap3-aesxPß  txrxtarget-module@480c5000ti,sysc-omap2ti,syscxH PDH PHH PLßrevsyscsyssé ö|ƒick+ ôH P aes2@0 ti,omap3-aesxPßABtxrxprm@48306000 ti,omap3-prmxH0`@ß clocks+virt_16_8m_ckÅ fixed-clock Y×osc_sys_ck@d40Å ti,mux-clock|x @×sys_ck@1270Åti,divider-clock|Ò0xp;×"sys_clkout1@d70Åti,gate-clock|x pÒdpll3_x2_ckÅfixed-factor-clock|R]dpll3_m2x2_ckÅfixed-factor-clock|R]×!dpll4_x2_ckÅfixed-factor-clock| R]corex2_fckÅfixed-factor-clock|!R]×#wkup_l4_ickÅfixed-factor-clock|"R]×Rcorex2_d3_fckÅfixed-factor-clock|#R]׉corex2_d5_fckÅfixed-factor-clock|#R]׊clockdomainscm@48004000 ti,omap3-cmxH@@clocks+dummy_apb_pclkÅ fixed-clock omap_32k_fckÅ fixed-clock €×Dvirt_12m_ckÅ fixed-clock ·×virt_13m_ckÅ fixed-clock Æ]@×virt_19200000_ckÅ fixed-clock $ø×virt_26000000_ckÅ fixed-clock Œº€×virt_38_4m_ckÅ fixed-clock Ið×dpll4_ck@d00Åti,omap3-dpll-per-j-type-clock|""x D 0× dpll4_m2_ck@d48Åti,divider-clock| 0?x H;×$dpll4_m2x2_mul_ckÅfixed-factor-clock|$R]×%dpll4_m2x2_ck@d00Åti,hsdiv-gate-clock|%Òx g×&omap_96m_alwon_fckÅfixed-factor-clock|&R]×-dpll3_ck@d00Åti,omap3-dpll-core-clock|""x @ 0×dpll3_m3_ck@1140Åti,divider-clock|Ò0x@;×'dpll3_m3x2_mul_ckÅfixed-factor-clock|'R]×(dpll3_m3x2_ck@d00Åti,hsdiv-gate-clock|(Ò x g×)emu_core_alwon_ckÅfixed-factor-clock|)R]×fsys_altclkÅ fixed-clock ×2mcbsp_clksÅ fixed-clock ×dpll3_m2_ck@d40Åti,divider-clock|Ò0x @;×core_ckÅfixed-factor-clock|R]×*dpll1_fck@940Åti,divider-clock|*Ò0x @;×+dpll1_ck@904Åti,omap3-dpll-clock|"+x  $ @ 4×dpll1_x2_ckÅfixed-factor-clock|R]×,dpll1_x2m2_ck@944Åti,divider-clock|,0x D;×@cm_96m_fckÅfixed-factor-clock|-R]×.omap_96m_fck@d40Å ti,mux-clock|."Òx @×Idpll4_m3_ck@e40Åti,divider-clock| Ò0 x@;×/dpll4_m3x2_mul_ckÅfixed-factor-clock|/R]×0dpll4_m3x2_ck@d00Åti,hsdiv-gate-clock|0Òx g×1omap_54m_fck@d40Å ti,mux-clock|12Òx @×<cm_96m_d2_fckÅfixed-factor-clock|.R]×3omap_48m_fck@d40Å ti,mux-clock|32Òx @×4omap_12m_fckÅfixed-factor-clock|4R]×Kdpll4_m4_ck@e40Åti,divider-clock| 0x@;×5dpll4_m4x2_mul_ckÅti,fixed-factor-clock|5}‹˜×6dpll4_m4x2_ck@d00Åti,gate-clock|6Òx g˜×dpll4_m5_ck@f40Åti,divider-clock| 0?x@;×7dpll4_m5x2_mul_ckÅti,fixed-factor-clock|7}‹˜×8dpll4_m5x2_ck@d00Åti,hsdiv-gate-clock|8Òx g˜×ndpll4_m6_ck@1140Åti,divider-clock| Ò0?x@;×9dpll4_m6x2_mul_ckÅfixed-factor-clock|9R]×:dpll4_m6x2_ck@d00Åti,hsdiv-gate-clock|:Òx g×;emu_per_alwon_ckÅfixed-factor-clock|;R]×gclkout2_src_gate_ck@d70Å ti,composite-no-wait-gate-clock|*Òx p×=clkout2_src_mux_ck@d70Åti,composite-mux-clock|*".<x p×>clkout2_src_ckÅti,composite-clock|=>×?sys_clkout2@d70Åti,divider-clock|?Ò0@x p«mpu_ckÅfixed-factor-clock|@R]×Aarm_fck@924Åti,divider-clock|Ax $0emu_mpu_alwon_ckÅfixed-factor-clock|AR]×hl3_ick@a40Åti,divider-clock|*0x @;×Bl4_ick@a40Åti,divider-clock|BÒ0x @;×Crm_ick@c40Åti,divider-clock|CÒ0x @;gpt10_gate_fck@a00Åti,composite-gate-clock|"Ò x ×Egpt10_mux_fck@a40Åti,composite-mux-clock|D"Òx @×Fgpt10_fckÅti,composite-clock|EFgpt11_gate_fck@a00Åti,composite-gate-clock|"Ò x ×Ggpt11_mux_fck@a40Åti,composite-mux-clock|D"Òx @×Hgpt11_fckÅti,composite-clock|GHcore_96m_fckÅfixed-factor-clock|IR]×mmchs2_fck@a00Åti,wait-gate-clock|x Ò×¹mmchs1_fck@a00Åti,wait-gate-clock|x Ò׺i2c3_fck@a00Åti,wait-gate-clock|x Ò×»i2c2_fck@a00Åti,wait-gate-clock|x Ò×¼i2c1_fck@a00Åti,wait-gate-clock|x Ò×½mcbsp5_gate_fck@a00Åti,composite-gate-clock|Ò x × mcbsp1_gate_fck@a00Åti,composite-gate-clock|Ò x × core_48m_fckÅfixed-factor-clock|4R]×Jmcspi4_fck@a00Åti,wait-gate-clock|Jx Ò×¾mcspi3_fck@a00Åti,wait-gate-clock|Jx Ò׿mcspi2_fck@a00Åti,wait-gate-clock|Jx Ò×Àmcspi1_fck@a00Åti,wait-gate-clock|Jx Ò×Áuart2_fck@a00Åti,wait-gate-clock|Jx Ò×Âuart1_fck@a00Åti,wait-gate-clock|Jx Ò ×Ãcore_12m_fckÅfixed-factor-clock|KR]×Lhdq_fck@a00Åti,wait-gate-clock|Lx Ò×Äcore_l3_ickÅfixed-factor-clock|BR]×Msdrc_ick@a10Åti,wait-gate-clock|Mx Ò׎gpmc_fckÅfixed-factor-clock|MR]core_l4_ickÅfixed-factor-clock|CR]×Nmmchs2_ick@a10Åti,omap3-interface-clock|Nx Ò×Åmmchs1_ick@a10Åti,omap3-interface-clock|Nx Ò×Æhdq_ick@a10Åti,omap3-interface-clock|Nx Ò×Çmcspi4_ick@a10Åti,omap3-interface-clock|Nx Ò×Èmcspi3_ick@a10Åti,omap3-interface-clock|Nx Ò×Émcspi2_ick@a10Åti,omap3-interface-clock|Nx Ò×Êmcspi1_ick@a10Åti,omap3-interface-clock|Nx Ò×Ëi2c3_ick@a10Åti,omap3-interface-clock|Nx Ò×Ìi2c2_ick@a10Åti,omap3-interface-clock|Nx Ò×Íi2c1_ick@a10Åti,omap3-interface-clock|Nx Ò×Îuart2_ick@a10Åti,omap3-interface-clock|Nx Ò×Ïuart1_ick@a10Åti,omap3-interface-clock|Nx Ò ×Ðgpt11_ick@a10Åti,omap3-interface-clock|Nx Ò ×Ñgpt10_ick@a10Åti,omap3-interface-clock|Nx Ò ×Òmcbsp5_ick@a10Åti,omap3-interface-clock|Nx Ò ×Ómcbsp1_ick@a10Åti,omap3-interface-clock|Nx Ò ×Ôomapctrl_ick@a10Åti,omap3-interface-clock|Nx Ò×Õdss_tv_fck@e00Åti,gate-clock|<xÒ×´dss_96m_fck@e00Åti,gate-clock|IxÒ×µdss2_alwon_fck@e00Åti,gate-clock|"xÒ׶dummy_ckÅ fixed-clock gpt1_gate_fck@c00Åti,composite-gate-clock|"Òx ×Ogpt1_mux_fck@c40Åti,composite-mux-clock|D"x @×Pgpt1_fckÅti,composite-clock|OP×aes2_ick@a10Åti,omap3-interface-clock|NÒx ×wkup_32k_fckÅfixed-factor-clock|DR]×Qgpio1_dbck@c00Åti,gate-clock|Qx Ò׫sha12_ick@a10Åti,omap3-interface-clock|Nx Ò×Öwdt2_fck@c00Åti,wait-gate-clock|Qx Ò׬wdt2_ick@c10Åti,omap3-interface-clock|Rx Ò×­wdt1_ick@c10Åti,omap3-interface-clock|Rx Ò×®gpio1_ick@c10Åti,omap3-interface-clock|Rx Òׯomap_32ksync_ick@c10Åti,omap3-interface-clock|Rx Ò×°gpt12_ick@c10Åti,omap3-interface-clock|Rx Ò×±gpt1_ick@c10Åti,omap3-interface-clock|Rx Òײper_96m_fckÅfixed-factor-clock|-R]× per_48m_fckÅfixed-factor-clock|4R]×Suart3_fck@1000Åti,wait-gate-clock|SxÒ ×gpt2_gate_fck@1000Åti,composite-gate-clock|"Òx×Tgpt2_mux_fck@1040Åti,composite-mux-clock|D"x@×Ugpt2_fckÅti,composite-clock|TU×gpt3_gate_fck@1000Åti,composite-gate-clock|"Òx×Vgpt3_mux_fck@1040Åti,composite-mux-clock|D"Òx@×Wgpt3_fckÅti,composite-clock|VWgpt4_gate_fck@1000Åti,composite-gate-clock|"Òx×Xgpt4_mux_fck@1040Åti,composite-mux-clock|D"Òx@×Ygpt4_fckÅti,composite-clock|XYgpt5_gate_fck@1000Åti,composite-gate-clock|"Òx×Zgpt5_mux_fck@1040Åti,composite-mux-clock|D"Òx@×[gpt5_fckÅti,composite-clock|Z[gpt6_gate_fck@1000Åti,composite-gate-clock|"Òx×\gpt6_mux_fck@1040Åti,composite-mux-clock|D"Òx@×]gpt6_fckÅti,composite-clock|\]gpt7_gate_fck@1000Åti,composite-gate-clock|"Òx×^gpt7_mux_fck@1040Åti,composite-mux-clock|D"Òx@×_gpt7_fckÅti,composite-clock|^_gpt8_gate_fck@1000Åti,composite-gate-clock|"Ò x×`gpt8_mux_fck@1040Åti,composite-mux-clock|D"Òx@×agpt8_fckÅti,composite-clock|`agpt9_gate_fck@1000Åti,composite-gate-clock|"Ò x×bgpt9_mux_fck@1040Åti,composite-mux-clock|D"Òx@×cgpt9_fckÅti,composite-clock|bcper_32k_alwon_fckÅfixed-factor-clock|DR]×dgpio6_dbck@1000Åti,gate-clock|dxÒבgpio5_dbck@1000Åti,gate-clock|dxÒ×’gpio4_dbck@1000Åti,gate-clock|dxÒדgpio3_dbck@1000Åti,gate-clock|dxÒ×”gpio2_dbck@1000Åti,gate-clock|dxÒ וwdt3_fck@1000Åti,wait-gate-clock|dxÒ ×–per_l4_ickÅfixed-factor-clock|CR]×egpio6_ick@1010Åti,omap3-interface-clock|exÒ×—gpio5_ick@1010Åti,omap3-interface-clock|exÒטgpio4_ick@1010Åti,omap3-interface-clock|exÒ×™gpio3_ick@1010Åti,omap3-interface-clock|exÒךgpio2_ick@1010Åti,omap3-interface-clock|exÒ ×›wdt3_ick@1010Åti,omap3-interface-clock|exÒ לuart3_ick@1010Åti,omap3-interface-clock|exÒ ×uart4_ick@1010Åti,omap3-interface-clock|exÒמgpt9_ick@1010Åti,omap3-interface-clock|exÒ ןgpt8_ick@1010Åti,omap3-interface-clock|exÒ × gpt7_ick@1010Åti,omap3-interface-clock|exÒסgpt6_ick@1010Åti,omap3-interface-clock|exÒ×¢gpt5_ick@1010Åti,omap3-interface-clock|exÒ×£gpt4_ick@1010Åti,omap3-interface-clock|exÒפgpt3_ick@1010Åti,omap3-interface-clock|exÒ×¥gpt2_ick@1010Åti,omap3-interface-clock|exÒצmcbsp2_ick@1010Åti,omap3-interface-clock|exÒקmcbsp3_ick@1010Åti,omap3-interface-clock|exÒרmcbsp4_ick@1010Åti,omap3-interface-clock|exÒשmcbsp2_gate_fck@1000Åti,composite-gate-clock|Òx×mcbsp3_gate_fck@1000Åti,composite-gate-clock|Òx×mcbsp4_gate_fck@1000Åti,composite-gate-clock|Òx×emu_src_mux_ck@1140Å ti,mux-clock|"fghx@×iemu_src_ckÅti,clkdm-gate-clock|i×jpclk_fck@1140Åti,divider-clock|jÒ0x@;pclkx2_fck@1140Åti,divider-clock|jÒ0x@;atclk_fck@1140Åti,divider-clock|jÒ0x@;traceclk_src_fck@1140Å ti,mux-clock|"fghÒx@×ktraceclk_fck@1140Åti,divider-clock|kÒ 0x@;secure_32k_fckÅ fixed-clock €×lgpt12_fckÅfixed-factor-clock|lR]×wdt1_fckÅfixed-factor-clock|lR]security_l4_ick2Åfixed-factor-clock|CR]×maes1_ick@a14Åti,omap3-interface-clock|mÒx ×rng_ick@a14Åti,omap3-interface-clock|mx Ò×ûsha11_ick@a14Åti,omap3-interface-clock|mx Òdes1_ick@a14Åti,omap3-interface-clock|mx Òcam_mclk@f00Åti,gate-clock|nÒx˜cam_ick@f10Å!ti,omap3-no-wait-interface-clock|CxÒ×Ýcsi2_96m_fck@f00Åti,gate-clock|xÒ×Þsecurity_l3_ickÅfixed-factor-clock|BR]×opka_ick@a14Åti,omap3-interface-clock|ox Òicr_ick@a10Åti,omap3-interface-clock|Nx Òdes2_ick@a10Åti,omap3-interface-clock|Nx Òmspro_ick@a10Åti,omap3-interface-clock|Nx Òmailboxes_ick@a10Åti,omap3-interface-clock|Nx Òssi_l4_ickÅfixed-factor-clock|CR]×vsr1_fck@c00Åti,wait-gate-clock|"x Ò×sr2_fck@c00Åti,wait-gate-clock|"x Ò×sr_l4_ickÅfixed-factor-clock|CR]dpll2_fck@40Åti,divider-clock|*Ò0x@;×pdpll2_ck@4Åti,omap3-dpll-clock|"px$@4ÁÓÛ×qdpll2_m2_ck@44Åti,divider-clock|q0xD;×riva2_ck@0Åti,wait-gate-clock|rxÒ×ßmodem_fck@a00Åti,omap3-interface-clock|"x Ò×àsad2d_ick@a10Åti,omap3-interface-clock|Bx Ò×ámad2d_ick@a18Åti,omap3-interface-clock|Bx Ò×âmspro_fck@a00Åti,wait-gate-clock|x Òssi_ssr_gate_fck_3430es2@a00Å ti,composite-no-wait-gate-clock|#Òx ×sssi_ssr_div_fck_3430es2@a40Åti,composite-divider-clock|#Òx @$ï×tssi_ssr_fck_3430es2Åti,composite-clock|st×ussi_sst_fck_3430es2Åfixed-factor-clock|uR]×hsotgusb_ick_3430es2@a10Å"ti,omap3-hsotgusb-interface-clock|Mx Ò×ssi_ick_3430es2@a10Åti,omap3-ssi-interface-clock|vx Ò×usim_gate_fck@c00Åti,composite-gate-clock|IÒ x ×sys_d2_ckÅfixed-factor-clock|"R]×xomap_96m_d2_fckÅfixed-factor-clock|IR]×yomap_96m_d4_fckÅfixed-factor-clock|IR]×zomap_96m_d8_fckÅfixed-factor-clock|IR]×{omap_96m_d10_fckÅfixed-factor-clock|IR] ×|dpll5_m2_d4_ckÅfixed-factor-clock|wR]×}dpll5_m2_d8_ckÅfixed-factor-clock|wR]×~dpll5_m2_d16_ckÅfixed-factor-clock|wR]×dpll5_m2_d20_ckÅfixed-factor-clock|wR]×€usim_mux_fck@c40Åti,composite-mux-clock(|"xyz{|}~€Òx @;ׂusim_fckÅti,composite-clock|‚usim_ick@c10Åti,omap3-interface-clock|Rx Ò ׳dpll5_ck@d04Åti,omap3-dpll-clock|""x  $ L 4ÁÓ׃dpll5_m2_ck@d50Åti,divider-clock|ƒ0x P;×wsgx_gate_fck@b00Åti,composite-gate-clock|*Òx ׋core_d3_ckÅfixed-factor-clock|*R]ׄcore_d4_ckÅfixed-factor-clock|*R]×…core_d6_ckÅfixed-factor-clock|*R]׆omap_192m_alwon_fckÅfixed-factor-clock|&R]ׇcore_d2_ckÅfixed-factor-clock|*R]׈sgx_mux_fck@b40Åti,composite-mux-clock |„…†.‡ˆ‰Šx @׌sgx_fckÅti,composite-clock|‹Œ×sgx_ick@b10Åti,wait-gate-clock|Bx Ò×ãcpefuse_fck@a08Åti,gate-clock|"x Ò××ts_fck@a08Åti,gate-clock|Dx Ò×Øusbtll_fck@a08Åti,wait-gate-clock|wx Ò×Ùusbtll_ick@a18Åti,omap3-interface-clock|Nx Ò×Úmmchs3_ick@a10Åti,omap3-interface-clock|Nx Ò×Ûmmchs3_fck@a00Åti,wait-gate-clock|x Ò×Üdss1_alwon_fck_3430es2@e00Åti,dss-gate-clock|Òx˜×·dss_ick_3430es2@e10Åti,omap3-dss-interface-clock|CxÒ׸usbhost_120m_fck@1400Åti,gate-clock|wxÒ×äusbhost_48m_fck@1400Åti,dss-gate-clock|4xÒ×åusbhost_ick@1410Åti,omap3-dss-interface-clock|CxÒ×æuart4_fck@1000Åti,wait-gate-clock|SxÒתclockdomainscore_l3_clkdmti,clockdomain|Ždpll3_clkdmti,clockdomain|dpll1_clkdmti,clockdomain|per_clkdmti,clockdomainl|‘’“”•–—˜™š›œžŸ ¡¢£¤¥¦§¨©ªemu_clkdmti,clockdomain|jdpll4_clkdmti,clockdomain| wkup_clkdmti,clockdomain$|«¬­®¯°±²³dss_clkdmti,clockdomain|´µ¶·¸core_l4_clkdmti,clockdomain”|¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖ×ØÙÚÛÜcam_clkdmti,clockdomain|ÝÞiva2_clkdmti,clockdomain|ßdpll2_clkdmti,clockdomain|qd2d_clkdmti,clockdomain |àáâdpll5_clkdmti,clockdomain|ƒsgx_clkdmti,clockdomain|ãusbhost_clkdmti,clockdomain |äåætarget-module@48320000ti,sysc-omap2ti,syscxH2H2 ßrevsyscö|Q°ƒfckick+ ôH2counter@0ti,omap-counter32kx interrupt-controller@48200000ti,omap3-intc xH ×target-module@48056000ti,sysc-omap2ti,syscxH`H`,H`(ßrevsyscsyssé# û ö|Mƒick+ ôH`dma-controller@0ti,omap3630-sdmati,omap-sdmaxß   !`×gpio@48310000ti,omap3-gpioxH1ßêgpio1.@P gpio@49050000ti,omap3-gpioxIßêgpio2@P ×ògpio@49052000ti,omap3-gpioxI ßêgpio3@P ×!gpio@49054000ti,omap3-gpioxI@ß êgpio4@P gpio@49056000ti,omap3-gpioxI`ß!êgpio5@P ×ùgpio@49058000ti,omap3-gpioxI€ß"êgpio6@P × serial@4806a000ti,omap3-uartxH  \H12txrxêuart1 Ülserial@4806c000ti,omap3-uartxHÀ\I34txrxêuart2 Ülserial@49020000ti,omap3-uartxI\J56txrxêuart3 Ülpdefault~çi2c@48070000 ti,omap3-i2cxH€ß8txrx+êi2c1pdefault~è €at24@50 atmel,24c02ˆxPtwl@48xHß  ti,twl4030 pdefault~éêaudioti,twl4030-audiocodecrtcti,twl4030-rtcß bciti,twl4030-bciß ‘ëŸì «vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2×"regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1• 'À­ ×regulator-vdacti,twl4030-vdac•w@­w@×regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1•:­0°×õregulator-vmmc2ti,twl4030-vmmc2•:­0°regulator-vusb1v5ti,twl4030-vusb1v5×íregulator-vusb1v8ti,twl4030-vusb1v8×îregulator-vusb3v1ti,twl4030-vusb3v1×ëregulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2•w@­w@regulator-vsimti,twl4030-vsim•w@­-ÆÀgpioti,twl4030-gpio@P ¼È×twl4030-usbti,twl4030-usbß Óíáîïëý× pwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonßkeypadti,twl4030-keypadß,$?0iglj. madcti,twl4030-madcßL×ìi2c@48072000 ti,omap3-i2cxH €ß9txrx+êi2c2i2c@48060000 ti,omap3-i2cxH€ß=txrx+êi2c3 €mailbox@48094000ti,omap3-mailboxêmailboxxH @ß^j|dsp Ž ™spi@48098000ti,omap2-mcspixH €ßA+êmcspi1¤@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3pdefault~ïads7846@0pdefault~ð ti,ads7846²ñx½ã` òß ÏòÜåÿî÷ÿ´ÿ 0 @Pspi@4809a000ti,omap2-mcspixH  ßB+êmcspi2¤ +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspixH €ß[+êmcspi3¤ tx0rx0tx1rx1spi@480ba000ti,omap2-mcspixH  ß0+êmcspi4¤FGtx0rx01w@480b2000 ti,omap3-1wxH ß:êhdq1wmmc@4809c000ti,omap3-hsmmcxH ÀßSêmmc1^=>txrxkópdefault~ôx‚õmmc@480b4000ti,omap3-hsmmcxH @ßVêmmc2/0txrxpdefault~ö‚÷Žø›x©+wlcore@2 ti,wl1271x ùß¼Iðmmc@480ad000ti,omap3-hsmmcxH Ðß^êmmc3MNtxrx Ðdisabledmmu@480bd400×ti,omap2-iommuxH Ô€ßêmmu_ispä×mmu@5d000000×ti,omap2-iommux]€ßêmmu_iva Ðdisabledwdt@48314000 ti,omap3-wdtxH1@€ êwd_timer2mcbsp@48074000ti,omap3-mcbspxH@ÿßmpu ß;< ôcommontxrx€êmcbsp1 txrx|úƒfck Ðdisabledtarget-module@480a0000ti,sysc-omap2ti,syscxH <H @H Dßrevsyscsysséö|ûƒick+ ôH rng@0 ti,omap2-rngx ß4mcbsp@49022000ti,omap3-mcbspxI ÿI€ÿ ßmpusidetoneß>?ôcommontxrxsidetoneêmcbsp2mcbsp2_sidetone!"txrx|ü§ƒfckickÐokaypdefault~ý×mcbsp@49024000ti,omap3-mcbspxI@ÿI ÿ ßmpusidetoneßYZôcommontxrxsidetone€êmcbsp3mcbsp3_sidetonetxrx|þ¨ƒfckick Ðdisabledmcbsp@49026000ti,omap3-mcbspxI`ÿßmpu ß67 ôcommontxrx€êmcbsp4txrx|ÿƒfck Ðdisabledmcbsp@48096000ti,omap3-mcbspxH `ÿßmpu ßQR ôcommontxrx€êmcbsp5txrx|ƒfck Ðdisabledsham@480c3000ti,omap3-shamêshamxH 0dß1Erxtarget-module@48318000ti,sysc-omap2-timerti,syscxH1€H1€H1€ßrevsyscsyssé' ö|²ƒfckick+ ôH1€$8timer@0ti,omap3430-timerx€|ƒfckß%CRbDtarget-module@49032000ti,sysc-omap2-timerti,syscxI I I ßrevsyscsyssé' ö|¦ƒfckick+ ôI timer@0ti,omap3430-timerxß&timer@49034000ti,omap3430-timerxI@ß'êtimer3timer@49036000ti,omap3430-timerxI`ß(êtimer4timer@49038000ti,omap3430-timerxI€ß)êtimer5ytimer@4903a000ti,omap3430-timerxI ß*êtimer6ytimer@4903c000ti,omap3430-timerxIÀß+êtimer7ytimer@4903e000ti,omap3430-timerxIàß,êtimer8†ytimer@49040000ti,omap3430-timerxIß-êtimer9†timer@48086000ti,omap3430-timerxH`ß.êtimer10†timer@48088000ti,omap3430-timerxH€ß/êtimer11†target-module@48304000ti,sysc-omap2-timerti,syscxH0@H0@H0@ßrevsyscsyssé' ö|±ƒfckick+ ôH0@timer@0ti,omap3430-timerxß_C“usbhstll@48062000 ti,usbhs-tllxH ßN êusb_tll_hsusbhshost@48064000ti,usbhs-hostxH@ êusb_host_hs+ô £ehci-phy ®ehci-phyohci@48064400ti,ohci-omap3xHDßL¹ehci@48064800 ti,ehci-omapxHHßMÑgpmc@6e000000ti,omap3430-gpmcêgpmcxnÐßrxtxÖâ+ @P ô,×nand@0,0ti,omap2-nand x ßôsw%3xExWfxyxŒšZ©·ZÆàHï< xx+º=Z+partition@0Uxloaderxpartition@80000Uubootxpartition@260000Uuboot environmentx&partition@2a0000Ulinuxx*@partition@6a0000Urootfsxjˆethernet@gpmcsmsc,lan9221smsc,lan9115[f€%3–E–Wfy(©-·ŒŒ-šŒ ››àxÆšKïK±É=+àðþ pdefault~   ß xÿusb_otg_hs@480ab000ti,omap3-musbxH °ß\]ômcdma êusb_otg_hs ! , 4 pdefault~  = L Ñ  Tusb2-phy ^2dss@48050000 ti,omap3-dssxHÐokay êdss_core|·ƒfck+ôpdefault~ dispc@48050400ti,omap3-dispcxHß êdss_dispc|·ƒfckencoder@4804fc00 ti,omap3-dsixHüHþ@Hÿ ßprotophypllß Ðdisabled êdss_dsi1|·¶ ƒfcksys_clk+encoder@48050800ti,omap3-rfbixH Ðdisabled êdss_rfbi|·¸ƒfckickencoder@48050c00ti,omap3-vencxH Ðokay êdss_venc|´µƒfcktv_dac_clk dportendpoint p €×ssi-controller@48058000 ti,omap3-ssiêssiÐokayxH€HßsysgddßGôgdd_mpu+ô |u ƒssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portxH H¨ßtxrxßCDssi-port@4805b000ti,omap3-ssi-portxH°H¸ßtxrxßEFserial@49042000ti,omap3-uartxI ßPQRtxrxêuart4 Ülregulator-abb-mpu ti,abb-v1 †abb_mpu_iva+xH0rðH0hßbase-addressint-address Œ|" ¥ ¶` ÆsO€7Èû×pinmux@480025a0 ti,omap3-padconfpinctrl-singlexH% \+û 0Nÿisp@480bc000 ti,omap3-ispxH ÀüH Øß Òð ÙÅports+bandgap@48002524xH%$ti,omap36xx-bandgap å×target-module@480cb000ti,sysc-omap3630-srti,syscêsmartreflex_corexH °8ßsyscé ö|ƒfck+ ôH °smartreflex@0ti,omap3-smartreflex-corexßtarget-module@480c9000ti,sysc-omap3630-srti,syscêsmartreflex_mpu_ivaxH 8ßsyscé ö|ƒfck+ ôH smartreflex@480c9000ti,omap3-smartreflex-mpu-ivaxßtarget-module@50000000ti,sysc-omap4ti,syscxPþPþ ßrevsysc û ö|ãƒfckick+ ôPopp-tableoperating-points-v2-ti-cpu×opp50-300000000 ûᣠssssss ÿÿÿÿ !opp100-600000000 û#ÃF O€O€O€O€O€O€ ÿÿÿÿopp130-800000000 û/¯ 7È7È7È7È7È7È ÿÿÿÿopp1g-1000000000 û;šÊ ûûûûûû ÿÿÿÿ -opp_supplyti,omap-opp-supply 8ûthermal-zonescpu_thermal Sú iè wN  „tripscpu_alert ”8€  Ðspassive×cpu_crit ”_  Ð scriticalcooling-mapsmap0 « °ÿÿÿÿÿÿÿÿmemory@80000000lmemoryx€leds gpio-ledspdefault~ledb Ucm-t3x:green ¿  Åheartbeathsusb1_power_regregulator-fixed †hsusb1_vbus•2Z ­2Z  Ûp×hsusb2_power_regregulator-fixed †hsusb2_vbus•2Z ­2Z  Ûp×hsusb1_phyusb-nop-xceiv² ì×hsusb2_phyusb-nop-xceiv² ì×ads7846-regregulator-fixed †ads7846-reg•2Z ­2Z ×ñsvideo-connectorsvideo-connectorUtvportendpoint p×soundti,omap-twl4030 øcm-t35 regulator-vddvarioregulator-fixed †vddvario ×regulator-vdd33aregulator-fixed†vdd33a ×wl12xx_vmmc2regulator-fixed†vw1271pdefault~ •w@­w@ ×!  ÛN  ×÷wl12xx_vaux2regulator-fixed†vwl1271_vaux2•w@­w@ 1"×ø compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0pagesizebci3v1-supplyio-channelsio-channel-namesti,use-ledsti,pullupsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repwakeup-sourceti,dual-voltpbias-supplybus-widthvmmc-supplyvqmmc-supplynon-removablecap-power-off-cardref-clock-frequencystatus#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport1-modeport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,page-burst-access-nsgpmc,access-nsgpmc,cycle2cycle-delay-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,bus-turnaround-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdda-supplyremote-endpointti,channelsti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicegpioslinux,default-triggerstartup-delay-usreset-gpiosti,modelti,mcbspregulator-always-onenable-active-highvin-supply