8(#asus,rk3288-tinkerrockchip,rk3288&"7Rockchip RK3288 Asus Tinker Boardaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5< Hcpu@501cpuarm,cortex-a12'@5Hcpu@502cpuarm,cortex-a12'@5Hcpu@503cpuarm,cortex-a12'@5Hcpu-opp-tableoperating-points-v2PHopp-126000000[b opp-216000000[ b opp-312000000[b opp-408000000[Qb opp-600000000[#Fb opp-696000000[)|b~opp-816000000[0,bB@opp-1008000000[<bopp-1200000000[Gbopp-1416000000[TfrbOopp-1512000000[ZJb opp-1608000000[_"bpamba simple-buspdma-controller@ff250000arm,pl330arm,primecell%@w5 apb_pclkHdma-controller@ff600000arm,pl330arm,primecell`@w5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@w5 apb_pclkHSreserved-memorypdma-unusable@fe000000oscillator fixed-clockn6xin24mH timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 5 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshc р 5Drvbiuciuciu-driveciu-sample  @#resetokay/9K\fqdefault dwmmc@ff0d0000rockchip,rk3288-dw-mshc р 5Eswbiuciuciu-driveciu-sample ! @#reset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshc р 5Ftxbiuciuciu-driveciu-sample "@#reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshc р 5Guybiuciuciu-driveciu-sample #@#reset disabledsaradc@ff100000rockchip,saradc $5I[saradcapb_pclkW #saradc-apbokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk  txrx ,qdefault disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk txrx -qdefault disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclktxrx .qdefault  disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mqdefault! disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5Oqdefault" disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pqdefault# disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Qqdefault$okayHiserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 75MUbaudclkapb_pclkqdefault%okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 85NVbaudclkapb_pclkqdefault&okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 95OWbaudclkapb_pclkqdefault'okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :5PXbaudclkapb_pclkqdefault(okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;5QYbaudclkapb_pclkqdefault)okaythermal-zonesreserve_thermal *cpu_thermald *tripscpu_alert0p&passiveH+cpu_alert1$&passiveH,cpu_crit_& criticalcooling-mapsmap01+06map11,06gpu_thermald *tripsgpu_alert0p&passiveH-gpu_crit_& criticalcooling-mapsmap01-06tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk #tsadc-apbqinitdefaultsleep.E/O.YosokayH*ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq085fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB #stmmacethok1input rgmii2qdefault3 4- C'B@X0ausb@ff500000 generic-ehciP 5usbhostj5ousbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otgyhostj6 ousb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otgyotg@@ j7 ousb2-phyokayusb@ff5c0000 generic-ehci\ 5usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5Lqdefault8okaypmic@1brockchip,rk808&9xin32krk808-clkout29 9 qdefault:;<=>>>>>&>2?>?J?W>d?q?regulatorsDCDC_REG1~ qpvdd_armpH regulator-state-memDCDC_REG2~ Pvdd_gpupHnregulator-state-mem)B@DCDC_REG3~vcc_ddrregulator-state-memDCDC_REG4~2Z2Zvcc_ioH?regulator-state-mem)2ZLDO_REG1~w@w@ vcc18_ldo1Hregulator-state-mem)w@LDO_REG2~2Z2Z vcc33_mipiregulator-state-memLDO_REG3~B@B@vdd_10regulator-state-mem)B@LDO_REG4~w@w@ vcc18_codecregulator-state-mem)w@LDO_REG5w@2Z vccio_sdHregulator-state-mem)2ZLDO_REG6~B@B@ vdd10_lcdregulator-state-mem)B@LDO_REG7~w@w@vcc_18regulator-state-mem)w@LDO_REG8~w@w@ vcc18_lcdregulator-state-mem)w@SWITCH_REG1~ vcc33_sdHregulator-state-memSWITCH_REG2~ vcc33_lanH2regulator-state-memi2c@ff660000rockchip,rk3288-i2cf =i2c5Nqdefault@okaypwm@ff680000rockchip,rk3288-pwmhEqdefaultA5^pwmokaypwm@ff680010rockchip,rk3288-pwmhEqdefaultB5^pwm disabledpwm@ff680020rockchip,rk3288-pwmh EqdefaultC5^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0EqdefaultD5^pwm disabledbus_intmem@ff700000 mmio-srampppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsHpower-controller!rockchip,rk3288-power-controllerPh HVpd_vio@9 5chgfdehilkj$dEFGHIJKLMpd_hevc@11 5opdNOpd_video@12 5dPpd_gpu@13 5dQRreboot-modesyscon-reboot-modekrRB~RBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv0Hjk$#gׄeрxhрxhHsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwH0edp-phyrockchip,rk3288-dp-phy5h24m disabledHfio-domains"rockchip,rk3288-io-voltage-domainokayusbphyrockchip,rk3288-usb-phyokayusb-phy@320 5]phyclkH7usb-phy@33445^phyclkH5usb-phy@348H5_phyclkH6watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk5TStx 6qdefaultT0 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5SStxrxi2s_hclki2s_clk5RqdefaultUokayHxcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk #crypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu5 aclkiface) disablediommu@ff914000rockchip,iommu @P isp_mmu5 aclkiface)6 disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclkQV ilm #coreaxiahbvop@ff930000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vopQV def #axiahbdclk_WokayportH endpoint@0fXHjendpoint@1fYHgendpoint@2fZHaendpoint@3f[Hdiommu@ff930300rockchip,iommu  vopb_mmu5 aclkifaceQV )okayHWvop@ff940000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vopQV  #axiahbdclk_\okayportH endpoint@0f]Hkendpoint@1f^Hhendpoint@2f_Hbendpoint@3f`Heiommu@ff940300rockchip,iommu  vopl_mmu5 aclkifaceQV )okayH\mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclkQV 0 disabledportsportendpoint@0faHZendpoint@1fbH_lvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdsqlcdccQV 0 disabledportsport@0endpoint@0fdH[endpoint@1feH`dp@ff970000rockchip,rk3288-dp@ b5icdppclkjfodpo#dp0 disabledportsport@0endpoint@0fgHYendpoint@1fhH^hdmi@ff980000rockchip,rk3288-dw-hdmi0 g5hmniahbisfrcecQV okayviHwportsportendpoint@0fjHXendpoint@1fkH]video-codec@ff9a0000rockchip,rk3288-vpu   vepuvdpu5 aclkhclk_lQV iommu@ff9a0800rockchip,iommu vpu_mmu5 aclkiface)QV Hliommu@ff9c0440rockchip,iommu @@@ o hevc_mmu5 aclkiface) disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu5mQV okayngpu-opp-tableoperating-points-v2Hmopp@100000000[b~opp@200000000[ b~opp@300000000[bB@opp@400000000[ׄbopp@500000000[ebOopp@600000000[#Fbqos@ffaa0000syscon HQqos@ffaa0080syscon HRqos@ffad0000syscon HFqos@ffad0100syscon HGqos@ffad0180syscon HHqos@ffad0400syscon HIqos@ffad0480syscon HJqos@ffad0500syscon HEqos@ffad0800syscon HKqos@ffad0880syscon HLqos@ffad0900syscon HMqos@ffae0000syscon HPqos@ffaf0000syscon HNqos@ffaf0080syscon HOinterrupt-controller@ffc01000 arm,gic-400@ @ `   Hefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl0pgpio0@ff750000rockchip,gpio-banku Q5@H9gpio1@ff780000rockchip,gpio-bankx R5AHvgpio2@ff790000rockchip,gpio-banky S5Bgpio3@ff7a0000rockchip,gpio-bankz T5Cgpio4@ff7b0000rockchip,gpio-bank{ U5DH4gpio5@ff7c0000rockchip,gpio-bank| V5Egpio6@ff7d0000rockchip,gpio-bank} W5Fgpio7@ff7e0000rockchip,gpio-bank~ X5GHygpio8@ff7f0000rockchip,gpio-bank Y5Hhdmihdmi-cec-c0ohdmi-cec-c7ohdmi-ddc oopcfg-pull-upHppcfg-pull-downHqpcfg-pull-noneHopcfg-pull-none-12ma Htsleepglobal-pwroffoH;ddrio-pwroffoddr0-retentionpddr1-retentionpedpedp-hpd qi2c0i2c0-xfer ooH8i2c1i2c1-xfer ooH!i2c2i2c2-xfer  o oH@i2c3i2c3-xfer ooH"i2c4i2c4-xfer ooH#i2c5i2c5-xfer ooH$i2s0i2s0-bus`ooooooHUlcdclcdc-ctl@ooooHcsdmmcsdmmc-clkrH sdmmc-cmdsHsdmmc-cdpHsdmmc-bus1psdmmc-bus4@ssssHsdmmc-pwr oHzsdio0sdio0-bus1psdio0-bus4@ppppsdio0-cmdpsdio0-clkosdio0-cdpsdio0-wppsdio0-pwrpsdio0-bkpwrpsdio0-intpsdio1sdio1-bus1psdio1-bus4@ppppsdio1-cdpsdio1-wppsdio1-bkpwrpsdio1-intpsdio1-cmdpsdio1-clkosdio1-pwr pemmcemmc-clkoemmc-cmdpemmc-pwr pemmc-bus1pemmc-bus4@ppppemmc-bus8ppppppppspi0spi0-clk pHspi0-cs0 pHspi0-txpHspi0-rxpHspi0-cs1pspi1spi1-clk pHspi1-cs0 pHspi1-rxpHspi1-txpHspi2spi2-cs1pspi2-clkpHspi2-cs0pH spi2-rxpHspi2-tx pHuart0uart0-xfer poH%uart0-ctspuart0-rtsouart1uart1-xfer p oH&uart1-cts puart1-rts ouart2uart2-xfer poH'uart3uart3-xfer poH(uart3-cts puart3-rts ouart4uart4-xfer poH)uart4-cts puart4-rts otsadcotp-gpio oH.otp-out oH/pwm0pwm0-pinoHApwm1pwm1-pinoHBpwm2pwm2-pinoHCpwm3pwm3-pinoHDgmacrgmii-pinsoooottttooo ttooH3rmii-pinsoooooooooospdifspdif-tx oHTpcfg-pull-none-drv-8maHrpcfg-pull-up-drv-8maHsbacklightbl-enobuttonspwrbtnpHueth_phyeth-phy-pwropmicpmic-intpH:dvs-1 qH<dvs-2 qH=usbhost-vbus-drvopwr-3gochosenserial2:115200n8memorymemoryexternal-gmac-clock fixed-clocksY@ ext_gmacH1gpio-keys gpio-keys"qdefaultubutton@0 9-t8GPIO Key Power>Odgpio-leds gpio-ledsact-led vammc0heartbeat-led v aheartbeatpwr-led 9 adefault-onsoundsimple-audio-cardwi2srockchip,tinker-codecsimple-audio-card,codecwsimple-audio-card,cpuxvsys-regulatorregulator-fixedvcc_sysLK@LK@~H>sdmmc-regulatorregulator-fixed (y qdefaultzvcc_sd2Z2Z? #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclockscpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedbroken-cddisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supply#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-modephy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizedvs-gpiosrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellssdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthstdout-pathautorepeatlinux,codelabellinux,input-typedebounce-intervallinux,default-triggersimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssound-daistartup-delay-usvin-supply