8D( L google,veyron-speedy-rev9google,veyron-speedy-rev8google,veyron-speedy-rev7google,veyron-speedy-rev6google,veyron-speedy-rev5google,veyron-speedy-rev4google,veyron-speedy-rev3google,veyron-speedy-rev2google,veyron-speedygoogle,veyronrockchip,rk3288&7Google Speedyaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/spi@ff110000/ec@0/i2c-tunnelarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12h w@\@p@ @@OOa sB@ ~ ' 9 K 0 *@8?KQcpu@501cpuarm,cortex-a12KQcpu@502cpuarm,cortex-a12KQcpu@503cpuarm,cortex-a12KQamba simple-busYdma-controller@ff250000arm,pl330arm,primecell%@`k8 apb_pclkKQdma-controller@ff600000arm,pl330arm,primecell`@`k8 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@`k8 apb_pclkK_Q_reserved-memoryYdma-unusable@fe000000oscillator fixed-clockn6xin24mK Q timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 8 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 8Drvbiuciuciu-driveciu-sample  @okay (9 K TZr| defaultdwmmc@ff0d0000rockchip,rk3288-dw-mshcр 8Eswbiuciuciu-driveciu-sample ! @okay (rdefault |dwmmc@ff0e0000rockchip,rk3288-dw-mshcр 8Ftxbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 8Guybiuciuciu-driveciu-sample #@okay T)rdefault saradc@ff100000rockchip,saradc $88I[saradcapb_pclkW Jsaradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi8ARspiclkapb_pclkV  [txrx ,default !"okayec@0google,cros-ec-spie& default#-i2c-tunnelgoogle,cros-ec-i2c-tunnelsbs-battery@bsbs,sbs-battery keyboard-controllergoogle,cros-ec-keyb @ };0DY1 d>"A#( C  \=@V B |)<?   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ispi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi8BSspiclkapb_pclkV [txrx -default$%&' disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi8CTspiclkapb_pclkV[txrx .default()*+okay flash@0jedec,spi-nori2c@ff140000rockchip,rk3288-i2c >i2c8Mdefault,okay,2Ddtpm@20infineon,slb9645tt [i2c@ff150000rockchip,rk3288-i2c ?i2c8Odefault- disabledi2c@ff160000rockchip,rk3288-i2c @i2c8Pdefault.okay,2D,ts3a227e@3b ti,ts3a227e;&/default0sKQtrackpad@15elan,ekth3000& default1~2i2c@ff170000rockchip,rk3288-i2c Ai2c8Qdefault3okay,,DKqQqserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 78MUbaudclkapb_pclkdefault 456okayMlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 88NVbaudclkapb_pclkdefault7okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 98OWbaudclkapb_pclkdefault8okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :8PXbaudclkapb_pclkdefault9 disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;8QYbaudclkapb_pclkdefault: disabledthermal-zonesreserve_thermal;cpu_thermald;tripscpu_alert0passiveK<Q<cpu_alert1ppassiveK=Q=cpu_crit_ criticalcooling-mapsmap0< #map1= #gpu_thermald;tripsgpu_alert0ppassiveK>Q>gpu_crit_ criticalcooling-mapsmap0> #tsadc@ff280000rockchip,rk3288-tsadc( %8HZtsadcapb_pclk Jtsadc-apbinitdefaultsleep?2@<?F\sokaysK;Q;ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irqA88fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB Jstmmaceth disabledusb@ff500000 generic-ehciP 8usbhostBusbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 8otghostC usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 8otghost@@ D usb2-phyokayzDusb@ff5c0000 generic-ehci\ 8usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c8LdefaultEokay,2Ddpmic@1brockchip,rk808xin32kwifibt_32kin&/defaultF6Wco{G2GGKQregulatorsDCDC_REG1vdd_arm q8 PqKQregulator-state-memeDCDC_REG2vdd_gpu 58Pqregulator-state-mem~B@DCDC_REG3 vcc135_ddrregulator-state-mem~DCDC_REG4vcc_18 w@8w@KQregulator-state-mem~w@LDO_REG1 vcc33_io 2Z82ZK2Q2regulator-state-mem~2ZLDO_REG3vdd_10 B@8B@regulator-state-mem~B@LDO_REG7vdd10_lcd_pwren_h &%8&%regulator-state-memeSWITCH_REG1 vcc33_lcdK]Q]regulator-state-memeLDO_REG6 vcc18_codec w@8w@K^Q^regulator-state-memeLDO_REG4 vccio_sd w@82ZKQregulator-state-memeLDO_REG5 vcc33_sd 2Z82ZK Q regulator-state-memeLDO_REG8 vcc33_ccd 2Z82Zregulator-state-mem~2Zi2c@ff660000rockchip,rk3288-i2cf =i2c8NdefaultHokay,2D max98090@10maxim,max98090&Imclk8qdefaultJKQpwm@ff680000rockchip,rk3288-pwmhdefaultK8^pwmokayKQpwm@ff680010rockchip,rk3288-pwmhdefaultL8^pwmokaypwm@ff680020rockchip,rk3288-pwmh defaultM8^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultN8^pwm disabledbus_intmem@ff700000 mmio-sramp Ypsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsKQpower-controller!rockchip,rk3288-power-controllerh KbQbpd_vio@9 8chgfdehilkj$OPQRSTUVWpd_hevc@11 8opXYpd_video@12 8Zpd_gpu@13 8[\reboot-modesyscon-reboot-modeRBRBRB  RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruvAHjk$#gׄeрxhрxhKQsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwKAQAedp-phyrockchip,rk3288-dp-phy8h24m"okayKmQmio-domains"rockchip,rk3288-io-voltage-domainokay-27BP2`2n]z^usbphyrockchip,rk3288-usb-phyokayusb-phy@320" 8]phyclkKDQDusb-phy@334"48^phyclkKBQBusb-phy@348"H8_phyclkKCQCwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt8p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk8TV_[tx 6default`A disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5V__[txrxi2s_hclki2s_clk8RdefaultaokayKQcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 8}aclkhclksclkapb_pclk Jcrypto-rstokayvop@ff930000rockchip,rk3288-vop 8aclk_vopdclk_vophclk_vopb def JaxiahbdclkcokayportK Q endpoint@0dKrQrendpoint@1eKnQnendpoint@2fKkQkiommu@ff930300rockchip,iommu  vopb_mmub  okayKcQcvop@ff940000rockchip,rk3288-vop 8aclk_vopdclk_vophclk_vopb  JaxiahbdclkgokayportK Q endpoint@0hKsQsendpoint@1iKoQoendpoint@2jKlQliommu@ff940300rockchip,iommu  vopl_mmub  okayKgQgmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 8~d refpclkb A disabledportsportendpoint@0kKfQfendpoint@1lKjQjdp@ff970000rockchip,rk3288-dp@ b8icdppclkmdpoJdpAokay portsport@0endpoint@0nKeQeendpoint@1oKiQiport@1endpointpKQhdmi@ff980000rockchip,rk3288-dw-hdmiA g8hm iahbisfrb okay #qportsportendpoint@0rKdQdendpoint@1sKhQhqos@ffaa0000syscon K[Q[qos@ffaa0080syscon K\Q\qos@ffad0000syscon KPQPqos@ffad0100syscon KQQQqos@ffad0180syscon KRQRqos@ffad0400syscon KSQSqos@ffad0480syscon KTQTqos@ffad0500syscon KOQOqos@ffad0800syscon KUQUqos@ffad0880syscon KVQVqos@ffad0900syscon KWQWqos@ffae0000syscon KZQZqos@ffaf0000syscon KXQXqos@ffaf0080syscon KYQYinterrupt-controller@ffc01000 arm,gic-400 / D  @ `   KQefuse@ffb40000rockchip,rk3288-efuse 8q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrlAYdefaultsleeptu2tvgpio0@ff750000rockchip,gpio-banku Q8@ U e / DK/Q/gpio1@ff780000rockchip,gpio-bankx R8A U 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qxxxxsdio1-cd qxsdio1-wp qxsdio1-bkpwr qxsdio1-int qxsdio1-cmd qxsdio1-clk qwsdio1-pwr q xemmcemmc-clk qzKQemmc-cmd qzKQemmc-pwr q xemmc-bus1 qxemmc-bus4@ qxxxxemmc-bus8 qzzzzzzzzKQemmc-reset q wKQspi0spi0-clk q xKQspi0-cs0 q xK"Q"spi0-tx qxK Q spi0-rx qxK!Q!spi0-cs1 qxspi1spi1-clk q xK$Q$spi1-cs0 q xK'Q'spi1-rx qxK&Q&spi1-tx qxK%Q%spi2spi2-cs1 qxspi2-clk qxK(Q(spi2-cs0 qxK+Q+spi2-rx qxK*Q*spi2-tx q xK)Q)uart0uart0-xfer qxwK4Q4uart0-cts qxK5Q5uart0-rts qwK6Q6uart1uart1-xfer qx wK7Q7uart1-cts q xuart1-rts q wuart2uart2-xfer qxwK8Q8uart3uart3-xfer qxwK9Q9uart3-cts q xuart3-rts q wuart4uart4-xfer q x wK:Q:uart4-cts qxuart4-rts qwtsadcotp-gpio q wK?Q?otp-out q wK@Q@pwm0pwm0-pin qwKKQKpwm1pwm1-pin qwKLQLpwm2pwm2-pin qwKMQMpwm3pwm3-pin qwKNQNgmacrgmii-pins qwwww{{{{www {{wwrmii-pins qwwwwwwwwwwspdifspdif-tx q wK`Q`pcfg-pull-none-drv-8ma  KzQzpcfg-pull-up-drv-8ma  pcfg-output-high K}Q}pcfg-output-low K|Q|buttonspwr-key-l qxK~Q~ap-lid-int-l qxKQpmicpmic-int-l qxKFQFdvs-1 q ydvs-2 qyrebootap-warm-reset-h q wKQrecovery-switchrec-mode-l q xtpmtpm-int-h qwwrite-protectfw-wp-ap qwcodechp-det qxKQint-codec qyKJQJmic-det q xKQheadsetts3a227e-int-l qxK0Q0backlightbl-en qwKQbl_pwr_en q wKQchargerac-present-ap qxKQcros-ecec-int qwK#Q#suspendsuspend-l-wake q|KuQususpend-l-sleep q}KvQvtrackpadtrackpad-int qxK1Q1usb-hosthost1-pwr-en q wKQusbotg-pwren-h q wKQbuck-5vdrv-5v qwKQlcdlcd-en qwKQavdd-1v8-disp-en q wKQmemory@0memorygpio-keys gpio-keysdefault~power Power N/ t dlid Lid N/   gpio-restart gpio-restart N/ default emmc-pwrseqmmc-pwrseq-emmcdefault KQsdio-pwrseqmmc-pwrseq-simple8 ext_clockdefault KQvcc-5vregulator-fixedvcc_5v LK@8LK@  " 5 defaultKGQGvcc33-sysregulator-fixed vcc33_sys 2Z82Z KQvcc50-hdmiregulator-fixed vcc50_hdmi G " 5defaultsound!rockchip,rockchip-audio-max98090default :VEYRON-I2S I a vI I  backlightpwm-backlight   !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~   default B@ ' KQgpio-charger gpio-charger $mains N/defaultpanelinnolux,n116bgesimple-panelokay  1portsportendpointKpQpvccsysregulator-fixedvccsysKQvcc5-host1-regulatorregulator-fixed " 5/ default vcc5_host1vcc5v-otg-regulatorregulator-fixed " 5/ default vcc5_host2panel-regulatorregulator-fixed " 5 defaultpanel_regulator ; KQvcc18-lcdregulator-fixed " 5 default vcc18_lcd backlight-regulatorregulator-fixed " 5 defaultbacklight_regulator  ;:KQ #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2i2c20interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasenum-slotssd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplydisable-wppinctrl-namespinctrl-0cap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablemmc-hs200-1_8v#io-channel-cellsreset-namesdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedti,micbiasvcc-supplywakeup-sourcereg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplyvcc9-supplyvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cells#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supplysdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsforce-hpdddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervallinux,input-typepriorityreset-gpiosvin-supplyenable-active-highgpiorockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecbrightness-levelsdefault-brightness-levelenable-gpiosbacklight-boot-offpwmspwm-delay-uspower-supplycharger-typebacklightstartup-delay-us