n8L( "Kgoogle,veyron-brain-rev0google,veyron-braingoogle,veyronrockchip,rk3288& 7Google Brainaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12hw@\@p@ @@OOa sB@ ~ ' 9 K 0 $@29EKcpu@501cpuarm,cortex-a12EKcpu@502cpuarm,cortex-a12EKcpu@503cpuarm,cortex-a12EKamba simple-busSdma-controller@ff250000arm,pl330arm,primecell%@Ze2 apb_pclkEKdma-controller@ff600000arm,pl330arm,primecell`@Ze2 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@Ze2 apb_pclkESKSreserved-memorySdma-unusable@fe000000oscillator fixed-clockn6xin24mE K timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvbiuciuciu-driveciu-sample  @ disableddwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswbiuciuciu-driveciu-sample ! @okay!.D O]gdefault u dwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guybiuciuciu-driveciu-sample #@okayDO]gdefault usaradc@ff100000rockchip,saradc $2I[saradcapb_pclkW )saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARspiclkapb_pclk5  :txrx ,gdefaultu disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSspiclkapb_pclk5 :txrx -gdefaultu disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTspiclkapb_pclk5:txrx .gdefaultu !"okayD flash@0jedec,spi-norWi2c@ff140000rockchip,rk3288-i2c >i2c2Mgdefaultu#okayi2dtpm@20infineon,slb9645tt i2c@ff150000rockchip,rk3288-i2c ?i2c2Ogdefaultu$ disabledi2c@ff160000rockchip,rk3288-i2c @i2c2Pgdefaultu%okayi2,i2c@ff170000rockchip,rk3288-i2c Ai2c2Qgdefaultu&okayi,EdKdserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 72MUbaudclkapb_pclkgdefault u'()okayMlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 82NVbaudclkapb_pclkgdefaultu*okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 92OWbaudclkapb_pclkgdefaultu+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :2PXbaudclkapb_pclkgdefaultu, disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;2QYbaudclkapb_pclkgdefaultu- disabledthermal-zonesreserve_thermal.cpu_thermald.tripscpu_alert0 p,passiveE/K/cpu_alert1 $,passiveE0K0cpu_crit _, criticalcooling-mapsmap07/ <map170 <gpu_thermald.tripsgpu_alert0 p,passiveE1K1gpu_crit _, criticalcooling-mapsmap071 <tsadc@ff280000rockchip,rk3288-tsadc( %2HZtsadcapb_pclk )tsadc-apbginitdefaultsleepu2K3U2_usokayE.K.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq482fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB )stmmaceth disabledusb@ff500000 generic-ehciP 2usbhost5usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2otghost6 usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2otghost)@@ 7 usb2-phyokayz87usb@ff5c0000 generic-ehci\ 2usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c2Lgdefaultu8okayi2dpmic@1brockchip,rk808xin32kwifibt_32kin&9gdefault u:;<Op~=> >EqKqregulatorsDCDC_REG1vdd_arm  q7 OqEKregulator-state-memdDCDC_REG2vdd_gpu  57Oqregulator-state-mem}B@DCDC_REG3 vcc135_ddr regulator-state-mem}DCDC_REG4vcc_18 w@7w@EKregulator-state-mem}w@LDO_REG3vdd_10 B@7B@regulator-state-mem}B@LDO_REG7 vdd10_lcd B@7B@regulator-state-memdSWITCH_REG1 vcc33_lcd ERKRregulator-state-memdSWITCH_REG2  vcc18_hdmii2c@ff660000rockchip,rk3288-i2cf =i2c2Ngdefaultu?okayi2 pwm@ff680000rockchip,rk3288-pwmhgdefaultu@2^pwm disabledpwm@ff680010rockchip,rk3288-pwmhgdefaultuA2^pwmokaypwm@ff680020rockchip,rk3288-pwmh gdefaultuB2^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0gdefaultuC2^pwm disabledbus_intmem@ff700000 mmio-sramp Spsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEKpower-controller!rockchip,rk3288-power-controllerh8 EVKVpd_vio@9 2chgfdehilkj$DEFGHIJKLpd_hevc@11 2opMNpd_video@12 2Opd_gpu@13 2PQreboot-modesyscon-reboot-modeRB RBRB 'RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv43Hjk$#gׄeрxhрxhEKsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwE4K4edp-phyrockchip,rk3288-dp-phy2h24m@ disabledEaKaio-domains"rockchip,rk3288-io-voltage-domainokayK=U`n=~=Rusbphyrockchip,rk3288-usb-phyokayusb-phy@320@ 2]phyclkE7K7usb-phy@334@42^phyclkE5K5usb-phy@348@H2_phyclkE6K6watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk2T5S:tx 6gdefaultuT4 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 55SS:txrxi2s_hclki2s_clk2RgdefaultuU disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}aclkhclksclkapb_pclk )crypto-rstokayvop@ff930000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopV def )axiahbdclkWokayportE K endpoint@0XEeKeendpoint@1YEbKbendpoint@2ZE_K_iommu@ff930300rockchip,iommu  vopb_mmuV okayEWKWvop@ff940000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopV  )axiahbdclk[ disabledportE K endpoint@0\EfKfendpoint@1]EcKcendpoint@2^E`K`iommu@ff940300rockchip,iommu  vopl_mmuV  disabledE[K[mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 2~d refpclkV 4 disabledportsportendpoint@0_EZKZendpoint@1`E^K^dp@ff970000rockchip,rk3288-dp@ b2icdppclkadpo)dp4 disabledportsport@0endpoint@0bEYKYendpoint@1cE]K]hdmi@ff980000rockchip,rk3288-dw-hdmi4 g2hm iahbisfrV okaydportsportendpoint@0eEXKXendpoint@1fE\K\qos@ffaa0000syscon EPKPqos@ffaa0080syscon EQKQqos@ffad0000syscon EEKEqos@ffad0100syscon EFKFqos@ffad0180syscon EGKGqos@ffad0400syscon EHKHqos@ffad0480syscon EIKIqos@ffad0500syscon EDKDqos@ffad0800syscon EJKJqos@ffad0880syscon EKKKqos@ffad0900syscon ELKLqos@ffae0000syscon EOKOqos@ffaf0000syscon EMKMqos@ffaf0080syscon ENKNinterrupt-controller@ffc01000 arm,gic-400(=  @ `   EKefuse@ffb40000rockchip,rk3288-efuse 2q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl4SgdefaultsleepugKggpio0@ff750000rockchip,gpio-banku Q2@N^(=E9K9gpio1@ff780000rockchip,gpio-bankx R2AN^(=gpio2@ff790000rockchip,gpio-banky S2BN^(=EpKpgpio3@ff7a0000rockchip,gpio-bankz T2CN^(=gpio4@ff7b0000rockchip,gpio-bank{ U2DN^(=EtKtgpio5@ff7c0000rockchip,gpio-bank| V2EN^(=gpio6@ff7d0000rockchip,gpio-bank} W2FN^(=gpio7@ff7e0000rockchip,gpio-bank~ X2GN^(=E>K>gpio8@ff7f0000rockchip,gpio-bank Y2HN^(=hdmihdmi-ddc jhhvcc50-hdmi-enjhEvKvpcfg-pull-upxEiKipcfg-pull-downEjKjpcfg-pull-noneEhKhpcfg-pull-none-12ma ElKlsleepglobal-pwroffjhEgKgddrio-pwroffjhddr0-retentionjiddr1-retentionjiedpedp-hpdj ji2c0i2c0-xfer jhhE8K8i2c1i2c1-xfer jhhE#K#i2c2i2c2-xfer j h hE?K?i2c3i2c3-xfer jhhE$K$i2c4i2c4-xfer jhhE%K%i2c5i2c5-xfer jhhE&K&i2s0i2s0-bus`jhhhhhhEUKUsdmmcsdmmc-clkjhsdmmc-cmdjisdmmc-cdjisdmmc-bus1jisdmmc-bus4@jiiiisdio0sdio0-bus1jisdio0-bus4@jkkkkEKsdio0-cmdjkEKsdio0-clkjkE K sdio0-cdjisdio0-wpjisdio0-pwrjisdio0-bkpwrjisdio0-intjiwifienable-hjhEsKsbt-enable-ljhErKrsdio1sdio1-bus1jisdio1-bus4@jiiiisdio1-cdjisdio1-wpjisdio1-bkpwrjisdio1-intjisdio1-cmdjisdio1-clkjhsdio1-pwrj iemmcemmc-clkjkEKemmc-cmdjkEKemmc-pwrj iemmc-bus1jiemmc-bus4@jiiiiemmc-bus8jkkkkkkkkEKemmc-resetj hEoKospi0spi0-clkj iEKspi0-cs0j iEKspi0-txjiEKspi0-rxjiEKspi0-cs1jispi1spi1-clkj iEKspi1-cs0j iEKspi1-rxjiEKspi1-txjiEKspi2spi2-cs1jispi2-clkjiEKspi2-cs0jiE"K"spi2-rxjiE!K!spi2-txj iE K uart0uart0-xfer jihE'K'uart0-ctsjiE(K(uart0-rtsjhE)K)uart1uart1-xfer ji hE*K*uart1-ctsj iuart1-rtsj huart2uart2-xfer jihE+K+uart3uart3-xfer jihE,K,uart3-ctsj iuart3-rtsj huart4uart4-xfer j i hE-K-uart4-ctsjiuart4-rtsjhtsadcotp-gpioj hE2K2otp-outj hE3K3pwm0pwm0-pinjhE@K@pwm1pwm1-pinjhEAKApwm2pwm2-pinjhEBKBpwm3pwm3-pinjhECKCgmacrgmii-pinsjhhhhllllhhh llhhrmii-pinsjhhhhhhhhhhspdifspdif-txj hETKTpcfg-pull-none-drv-8maEkKkpcfg-pull-up-drv-8maxpcfg-output-highpcfg-output-lowbuttonspwr-key-ljiEmKmpmicpmic-int-ljiE:K:dvs-1j jE;K;dvs-2jjE<K<rebootap-warm-reset-hj hEnKnrecovery-switchrec-mode-lj itpmtpm-int-hjhwrite-protectfw-wp-apjhusb-hostusb2-pwr-enj hEwKwmemory@0memorygpio-keys gpio-keysgdefaultumpowerPower 9tdpgpio-restart gpio-restart 9 gdefaultunemmc-pwrseqmmc-pwrseq-emmcuogdefault p EKsdio-pwrseqmmc-pwrseq-simple2q ext_clockgdefaulturs tE K vcc-5vregulator-fixedvcc_5v LK@7LK@EuKuvcc33-sysregulator-fixed vcc33_sys 2Z72ZuEKvcc50-hdmiregulator-fixed vcc50_hdmi u  >gdefaultuvvcc33_ioregulator-fixed vcc33_io E=K=vcc5-host2-regulatorregulator-fixed  9 gdefaultuw vcc5_host2  #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablenum-slotspinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplycap-mmc-highspeedrockchip,default-sample-phasedisable-wpmmc-hs200-1_8v#io-channel-cellsreset-namesdmasdma-namesrx-sample-delay-nsspi-max-frequencyi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedreg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clock-parentsrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplydvs-gpiosregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltregulator-suspend-mem-disabled#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cells#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplyenable-active-highgpio