Ð þíQ@8K´(ŒK|,radxa,rockrockchip,rk3188 7Radxa Rockaliases=/ethernet@10204000G/i2c@2002d000L/i2c@2002f000Q/i2c@20056000V/i2c@2005a000[/i2c@2005e000`/dwmmc@1021c000f/dwmmc@10214000l/dwmmc@10218000r/serial@10124000z/serial@10126000‚/serial@20064000Š/serial@20068000’/spi@20070000—/spi@20074000amba ,simple-busœdma-controller@20018000,arm,pl330arm,primecell£ €@§²½ØÀ ßapb_pclkë/ñ/dma-controller@2001c000,arm,pl330arm,primecell£ À@§²½ØÀ ßapb_pclk ùdisableddma-controller@20078000,arm,pl330arm,primecell£ €@§²½ØÁ ßapb_pclkë#ñ#oscillator ,fixed-clockn6xin24ml2-cache-controller@10138000,arm,pl310-cache£€0>ë,ñ,scu@1013c000,arm,cortex-a9-scu£Àglobal-timer@1013c200,arm,cortex-a9-global-timer£  § Ølocal-timer@1013c600,arm,cortex-a9-twd-timer£Æ  § Øinterrupt-controller@1013d000,arm,cortex-a9-gicJ_£ÐÁëñserial@10124000&,rockchip,rk3188-uartsnps,dw-apb-uart£@ §"pzßbaudclkapb_pclkØ@Lùokay‡default•serial@10126000&,rockchip,rk3188-uartsnps,dw-apb-uart£` §#pzßbaudclkapb_pclkØAMùokay‡default•usb@10180000,rockchip,rk3066-usbsnps,dwc2£ §ØÃßotgŸotg§¹È€€@@ × Üusb2-phyùokayusb@101c0000 ,snps,dwc2£ §ØÉßotgŸhost× Üusb2-phyùokayethernet@10204000,rockchip,rk3188-emac£ @< §æØÄD ßhclkmacrefódýrmiiùokay‡default •   ethernet-phy@0£ §ë ñ dwmmc@10214000,rockchip,rk2928-dw-mshc£!@ §ØÀHßbiuciuùokay ‡default•*6@Rcdwmmc@10218000,rockchip,rk2928-dw-mshc£!€ §ØÁIßbiuciu ùdisableddwmmc@1021c000,rockchip,rk2928-dw-mshc£!À §ØÂJßbiuciu ùdisabledpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfd£ @ë1ñ1reboot-mode,syscon-reboot-moden@uRBÃRBÃRBà ŸRBÃgrf@20008000,syscon£ €ëñi2c@2002d000,rockchip,rk3188-i2c£ Ð §(æßi2cØP ùdisabled‡default•i2c@2002f000,rockchip,rk3188-i2c£ ð §)æØQßi2cùokay‡default•€rtc@51,haoyu,hym8563£Q§ ‡default•xin32kact8846@5a,active-semi,act8846£Zùokay«‡default•ÃÎÙäïûregulatorsREG1VCC_DDR"O€:O€RREG2VDD_LOG"B@:B@RREG3VDD_ARM" Yø:™pRë-ñ-REG4VCC_IO"2Z :2Z RëñREG5VDD_10"B@:B@RREG6 VDD_HDMI"&% :&% RREG7VCC_18"w@:w@RREG8VCCA_33"2Z :2Z RREG9 VCC_RMII"2Z :2Z ë ñ REG10 VCCIO_WL"2Z :2Z RREG11 VCC18_IO"w@:w@RREG12VCC_28"*¹€:*¹€Rpwm@20030000,rockchip,rk2928-pwm£ fØF ùdisabled‡default•pwm@20030010,rockchip,rk2928-pwm£ fØFùokay‡default•watchdog@2004c000 ,rockchip,rk3188-wdtsnps,dw-wdt£ ÀØK §3ùokaypwm@20050020,rockchip,rk2928-pwm£  fØGùokay‡default•pwm@20050030,rockchip,rk2928-pwm£ 0fØGùokay‡default•i2c@20056000,rockchip,rk3188-i2c£ ` §*æØRßi2c ùdisabled‡default•i2c@2005a000,rockchip,rk3188-i2c£   §+æØSßi2c ùdisabled‡default•i2c@2005e000,rockchip,rk3188-i2c£ à §4æØTßi2c ùdisabled‡default• serial@20064000&,rockchip,rk3188-uartsnps,dw-apb-uart£ @ §$pzßbaudclkapb_pclkØBNùokay‡default•!serial@20068000&,rockchip,rk3188-uartsnps,dw-apb-uart£ € §%pzßbaudclkapb_pclkØCOùokay‡default•"saradc@2006c000,rockchip,saradc£ À §qØGJßsaradcapb_pclkƒW Šsaradc-apb ùdisabledspi@20070000(,rockchip,rk3188-spirockchip,rk3066-spiØEHßspiclkapb_pclk §&£ –# # ›txrx ùdisabled‡default•$%&'spi@20074000(,rockchip,rk3188-spirockchip,rk3066-spiØFIßspiclkapb_pclk §'£ @–# # ›txrx ùdisabled‡default•()*+cpus¥rockchip,rk3066-smpcpu@0³cpu,arm,cortex-a9¿,£@Љ@™p›@ÐO€Œ0a€g8 s€à˜ 'À~ð°ÀHÂÀ Yøáœ@Øï-cpu@1³cpu,arm,cortex-a9¿,£cpu@2³cpu,arm,cortex-a9¿,£cpu@3³cpu,arm,cortex-a9¿,£sram@10080000 ,mmio-sram£€ œ€smp-sram@0,rockchip,rk3066-smp-sram£Pi2s@1011a000(,rockchip,rk3188-i2srockchip,rk3066-i2s£   § ‡default•.–//›txrxßi2s_hclki2s_clkØÆKû ùdisabledsound@1011e000,,rockchip,rk3188-spdifrockchip,rk3066-spdif£à 0 ßhclkmclkØÅN–/›tx § ‡default•0ùokayë5ñ5clock-controller@20000000,rockchip,rk3188-cru£ æAëñefuse@20010000,rockchip,rk3188-efuse£ @Ø[ ßpclk_efusecpu_leakage@17£phy0,rockchip,rk3188-usb-phyrockchip,rk3288-usb-phyæùokayusb-phy@10cN£ ØQßphyclkëñusb-phy@11cN£ØRßphyclkëñpinctrl,rockchip,rk3188-pinctrlæY1œgpio0@2000a000,rockchip,rk3188-gpio-bank0£   §6ØUfvJ_ëñgpio1@2003c000,rockchip,gpio-bank£ À §7ØVfvJ_gpio2@2003e000,rockchip,gpio-bank£ à §8ØWfvJ_ë8ñ8gpio3@20080000,rockchip,gpio-bank£  §9ØXfvJ_ë ñ pcfg_pull_up‚ë3ñ3pcfg_pull_downpcfg_pull_nonežë2ñ2emmcemmc-clk«2emmc-cmd«3emmc-rst«2emacemac-xfer€«22222222ëñemac-mdio «22ë ñ i2c0i2c0-xfer «22ëñi2c1i2c1-xfer «22ëñi2c2i2c2-xfer «22ëñi2c3i2c3-xfer «22ëñi2c4i2c4-xfer «22ë ñ pwm0pwm0-out«2ëñpwm1pwm1-out«2ëñpwm2pwm2-out«2ëñpwm3pwm3-out«2ëñspi0spi0-clk«3ë$ñ$spi0-cs0«3ë'ñ'spi0-tx«3ë%ñ%spi0-rx«3ë&ñ&spi0-cs1«3spi1spi1-clk«3ë(ñ(spi1-cs0«3ë+ñ+spi1-rx«3ë*ñ*spi1-tx«3ë)ñ)spi1-cs1«3uart0uart0-xfer «32ëñuart0-cts«2uart0-rts«2uart1uart1-xfer «32ëñuart1-cts«2uart1-rts«2uart2uart2-xfer «3 2ë!ñ!uart3uart3-xfer « 3 2ë"ñ"uart3-cts« 2uart3-rts« 2sd0sd0-clk«2ëñsd0-cmd«2ëñsd0-cd«2ëñsd0-wp« 2sd0-pwr«2sd0-bus-width1«2sd0-bus-width4@«2222ëñsd1sd1-clk«2sd1-cmd«2sd1-cd«2sd1-wp«2sd1-bus-width1«2sd1-bus-width4@«2222i2s0i2s0-bus`«222222ë.ñ.spdifspdif-tx«2ë0ñ0pcfg-output-low¹ë4ñ4act8846act8846-dvs0-ctl«4ëñhym8563rtc-int«3ëñlan8720aphy-int«3ë ñ ir-receiverir-recv-pin« 2ë7ñ7usbhost-vbus-drv«2ë:ñ:otg-vbus-drv«2ë9ñ9memory@60000000³memory£`€gpio-keys ,gpio-keysÄpower ÏÕtàGPIO Key Poweræ÷dgpio-leds ,gpio-ledsgreenàrock:green:user1 Ï offblueàrock:blue:user2 Ïoffsleepàrock:red:power Ïoffsound,simple-audio-card%SPDIFsimple-audio-card,dai-link@1cpu<5codec<6spdif-out,linux,spdif-dit0ë6ñ6gpio-ir-receiver,gpio-ir-receiver Ï ‡default•7usb-otg-regulator,regulator-fixedF Y8‡default•9 otg-vbus"LK@:LK@R^sdmmc-regulator,regulator-fixed sdmmc-supply"2Z :2Z  Y p† ëñusb-host-regulator,regulator-fixedF Y‡default•: host-pwr"LK@:LK@R^vsys-regulator,regulator-fixedvsys"LK@:LK@^ëñ #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0i2c0i2c1i2c2i2c3i2c4mshc0mshc1mshc2serial0serial1serial2serial3spi0spi1rangesreginterrupts#dma-cellsarm,pl330-broken-no-flushpclocksclock-nameslinux,phandlestatusclock-frequency#clock-cellsclock-output-namescache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthpinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfmax-speedphy-modephyphy-supplyfifo-depthnum-slotsvmmc-supplybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpoffsetmode-normalmode-recoverymode-bootloadermode-loadersystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-on#pwm-cells#io-channel-cellsresetsreset-namesdmasdma-namesenable-methoddevice_typenext-level-cacheoperating-pointsclock-latencycpu0-supplyrockchip,playback-channelsrockchip,capture-channels#sound-dai-cells#reset-cells#phy-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disablerockchip,pinsoutput-lowautorepeatgpioslinux,codelabellinux,input-typewakeup-sourcedebounce-intervaldefault-statesimple-audio-card,namesound-daienable-active-highgpioregulator-boot-onstartup-delay-usvin-supply