8(`Iheadacoustics,omap3-ha-lcdtechnexion,omap3-tao3530ti,omap34xxti,omap3 +77TI OMAP3 HEAD acoustics LCD-baseboard with TAO3530 SOMchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000 d/displaycpus+cpu@0arm,cortex-a8mcpuy}cpu(HАg8 Odp` 'ppmu@54000000arm,cortex-a8-pmuyTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busyh +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-busy + pinmux@30 ti,omap3-padconfpinctrl-singley08+ *Gdefault U pinmux_hsusbb2_pins`_          sypinmux_mmc1_pinsP_ "$&sypinmux_mmc2_pins0_(*,.02sypinmux_wlan_gpio_^pinmux_uart3_pins_nApsypinmux_i2c3_pins_sypinmux_mcspi1_pins _sypinmux_mcspi3_pins _sypinmux_mcbsp3_pins _<>@Bsypinmux_twl4030_pins_Asypinmux_sound2_pins_npinmux_led_blue_pins_sypinmux_led_green_pins_s y pinmux_led_red_pins_s y pinmux_poweroff_pins_s y pinmux_powerdown_input_pins_syfpga_boot0_pins _syfpga_boot1_pins _rtvxsypinmux_touchscreen_irq_pins_4pinmux_touchscreen_wake_pins_s y pinmux_dss_dpi_pins_sypinmux_lte430_pins_8sypinmux_backlight_pins_:syscm_conf@270sysconsimple-busyp0+ p0s y pbias_regulator@2b0ti,pbias-omap3ti,pbias-omapy pbias_mmc_omap2430pbias_mmc_omap2430w@-syclocks+mcbsp5_mux_fck@68ti,composite-mux-clock} yhsymcbsp5_fckti,composite-clock}symcbsp1_mux_fck@4ti,composite-mux-clock} ysymcbsp1_fckti,composite-clock}symcbsp2_mux_fck@4ti,composite-mux-clock}ysymcbsp2_fckti,composite-clock}symcbsp3_mux_fck@68ti,composite-mux-clock}yhsymcbsp3_fckti,composite-clock}symcbsp4_mux_fck@68ti,composite-mux-clock}yhsymcbsp4_fckti,composite-clock}syclockdomainspinmux@a00 ti,omap3-padconfpinctrl-singley \+ *pinmux_twl4030_vpins _syaes@480c5000 ti,omap3-aesaesyH PPABtxrx disabledprm@48306000 ti,omap3-prmyH0`@ clocks+virt_16_8m_ck fixed-clockYs y osc_sys_ck@d40 ti,mux-clock} y @s!y!sys_ck@1270ti,divider-clock}!yps&y&sys_clkout1@d70ti,gate-clock}!y pdpll3_x2_ckfixed-factor-clock}")4dpll3_m2x2_ckfixed-factor-clock}#)4s%y%dpll4_x2_ckfixed-factor-clock}$)4corex2_fckfixed-factor-clock}%)4s'y'wkup_l4_ickfixed-factor-clock}&)4sVyVcorex2_d3_fckfixed-factor-clock}')4sycorex2_d5_fckfixed-factor-clock}')4syclockdomainscm@48004000 ti,omap3-cmyH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clocksHyHvirt_12m_ck fixed-clocksyvirt_13m_ck fixed-clock]@syvirt_19200000_ck fixed-clock$syvirt_26000000_ck fixed-clocksyvirt_38_4m_ck fixed-clockIsydpll4_ck@d00ti,omap3-dpll-per-clock}&&y D 0s$y$dpll4_m2_ck@d48ti,divider-clock}$?y Hs(y(dpll4_m2x2_mul_ckfixed-factor-clock}()4s)y)dpll4_m2x2_ck@d00ti,gate-clock})y >s*y*omap_96m_alwon_fckfixed-factor-clock}*)4s1y1dpll3_ck@d00ti,omap3-dpll-core-clock}&&y @ 0s"y"dpll3_m3_ck@1140ti,divider-clock}"y@s+y+dpll3_m3x2_mul_ckfixed-factor-clock}+)4s,y,dpll3_m3x2_ck@d00ti,gate-clock}, y >s-y-emu_core_alwon_ckfixed-factor-clock}-)4sjyjsys_altclk fixed-clocks6y6mcbsp_clks fixed-clocksydpll3_m2_ck@d40ti,divider-clock}"y @s#y#core_ckfixed-factor-clock}#)4s.y.dpll1_fck@940ti,divider-clock}.y @s/y/dpll1_ck@904ti,omap3-dpll-clock}&/y  $ @ 4sydpll1_x2_ckfixed-factor-clock})4s0y0dpll1_x2m2_ck@944ti,divider-clock}0y DsDyDcm_96m_fckfixed-factor-clock}1)4s2y2omap_96m_fck@d40 ti,mux-clock}2&y @sMyMdpll4_m3_ck@e40ti,divider-clock}$ y@s3y3dpll4_m3x2_mul_ckfixed-factor-clock}3)4s4y4dpll4_m3x2_ck@d00ti,gate-clock}4y >s5y5omap_54m_fck@d40 ti,mux-clock}56y @s@y@cm_96m_d2_fckfixed-factor-clock}2)4s7y7omap_48m_fck@d40 ti,mux-clock}76y @s8y8omap_12m_fckfixed-factor-clock}8)4sOyOdpll4_m4_ck@e40ti,divider-clock}$ y@s9y9dpll4_m4x2_mul_ckti,fixed-factor-clock}9Tbos:y:dpll4_m4x2_ck@d00ti,gate-clock}:y >osydpll4_m5_ck@f40ti,divider-clock}$?y@s;y;dpll4_m5x2_mul_ckti,fixed-factor-clock};Tbos<y<dpll4_m5x2_ck@d00ti,gate-clock}<y >osryrdpll4_m6_ck@1140ti,divider-clock}$?y@s=y=dpll4_m6x2_mul_ckfixed-factor-clock}=)4s>y>dpll4_m6x2_ck@d00ti,gate-clock}>y >s?y?emu_per_alwon_ckfixed-factor-clock}?)4skykclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock}.y psAyAclkout2_src_mux_ck@d70ti,composite-mux-clock}.&2@y psByBclkout2_src_ckti,composite-clock}ABsCyCsys_clkout2@d70ti,divider-clock}C@y pmpu_ckfixed-factor-clock}D)4sEyEarm_fck@924ti,divider-clock}Ey $emu_mpu_alwon_ckfixed-factor-clock}E)4slyll3_ick@a40ti,divider-clock}.y @sFyFl4_ick@a40ti,divider-clock}Fy @sGyGrm_ick@c40ti,divider-clock}Gy @gpt10_gate_fck@a00ti,composite-gate-clock}& y sIyIgpt10_mux_fck@a40ti,composite-mux-clock}H&y @sJyJgpt10_fckti,composite-clock}IJgpt11_gate_fck@a00ti,composite-gate-clock}& y sKyKgpt11_mux_fck@a40ti,composite-mux-clock}H&y @sLyLgpt11_fckti,composite-clock}KLcore_96m_fckfixed-factor-clock}M)4s y mmchs2_fck@a00ti,wait-gate-clock} y symmchs1_fck@a00ti,wait-gate-clock} y syi2c3_fck@a00ti,wait-gate-clock} y syi2c2_fck@a00ti,wait-gate-clock} y syi2c1_fck@a00ti,wait-gate-clock} y symcbsp5_gate_fck@a00ti,composite-gate-clock} y symcbsp1_gate_fck@a00ti,composite-gate-clock} y sycore_48m_fckfixed-factor-clock}8)4sNyNmcspi4_fck@a00ti,wait-gate-clock}Ny symcspi3_fck@a00ti,wait-gate-clock}Ny symcspi2_fck@a00ti,wait-gate-clock}Ny symcspi1_fck@a00ti,wait-gate-clock}Ny syuart2_fck@a00ti,wait-gate-clock}Ny syuart1_fck@a00ti,wait-gate-clock}Ny  sycore_12m_fckfixed-factor-clock}O)4sPyPhdq_fck@a00ti,wait-gate-clock}Py sycore_l3_ickfixed-factor-clock}F)4sQyQsdrc_ick@a10ti,wait-gate-clock}Qy sygpmc_fckfixed-factor-clock}Q)4core_l4_ickfixed-factor-clock}G)4sRyRmmchs2_ick@a10ti,omap3-interface-clock}Ry symmchs1_ick@a10ti,omap3-interface-clock}Ry syhdq_ick@a10ti,omap3-interface-clock}Ry symcspi4_ick@a10ti,omap3-interface-clock}Ry symcspi3_ick@a10ti,omap3-interface-clock}Ry symcspi2_ick@a10ti,omap3-interface-clock}Ry symcspi1_ick@a10ti,omap3-interface-clock}Ry syi2c3_ick@a10ti,omap3-interface-clock}Ry syi2c2_ick@a10ti,omap3-interface-clock}Ry syi2c1_ick@a10ti,omap3-interface-clock}Ry syuart2_ick@a10ti,omap3-interface-clock}Ry syuart1_ick@a10ti,omap3-interface-clock}Ry  sygpt11_ick@a10ti,omap3-interface-clock}Ry  sygpt10_ick@a10ti,omap3-interface-clock}Ry  symcbsp5_ick@a10ti,omap3-interface-clock}Ry  symcbsp1_ick@a10ti,omap3-interface-clock}Ry  syomapctrl_ick@a10ti,omap3-interface-clock}Ry sydss_tv_fck@e00ti,gate-clock}@ysydss_96m_fck@e00ti,gate-clock}Mysydss2_alwon_fck@e00ti,gate-clock}&ysydummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock}&y sSySgpt1_mux_fck@c40ti,composite-mux-clock}H&y @sTyTgpt1_fckti,composite-clock}STaes2_ick@a10ti,omap3-interface-clock}Ry sywkup_32k_fckfixed-factor-clock}H)4sUyUgpio1_dbck@c00ti,gate-clock}Uy sysha12_ick@a10ti,omap3-interface-clock}Ry sywdt2_fck@c00ti,wait-gate-clock}Uy sywdt2_ick@c10ti,omap3-interface-clock}Vy sywdt1_ick@c10ti,omap3-interface-clock}Vy sygpio1_ick@c10ti,omap3-interface-clock}Vy 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sygpt7_ick@1010ti,omap3-interface-clock}iysygpt6_ick@1010ti,omap3-interface-clock}iysygpt5_ick@1010ti,omap3-interface-clock}iysygpt4_ick@1010ti,omap3-interface-clock}iysygpt3_ick@1010ti,omap3-interface-clock}iysygpt2_ick@1010ti,omap3-interface-clock}iysymcbsp2_ick@1010ti,omap3-interface-clock}iysymcbsp3_ick@1010ti,omap3-interface-clock}iysymcbsp4_ick@1010ti,omap3-interface-clock}iysymcbsp2_gate_fck@1000ti,composite-gate-clock}ysymcbsp3_gate_fck@1000ti,composite-gate-clock}ysymcbsp4_gate_fck@1000ti,composite-gate-clock}ysyemu_src_mux_ck@1140 ti,mux-clock}&jkly@smymemu_src_ckti,clkdm-gate-clock}msnynpclk_fck@1140ti,divider-clock}ny@pclkx2_fck@1140ti,divider-clock}ny@atclk_fck@1140ti,divider-clock}ny@traceclk_src_fck@1140 ti,mux-clock}&jkly@soyotraceclk_fck@1140ti,divider-clock}o y@secure_32k_fck fixed-clockspypgpt12_fckfixed-factor-clock}p)4wdt1_fckfixed-factor-clock}p)4security_l4_ick2fixed-factor-clock}G)4sqyqaes1_ick@a14ti,omap3-interface-clock}qy rng_ick@a14ti,omap3-interface-clock}qy sha11_ick@a14ti,omap3-interface-clock}qy des1_ick@a14ti,omap3-interface-clock}qy cam_mclk@f00ti,gate-clock}ryocam_ick@f10!ti,omap3-no-wait-interface-clock}Gysycsi2_96m_fck@f00ti,gate-clock} ysysecurity_l3_ickfixed-factor-clock}F)4ssyspka_ick@a14ti,omap3-interface-clock}sy icr_ick@a10ti,omap3-interface-clock}Ry des2_ick@a10ti,omap3-interface-clock}Ry mspro_ick@a10ti,omap3-interface-clock}Ry mailboxes_ick@a10ti,omap3-interface-clock}Ry ssi_l4_ickfixed-factor-clock}G)4szyzsr1_fck@c00ti,wait-gate-clock}&y sr2_fck@c00ti,wait-gate-clock}&y sr_l4_ickfixed-factor-clock}G)4dpll2_fck@40ti,divider-clock}.y@stytdpll2_ck@4ti,omap3-dpll-clock}&ty$@4suyudpll2_m2_ck@44ti,divider-clock}uyDsvyviva2_ck@0ti,wait-gate-clock}vysymodem_fck@a00ti,omap3-interface-clock}&y sysad2d_ick@a10ti,omap3-interface-clock}Fy symad2d_ick@a18ti,omap3-interface-clock}Fy symspro_fck@a00ti,wait-gate-clock} y ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock}'y swywssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock}'y @$sxyxssi_ssr_fck_3430es2ti,composite-clock}wxsyyyssi_sst_fck_3430es2fixed-factor-clock}y)4syhsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clock}Qy syssi_ick_3430es2@a10ti,omap3-ssi-interface-clock}zy syusim_gate_fck@c00ti,composite-gate-clock}M y sysys_d2_ckfixed-factor-clock}&)4s|y|omap_96m_d2_fckfixed-factor-clock}M)4s}y}omap_96m_d4_fckfixed-factor-clock}M)4s~y~omap_96m_d8_fckfixed-factor-clock}M)4syomap_96m_d10_fckfixed-factor-clock}M)4 sydpll5_m2_d4_ckfixed-factor-clock}{)4sydpll5_m2_d8_ckfixed-factor-clock}{)4sydpll5_m2_d16_ckfixed-factor-clock}{)4sydpll5_m2_d20_ckfixed-factor-clock}{)4syusim_mux_fck@c40ti,composite-mux-clock(}&|}~y @syusim_fckti,composite-clock}usim_ick@c10ti,omap3-interface-clock}Vy  sydpll5_ck@d04ti,omap3-dpll-clock}&&y  $ L 4sydpll5_m2_ck@d50ti,divider-clock}y Ps{y{sgx_gate_fck@b00ti,composite-gate-clock}.y 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[grsytwl4030-usbti,twl4030-usb sypwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadmadcti,twl4030-madci2c@48072000 ti,omap3-i2cyH 9txrx+i2c2 disabledi2c@48060000 ti,omap3-i2cyH=txrx+i2c3GdefaultUmailbox@48094000ti,omap3-mailboxmailboxyH @ dsp - 8spi@48098000ti,omap2-mcspiyH A+mcspi1C@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3GdefaultUspidev@0spidevQlycspi@4809a000ti,omap2-mcspiyH B+mcspi2C +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiyH [+mcspi3C tx0rx0tx1rx1GdefaultUspidev@0spidevQlycspi@480ba000ti,omap2-mcspiyH 0+mcspi4CFGtx0rx01w@480b2000 ti,omap3-1wyH :hdq1wmmc@4809c000ti,omap3-hsmmcyH Smmc1l=>txrxyGdefaultU mmc@480b4000ti,omap3-hsmmcyH @Vmmc2/0txrxGdefaultUmmc@480ad000ti,omap3-hsmmcyH ^mmc3MNtxrx disabledmmu@480bd400ti,omap2-iommuyH mmu_ispsymmu@5d000000ti,omap2-iommuy]mmu_iva disabledwdt@48314000 ti,omap3-wdtyH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspyH@mpu ;< commontxrx mcbsp1 txrx}fck disabledmcbsp@49022000ti,omap3-mcbspyI I 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compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2display0device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinslinux,phandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesstatusclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyregulator-always-onti,use-ledsti,pullupsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csspi-max-frequencyspi-cphati,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplycd-gpiosbus-widthnon-removablecap-power-off-card#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport2-modephysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,wr-access-nslabelmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowerremote-endpointdata-linesiommusti,phy-type#thermal-sensor-cellsgpiostartup-delay-usreset-gpiosvcc-supplyti,modelti,mcbspenable-active-lowenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activedefault-on