E8x( @ timll,omap3-devkit8000ti,omap3 +,7TimLL OMAP3 Devkit8000 with 7.0'' LCD panelchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000 d/display m/connector0 v/connector1cpus+cpu@0arm,cortex-a8cpucpu(HАg8 Odp` 'ppmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+0pinmux_twl4030_pinsMAagpinmux_dss_dpi_pinsMagscm_conf@270sysconsimple-busp0+ p0agpbias_regulator@2b0ti,pbias-omap3ti,pbias-omapopbias_mmc_omap2430vpbias_mmc_omap2430w@-agclocks+mcbsp5_mux_fck@68ti,composite-mux-clockhagmcbsp5_fckti,composite-clockagmcbsp1_mux_fck@4ti,composite-mux-clocka g mcbsp1_fckti,composite-clock agmcbsp2_mux_fck@4ti,composite-mux-clock a g mcbsp2_fckti,composite-clock agmcbsp3_mux_fck@68ti,composite-mux-clock hagmcbsp3_fckti,composite-clock agmcbsp4_mux_fck@68ti,composite-mux-clock hagmcbsp4_fckti,composite-clockagclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+0pinmux_twl4030_vpins Magaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYagosc_sys_ck@d40 ti,mux-clock @agsys_ck@1270ti,divider-clockpagsys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockdpll3_m2x2_ckfixed-factor-clockagdpll4_x2_ckfixed-factor-clockcorex2_fckfixed-factor-clockagwkup_l4_ickfixed-factor-clockaMgMcorex2_d3_fckfixed-factor-clockagcorex2_d5_fckfixed-factor-clockagclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clocka?g?virt_12m_ck fixed-clockagvirt_13m_ck fixed-clock]@agvirt_19200000_ck fixed-clock$agvirt_26000000_ck fixed-clockagvirt_38_4m_ck fixed-clockIagdpll4_ck@d00ti,omap3-dpll-per-clock D 0agdpll4_m2_ck@d48ti,divider-clock? Hagdpll4_m2x2_mul_ckfixed-factor-clocka g dpll4_m2x2_ck@d00ti,gate-clock  %a!g!omap_96m_alwon_fckfixed-factor-clock!a(g(dpll3_ck@d00ti,omap3-dpll-core-clock @ 0agdpll3_m3_ck@1140ti,divider-clock@a"g"dpll3_m3x2_mul_ckfixed-factor-clock"a#g#dpll3_m3x2_ck@d00ti,gate-clock#  %a$g$emu_core_alwon_ckfixed-factor-clock$aagasys_altclk fixed-clocka-g-mcbsp_clks fixed-clockagdpll3_m2_ck@d40ti,divider-clock @agcore_ckfixed-factor-clocka%g%dpll1_fck@940ti,divider-clock% @a&g&dpll1_ck@904ti,omap3-dpll-clock&  $ @ 4agdpll1_x2_ckfixed-factor-clocka'g'dpll1_x2m2_ck@944ti,divider-clock' Da;g;cm_96m_fckfixed-factor-clock(a)g)omap_96m_fck@d40 ti,mux-clock) @aDgDdpll4_m3_ck@e40ti,divider-clock @a*g*dpll4_m3x2_mul_ckfixed-factor-clock*a+g+dpll4_m3x2_ck@d00ti,gate-clock+ %a,g,omap_54m_fck@d40 ti,mux-clock,- @a7g7cm_96m_d2_fckfixed-factor-clock)a.g.omap_48m_fck@d40 ti,mux-clock.- @a/g/omap_12m_fckfixed-factor-clock/aFgFdpll4_m4_ck@e40ti,divider-clock @a0g0dpll4_m4x2_mul_ckti,fixed-factor-clock0;IVa1g1dpll4_m4x2_ck@d00ti,gate-clock1 %Vagdpll4_m5_ck@f40ti,divider-clock?@a2g2dpll4_m5x2_mul_ckti,fixed-factor-clock2;IVa3g3dpll4_m5x2_ck@d00ti,gate-clock3 %Vaigidpll4_m6_ck@1140ti,divider-clock?@a4g4dpll4_m6x2_mul_ckfixed-factor-clock4a5g5dpll4_m6x2_ck@d00ti,gate-clock5 %a6g6emu_per_alwon_ckfixed-factor-clock6abgbclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock% pa8g8clkout2_src_mux_ck@d70ti,composite-mux-clock%)7 pa9g9clkout2_src_ckti,composite-clock89a:g:sys_clkout2@d70ti,divider-clock:@ pimpu_ckfixed-factor-clock;a<g<arm_fck@924ti,divider-clock< $emu_mpu_alwon_ckfixed-factor-clock<acgcl3_ick@a40ti,divider-clock% @a=g=l4_ick@a40ti,divider-clock= @a>g>rm_ick@c40ti,divider-clock> @gpt10_gate_fck@a00ti,composite-gate-clock  a@g@gpt10_mux_fck@a40ti,composite-mux-clock? @aAgAgpt10_fckti,composite-clock@Agpt11_gate_fck@a00ti,composite-gate-clock  aBgBgpt11_mux_fck@a40ti,composite-mux-clock? @aCgCgpt11_fckti,composite-clockBCcore_96m_fckfixed-factor-clockDagmmchs2_fck@a00ti,wait-gate-clock agmmchs1_fck@a00ti,wait-gate-clock agi2c3_fck@a00ti,wait-gate-clock agi2c2_fck@a00ti,wait-gate-clock agi2c1_fck@a00ti,wait-gate-clock agmcbsp5_gate_fck@a00ti,composite-gate-clock  agmcbsp1_gate_fck@a00ti,composite-gate-clock  agcore_48m_fckfixed-factor-clock/aEgEmcspi4_fck@a00ti,wait-gate-clockE agmcspi3_fck@a00ti,wait-gate-clockE agmcspi2_fck@a00ti,wait-gate-clockE agmcspi1_fck@a00ti,wait-gate-clockE aguart2_fck@a00ti,wait-gate-clockE aguart1_fck@a00ti,wait-gate-clockE  agcore_12m_fckfixed-factor-clockFaGgGhdq_fck@a00ti,wait-gate-clockG agcore_l3_ickfixed-factor-clock=aHgHsdrc_ick@a10ti,wait-gate-clockH aggpmc_fckfixed-factor-clockHcore_l4_ickfixed-factor-clock>aIgImmchs2_ick@a10ti,omap3-interface-clockI agmmchs1_ick@a10ti,omap3-interface-clockI aghdq_ick@a10ti,omap3-interface-clockI agmcspi4_ick@a10ti,omap3-interface-clockI agmcspi3_ick@a10ti,omap3-interface-clockI agmcspi2_ick@a10ti,omap3-interface-clockI agmcspi1_ick@a10ti,omap3-interface-clockI agi2c3_ick@a10ti,omap3-interface-clockI agi2c2_ick@a10ti,omap3-interface-clockI agi2c1_ick@a10ti,omap3-interface-clockI aguart2_ick@a10ti,omap3-interface-clockI aguart1_ick@a10ti,omap3-interface-clockI  aggpt11_ick@a10ti,omap3-interface-clockI  aggpt10_ick@a10ti,omap3-interface-clockI  agmcbsp5_ick@a10ti,omap3-interface-clockI  agmcbsp1_ick@a10ti,omap3-interface-clockI  agomapctrl_ick@a10ti,omap3-interface-clockI agdss_tv_fck@e00ti,gate-clock7agdss_96m_fck@e00ti,gate-clockDagdss2_alwon_fck@e00ti,gate-clockagdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock aJgJgpt1_mux_fck@c40ti,composite-mux-clock? @aKgKgpt1_fckti,composite-clockJKaes2_ick@a10ti,omap3-interface-clockI agwkup_32k_fckfixed-factor-clock?aLgLgpio1_dbck@c00ti,gate-clockL agsha12_ick@a10ti,omap3-interface-clockI agwdt2_fck@c00ti,wait-gate-clockL agwdt2_ick@c10ti,omap3-interface-clockM agwdt1_ick@c10ti,omap3-interface-clockM aggpio1_ick@c10ti,omap3-interface-clockM agomap_32ksync_ick@c10ti,omap3-interface-clockM aggpt12_ick@c10ti,omap3-interface-clockM aggpt1_ick@c10ti,omap3-interface-clockM agper_96m_fckfixed-factor-clock(a g per_48m_fckfixed-factor-clock/aNgNuart3_fck@1000ti,wait-gate-clockN aggpt2_gate_fck@1000ti,composite-gate-clockaOgOgpt2_mux_fck@1040ti,composite-mux-clock?@aPgPgpt2_fckti,composite-clockOPgpt3_gate_fck@1000ti,composite-gate-clockaQgQgpt3_mux_fck@1040ti,composite-mux-clock?@aRgRgpt3_fckti,composite-clockQRgpt4_gate_fck@1000ti,composite-gate-clockaSgSgpt4_mux_fck@1040ti,composite-mux-clock?@aTgTgpt4_fckti,composite-clockSTgpt5_gate_fck@1000ti,composite-gate-clockaUgUgpt5_mux_fck@1040ti,composite-mux-clock?@aVgVgpt5_fckti,composite-clockUVgpt6_gate_fck@1000ti,composite-gate-clockaWgWgpt6_mux_fck@1040ti,composite-mux-clock?@aXgXgpt6_fckti,composite-clockWXgpt7_gate_fck@1000ti,composite-gate-clockaYgYgpt7_mux_fck@1040ti,composite-mux-clock?@aZgZgpt7_fckti,composite-clockYZgpt8_gate_fck@1000ti,composite-gate-clock a[g[gpt8_mux_fck@1040ti,composite-mux-clock?@a\g\gpt8_fckti,composite-clock[\gpt9_gate_fck@1000ti,composite-gate-clock a]g]gpt9_mux_fck@1040ti,composite-mux-clock?@a^g^gpt9_fckti,composite-clock]^per_32k_alwon_fckfixed-factor-clock?a_g_gpio6_dbck@1000ti,gate-clock_aggpio5_dbck@1000ti,gate-clock_aggpio4_dbck@1000ti,gate-clock_aggpio3_dbck@1000ti,gate-clock_aggpio2_dbck@1000ti,gate-clock_ agwdt3_fck@1000ti,wait-gate-clock_ agper_l4_ickfixed-factor-clock>a`g`gpio6_ick@1010ti,omap3-interface-clock`aggpio5_ick@1010ti,omap3-interface-clock`aggpio4_ick@1010ti,omap3-interface-clock`aggpio3_ick@1010ti,omap3-interface-clock`aggpio2_ick@1010ti,omap3-interface-clock` agwdt3_ick@1010ti,omap3-interface-clock` aguart3_ick@1010ti,omap3-interface-clock` aguart4_ick@1010ti,omap3-interface-clock`aggpt9_ick@1010ti,omap3-interface-clock` aggpt8_ick@1010ti,omap3-interface-clock` aggpt7_ick@1010ti,omap3-interface-clock`aggpt6_ick@1010ti,omap3-interface-clock`aggpt5_ick@1010ti,omap3-interface-clock`aggpt4_ick@1010ti,omap3-interface-clock`aggpt3_ick@1010ti,omap3-interface-clock`aggpt2_ick@1010ti,omap3-interface-clock`agmcbsp2_ick@1010ti,omap3-interface-clock`agmcbsp3_ick@1010ti,omap3-interface-clock`agmcbsp4_ick@1010ti,omap3-interface-clock`agmcbsp2_gate_fck@1000ti,composite-gate-clocka g mcbsp3_gate_fck@1000ti,composite-gate-clocka g mcbsp4_gate_fck@1000ti,composite-gate-clockagemu_src_mux_ck@1140 ti,mux-clockabc@adgdemu_src_ckti,clkdm-gate-clockdaegepclk_fck@1140ti,divider-clocke@pclkx2_fck@1140ti,divider-clocke@atclk_fck@1140ti,divider-clocke@traceclk_src_fck@1140 ti,mux-clockabc@afgftraceclk_fck@1140ti,divider-clockf @secure_32k_fck fixed-clockaggggpt12_fckfixed-factor-clockgwdt1_fckfixed-factor-clockgsecurity_l4_ick2fixed-factor-clock>ahghaes1_ick@a14ti,omap3-interface-clockh rng_ick@a14ti,omap3-interface-clockh sha11_ick@a14ti,omap3-interface-clockh des1_ick@a14ti,omap3-interface-clockh cam_mclk@f00ti,gate-clockiVcam_ick@f10!ti,omap3-no-wait-interface-clock>agcsi2_96m_fck@f00ti,gate-clockagsecurity_l3_ickfixed-factor-clock=ajgjpka_ick@a14ti,omap3-interface-clockj icr_ick@a10ti,omap3-interface-clockI des2_ick@a10ti,omap3-interface-clockI mspro_ick@a10ti,omap3-interface-clockI mailboxes_ick@a10ti,omap3-interface-clockI ssi_l4_ickfixed-factor-clock>aqgqsr1_fck@c00ti,wait-gate-clock sr2_fck@c00ti,wait-gate-clock sr_l4_ickfixed-factor-clock>dpll2_fck@40ti,divider-clock%@akgkdpll2_ck@4ti,omap3-dpll-clockk$@4algldpll2_m2_ck@44ti,divider-clocklDamgmiva2_ck@0ti,wait-gate-clockmagmodem_fck@a00ti,omap3-interface-clock agsad2d_ick@a10ti,omap3-interface-clock= agmad2d_ick@a18ti,omap3-interface-clock= agmspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock angnssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock @$aogossi_ssr_fck_3430es2ti,composite-clocknoapgpssi_sst_fck_3430es2fixed-factor-clockpaghsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockH agssi_ick_3430es2@a10ti,omap3-ssi-interface-clockq agusim_gate_fck@c00ti,composite-gate-clockD  a|g|sys_d2_ckfixed-factor-clockasgsomap_96m_d2_fckfixed-factor-clockDatgtomap_96m_d4_fckfixed-factor-clockDauguomap_96m_d8_fckfixed-factor-clockDavgvomap_96m_d10_fckfixed-factor-clockD awgwdpll5_m2_d4_ckfixed-factor-clockraxgxdpll5_m2_d8_ckfixed-factor-clockraygydpll5_m2_d16_ckfixed-factor-clockrazgzdpll5_m2_d20_ckfixed-factor-clockra{g{usim_mux_fck@c40ti,composite-mux-clock(stuvwxyz{ @a}g}usim_fckti,composite-clock|}usim_ick@c10ti,omap3-interface-clockM  agdpll5_ck@d04ti,omap3-dpll-clock  $ L 4a~g~dpll5_m2_ck@d50ti,divider-clock~ Pargrsgx_gate_fck@b00ti,composite-gate-clock% agcore_d3_ckfixed-factor-clock%agcore_d4_ckfixed-factor-clock%agcore_d6_ckfixed-factor-clock%agomap_192m_alwon_fckfixed-factor-clock!agcore_d2_ckfixed-factor-clock%agsgx_mux_fck@b40ti,composite-mux-clock ) @agsgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clock= agcpefuse_fck@a08ti,gate-clock agts_fck@a08ti,gate-clock? agusbtll_fck@a08ti,wait-gate-clockr agusbtll_ick@a18ti,omap3-interface-clockI agmmchs3_ick@a10ti,omap3-interface-clockI agmmchs3_fck@a00ti,wait-gate-clock agdss1_alwon_fck_3430es2@e00ti,dss-gate-clockVagdss_ick_3430es2@e10ti,omap3-dss-interface-clock>agusbhost_120m_fck@1400ti,gate-clockragusbhost_48m_fck@1400ti,dss-gate-clock/agusbhost_ick@1410ti,omap3-dss-interface-clock>agclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainhemu_clkdmti,clockdomainedpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainld2d_clkdmti,clockdomain dpll5_clkdmti,clockdomain~sgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain counter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH agdma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH`  `aggpio@48310000ti,omap3-gpioH1gpio1aggpio@49050000ti,omap3-gpioIgpio2gpio@49052000ti,omap3-gpioI gpio3gpio@49054000ti,omap3-gpioI@ gpio4gpio@49056000ti,omap3-gpioI`!gpio5gpio@49058000ti,omap3-gpioI"gpio6agserial@4806a000ti,omap3-uartH  H12txrxuart1lserial@4806c000ti,omap3-uartH I34txrxuart2lserial@49020000ti,omap3-uartI J56txrxuart3li2c@48070000 ti,omap3-i2cH8txrx+i2c1'@twl@48H ti,twl4030 default.audioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci 8watchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@agregulator-vioti,twl4030-viow@w@agregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0agregulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5agregulator-vusb1v8ti,twl4030-vusb1v8agregulator-vusb3v1ti,twl4030-vusb3v1agregulator-vpll1ti,twl4030-vpll1 vvdds_dsiw@w@agregulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-aggpioti,twl4030-gpioFRagtwl4030-usbti,twl4030-usb _m{pwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadD?  @A Bsrmadcti,twl4030-madci2c@48072000 ti,omap3-i2cH 9txrx+i2c2agi2c@48060000 ti,omap3-i2cH=txrx+i2c3 disabledmailbox@48094000ti,omap3-mailboxmailboxH @dsp ! ,spi@48098000ti,omap2-mcspiH A+mcspi17@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH B+mcspi27 +,-.tx0rx0tx1rx1ads7846@0 ti,ads7846EP`  box spi@480b8000ti,omap2-mcspiH [+mcspi37 tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi47FGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1=>txrx#0<Lmmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrx disabledmmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx disabledmmu@480bd400Vti,omap2-iommuH mmu_ispcagmmu@5d000000Vti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2 disabledmcbsp@48074000ti,omap3-mcbspH@smpu ;< }commontxrxmcbsp1 txrxfck disabledmcbsp@49022000ti,omap3-mcbspI I smpusidetone>?}commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxfckickokayagmcbsp@49024000ti,omap3-mcbspI@I smpusidetoneYZ}commontxrxsidetonemcbsp3mcbsp3_sidetonetxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`smpu 67 }commontxrxmcbsp4txrxfck disabledmcbsp@48096000ti,omap3-mcbspH `smpu QR }commontxrxmcbsp5txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1Erxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_coreH smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivaH timer@48318000ti,omap3430-timerH1%timer1timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11timer@48304000ti,omap3430-timerH0@_timer12usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ohci@48064400ti,ohci-omap3HD Lehci@48064800 ti,ehci-omapHH Mgpmc@6e000000ti,omap3430-gpmcgpmcnrxtx+,agnand@0,0ti,omap2-nand  sw$5C,U,gv",(6@RR(+x-loader@0 X-Loaderbootloaders@80000U-Bootbootloaders_env@260000 U-Boot Env&kernel@280000Kernel(@filesystem@680000 File Systemhethernet@0,0davicom,dm9000 &8JXr5CUgv066ZZ usb_otg_hs@480ab000ti,omap3-musbH \]}mcdma usb_otg_hs"-5 dss@48050000 ti,omap3-dssHok dss_corefck+ default.>Ndispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H sprotophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH ok dss_vencfck^portendpointjzagportendpointjagssi-controller@48058000 ti,omap3-ssissiokHHssysgddG}gdd_mpu+ p ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHstxrx CDssi-port@4805b000ti,omap3-ssi-portHHstxrx EFpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+0isp@480bc000 ti,omap3-ispH H |olports+bandgap@48002524H%$ti,omap34xx-bandgapmemory@80000000memoryleds gpio-ledsheartbeatdevkit8000::led1 on heartbeatmmcdevkit8000::led2 onnoneusrdevkit8000::led3 onusrpmu_statdevkit8000::pmu_stat soundti,omap-twl4030 devkit8000IExt SpkPREDRIVELExt SpkPREDRIVERMAINMICMain MicMain MicMic Bias 1gpio_keys gpio-keysuseruser  encoder0 ti,tfp410 ports+port@0endpointjport@1endpointjagconnector0dvi-connectordvi " *portendpointjagconnector1svideo-connectortvportendpointjagdisplay panel-dpilcd 6portendpointjagpanel-timingbZ C  K S ` l0 v       compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2display0display1display2device_typeregclocksclock-namesclock-latencyoperating-pointsinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinslinux,phandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyti,use-ledsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cellsstatus#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repti,keep-vref-onti,settle-delay-usecwakeup-sourceti,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplybus-width#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-securegpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthdavicom,no-eepromgpmc,mux-add-datagpmc,wait-pingpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsmultipointnum-epsram-bitsvdds_dsi-supplyvdda_dac-supplyvdda-supplyremote-endpointti,channelsdata-linesiommusti,phy-type#thermal-sensor-cellsgpiosdefault-statelinux,default-triggerti,modelti,mcbspti,audio-routinglinux,codepowerdown-gpiosdigitalddc-i2c-busenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-active