oy8i<(=iFreescale i.MX7 SabreSD Board!fsl,imx7d-sdbfsl,imx7dchosenmemory,memory8aliases%serial@30860000!fsl,imx7d-uartfsl,imx6q-uart80 \ipgper okaydefault!N^ serial@30890000!fsl,imx7d-uartfsl,imx6q-uart80 \ipgper  disabledserial@30880000!fsl,imx7d-uartfsl,imx6q-uart80 \ipgper  disabledsai@308a0000u!fsl,imx7d-saifsl,imx6sx-sai80 _ \busmclk1mclk2mclk3rxtx ""   disabledsai@308b0000u!fsl,imx7d-saifsl,imx6sx-sai80 ` \busmclk1mclk2mclk3rxtx " "   disabledsai@308c0000u!fsl,imx7d-saifsl,imx6sx-sai80 2 \busmclk1mclk2mclk3rxtx " "   disabledcan@30a00000$!fsl,imx7d-flexcanfsl,imx6q-flexcan80 n\ipgper  disabledcan@30a10000$!fsl,imx7d-flexcanfsl,imx6q-flexcan80 o\ipgper  disabledi2c@30a20000!fsl,imx7d-i2cfsl,imx21-i2c80 # okaydefault#pfuze3000@08!fsl,pfuze30008regulatorssw1a: `Rjsw1b: `Rjsw2:`R:sw3: R-Pswbst:LK@RN0vsnvs:B@R-vrefddrvldo1:w@R2Zvldo2: 5Rvccsd:+|R2Zv33:+|R2Zvldo3:w@R2Zvldo4:w@R2Zi2c@30a30000!fsl,imx7d-i2cfsl,imx21-i2c80 $ okaydefault$i2c@30a40000!fsl,imx7d-i2cfsl,imx21-i2c80 % okaydefault%i2c@30a50000!fsl,imx7d-i2cfsl,imx21-i2c80 & okaydefault&wm8960@1a !wlf,wm89608J\mclkserial@30a60000!fsl,imx7d-uartfsl,imx6q-uart80 \ipgper  disabledserial@30a70000!fsl,imx7d-uartfsl,imx6q-uart80 \ipgper  disabledserial@30a80000!fsl,imx7d-uartfsl,imx6q-uart80 \ipgper  disabledserial@30a90000!fsl,imx7d-uartfsl,imx6q-uart80 ~\ipgper  disabledusb@30b10000!fsl,imx7d-usbfsl,imx27-usb80 +'( okay )usb@30b30000!fsl,imx7d-usbfsl,imx27-usb80 (*+hsic"host  disabledusbmisc@30b10200*$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc80((usbmisc@30b30200*$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc80++usbphynop1!usb-nop-xceiv \main_clk''usbphynop3!usb-nop-xceivn \main_clk**usdhc@30b40000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc80  \ipgahbperB okaydefault, 7 @Iusdhc@30b50000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc80  \ipgahbperB  disabledusdhc@30b60000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc80  \ipgahbperB okay"defaultstate_100mhzstate_200mhz-_.i/Nsׄsdma@30bd0000!fsl,imx7d-sdmafsl,imx35-sdma80 Z\ipgahbimx/sdma/sdma-imx7d.bin""ethernet@30be0000!fsl,imx7d-fecfsl,imx6sx-fec80$vwx(RR*"\ipgahbptpenet_clk_refenet_out okaydefault0N^+srgmii1mdioethernet-phy@0811ethernet-phy@1866usb@30b20000!fsl,imx7d-usbfsl,imx27-usb80 *23 okay 4"hostusbmisc@30b20200*$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc8033usbphynop2!usb-nop-xceiv \main_clk22ethernet@30bf0000!fsl,imx7d-fecfsl,imx6sx-fec80$def(RR*"\ipgahbptpenet_clk_refenet_out okaydefault5N^+srgmii6etm@3007d000"!arm,coresight-etm3xarm,primecell80 V7J \apb_pclkportendpoints8regulators !simple-busregulator@0!regulator-fixed8+usb_otg1_vbus:LK@RLK@ 9*))regulator@1!regulator-fixed8+usb_otg2_vbus:LK@RLK@ :*44regulator@2!regulator-fixed8 +can2-3v3:2ZR2Z 9regulator@3!regulator-fixed8 +vref-1v8:w@Rw@ #address-cells#size-cellsmodelcompatibledevice_typereggpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2i2c3mmc0mmc1mmc2serial0serial1serial2serial3serial4serial5serial6spi0spi1spi2spi3clock-frequencyclock-latencyclocksoperating-pointsarm-supplylinux,phandle#clock-cellsclock-output-namesinterrupt-parentrangesclock-namesslave-moderemote-endpointcpuinterrupts#interrupt-cellsinterrupt-controllergpio-controller#gpio-cellsgpio-rangespinctrl-namespinctrl-0fsl,ext-reset-outputstatusfsl,input-selfsl,pinsregulator-nameregulator-min-microvoltregulator-max-microvoltanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageregmapmasklinux,keycodewakeup-source#reset-cellsvref-supply#pwm-cellsdisplaybits-per-pixelbus-widthnative-modehactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activecs-gpiosspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,pressure-maxti,x-plate-ohmsassigned-clocksassigned-clock-parents#sound-dai-cellsdma-namesdmasregulator-boot-onregulator-always-onregulator-ramp-delaywlf,shared-lrclkfsl,usbphyfsl,usbmiscphy-clkgate-delay-usvbus-supplyphy_typedr_mode#index-cellscd-gpioswp-gpioskeep-power-in-suspendpinctrl-1pinctrl-2assigned-clock-ratesfsl,tuning-stepnon-removable#dma-cellsfsl,sdma-ram-script-namefsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packetarm,primecell-periphidenable-active-high