i8(L%aristainetos i.MX6 Dual Lite Board 7 !fsl,imx6dlchosenmemory,memory8@aliases):zcorerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba disabledecspi@02008000 !fsl,imx6q-ecspifsl,imx51-ecspi8@ ([ppzipgper   rxtx disabledecspi@0200c000 !fsl,imx6q-ecspifsl,imx51-ecspi8@ ( [qqzipgper   rxtx disabledecspi@02010000 !fsl,imx6q-ecspifsl,imx51-ecspi8@ (![rrzipgper   rxtx disabledecspi@02014000 !fsl,imx6q-ecspifsl,imx51-ecspi8@@ ("[sszipgper   rxtxokay v default m25p80@0 !micron,n25q128a11jedec,spi-nor1-8serial@02020000!fsl,imx6q-uartfsl,imx21-uart8@ ([zipgper   rxtx disabledesai@02024000!fsl,imx35-esai8@@ (3([vzcorememextalfsysspba   rxtx disabledssi@02028000!fsl,imx6q-ssifsl,imx51-ssi8@ (.[ zipgbaud  % &rxtx disabledssi@0202c000!fsl,imx6q-ssifsl,imx51-ssi8@ (/[ zipgbaud  ) *rxtx disabledssi@02030000!fsl,imx6q-ssifsl,imx51-ssi8@ (0[ zipgbaud  - .rxtx disabledasrc@02034000!fsl,imx53-asrc8@@ (2[kzmemipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`      rxarxbrxctxatxbtxcokayspba@0203c0008@vpu@02040000!fsl,imx6dl-vpucnm,coda9608(  3bitjpeg[zperahb  aipstz@0207c0008@pwm@02080000!fsl,imx6q-pwmfsl,imx27-pwm8@ (S[>zipgper disabledpwm@02084000!fsl,imx6q-pwmfsl,imx27-pwm8@@ (T[>zipgper disabledpwm@02088000!fsl,imx6q-pwmfsl,imx27-pwm8@ (U[>zipgperokaybChCpwm@0208c000!fsl,imx6q-pwmfsl,imx27-pwm8@ (V[>zipgper disabledflexcan@02090000!fsl,imx6q-flexcan8 @ (n[lmzipgperokaydefaultflexcan@02094000!fsl,imx6q-flexcan8 @@ (o[nozipgperokaydefaultgpt@02098000!fsl,imx6dl-gpt8 @ (7[wxzipgperosc_pergpio@0209c000!fsl,imx6q-gpiofsl,imx35-gpio8 @(BC@   {y~zgpio@020a0000!fsl,imx6q-gpiofsl,imx35-gpio8 @(DEJIHGFEDOvuqgpio@020a4000!fsl,imx6q-gpiofsl,imx35-gpio8 @@(FG@ai cQb h gpio@020a8000!fsl,imx6q-gpiofsl,imx35-gpio8 @(HI     '8=.b$h$gpio@020ac000!fsl,imx6q-gpiofsl,imx35-gpio8 @(JKxML/ 9%$#&gpio@020b0000!fsl,imx6q-gpiofsl,imx35-gpio8 @(LM K   Ngpio@020b4000!fsl,imx6q-gpiofsl,imx35-gpio8 @@(NO   kpp@020b8000!fsl,imx6q-kppfsl,imx21-kpp8 @ (R[> disabledwdog@020bc000!fsl,imx6q-wdtfsl,imx21-wdt8 @ (P[wdog@020c0000!fsl,imx6q-wdtfsl,imx21-wdt8 @ (Q[ disabledccm@020c4000!fsl,imx6q-ccm8 @@(WXbhanatop@020c8000#!fsl,imx6q-anatopsysconsimple-bus8 $(16bhregulator-1p1!fsl,anatop-regulator vdd1p1B@4OL`r 5regulator-3p0!fsl,anatop-regulator vdd3p0*40L` r( 3@regulator-2p5!fsl,anatop-regulator vdd2p5"U4)0L`0r +xregulator-vddcore!fsl,anatop-regulator vddarm 4 L`@rp  b;h;regulator-vddpu!fsl,anatop-regulator vddpu 4 `@r p  bhregulator-vddsoc!fsl,anatop-regulator vddsoc 4 L`@rp  b<h<tempmon!fsl,imx6q-tempmon (17C[usbphy@020c9000"!fsl,imx6q-usbphyfsl,imx23-usbphy8  (,[Tbhusbphy@020ca000"!fsl,imx6q-usbphyfsl,imx23-usbphy8  (-[Tbhsnvs@020cc000#!fsl,sec-v4.0-monsysconsimple-mfd8 @bhsnvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp_k4(snvs-poweroff!syscon-poweroff_k8c` disabledepit@020d00008 @ (8epit@020d40008 @@ (9src@020d8000!fsl,imx6q-srcfsl,imx51-src8 @([`fb h gpc@020dc000!fsl,imx6q-gpc8 @(YZs0[zJy}bhiomuxc-gpr@020e0000!fsl,imx6q-iomuxc-gprsyscon88bhiomuxc@020e0000!fsl,imx6dl-iomuxc8@defaultbhimx6qdl-aristainetosaristainetos-usbh1-vbusP0bAhAaristainetos-usbotg-vbushP0bBhBaudmuxgrp`tx|b)h)backlightgrpH@D,$bDhDecspi2grp`< @d4ecspi4grpxX(\,tDT$\Db h enetgrp @(b!h!flexcan1grp0`HL4bhflexcan2grp0bhgpiogrpH0L4P8T<(,048< D,bhgpminandgrppXlTt\x`<$8 lptx|@(bhhoggrpxHbhi2c1grp0l@h@b&h&i2c2grp0P8p@dLt@b'h'i2c3grp0Hx@L|@b(h(ipudisp1grp   b8h8uart2grp0l<p@ b,h,uart4grp`ThXl dx h|b-h-uart5grp0\p`t b.h.usbotggrppYbhusdhc1grppY (YpYpYpYpYX@b"h"usdhc2grppY 0YpYpYpYpYH0b%h%ldb!fsl,imx6q-ldbfsl,imx53-ldb disabled0[!"'((zdi0_plldi1_plldi0_seldi1_seldi0di1lvds-channel@08 disabledport@08endpointb2h2port@18endpointb6h6lvds-channel@18 disabledport@08endpointb3h3port@18endpointb7h7dcic@020e40008@@ (|dcic@020e80008@ (}sdma@020ec000!fsl,imx6q-sdmafsl,imx35-sdma8@ ([zipgahbCimx/sdma/sdma-imx6q.binb h pxp@020f00008@ (bepdc@020f40008@@ (alcdif@020f80008@ ('aips-bus@02100000!fsl,aips-bussimple-bus8!caam@2100000 !fsl,sec-v4.08 ! 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"rxtxokaydefault.i2c@021f8000!fsl,imx6q-i2cfsl,imx21-i2c8@ (#[t disabledipu@02400000!fsl,imx6q-ipu8@@([ zbusdi0di1 port@08port@18port@28b=h=disp0-endpoint/b9h9hdmi-endpoint0bhmipi-endpoint1b*h*lvds0-endpoint2bhlvds1-endpoint3bhport@38b>h>disp1-endpointhdmi-endpoint4bhmipi-endpoint5b+h+lvds0-endpoint6bhlvds1-endpoint7bhsram@00900000 !mmio-sram8[b h display@di0!fsl,imx-parallel-displayrgb24default8okaydisplay-timings800x480p60K0 XXP  %portendpoint9b/h/cpuscpu@0!arm,cortex-a9,cpu82:C2  0T2  ml([h)zarmpll2_pfd2_396msteppll1_swpll1_sys{;s<cpu@1!arm,cortex-a9,cpu82:display-subsystem!fsl,imx-display-subsystem=>gpu-subsystem!fsl,imx-gpu-subsystem?@regulators !simple-busregulator@0!regulator-fixed 2P5V&%4&%Lregulator@1!regulator-fixed 3P3V2Z42ZLb#h#regulator@2!regulator-fixed  defaultA  usb_h1_vbusLK@4LK@b h regulator@3!regulator-fixed $defaultB  usb_otg_vbusLK@4LK@bhbacklight!pwm-backlight C   @defaultD #address-cells#size-cellsmodelcompatibledevice_typeregethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1i2c3#clock-cellsclock-frequencyinterrupt-parentrangesinterruptsinterrupt-names#dma-cellsdma-channelsclockslinux,phandlereg-namesclock-namesdmasdma-namesstatuspinctrl-namespinctrl-0gprremote-endpointpower-domains#interrupt-cellsinterrupt-controllercache-unifiedcache-levelarm,tag-latencyarm,data-latencyarm,shared-overridenum-lanesinterrupt-map-maskinterrupt-mapcs-gpiosspi-max-frequency#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthresetsiram#pwm-cellsgpio-controller#gpio-cellsgpio-rangesregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthregulator-enable-ramp-delayfsl,tempmonfsl,tempmon-datafsl,anatopregmap#reset-cellspu-supply#power-domain-cellsfsl,pinsfsl,sdma-ram-script-namefsl,sec-erafsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordvbus-supplydisable-over-currentdr_mode#index-cellsinterrupts-extendedphy-modephy-reset-gpiosbus-widthvmmc-supplycd-gpiosfsl,weim-cs-gpruart-has-rtsctsinterface-pix-fmtnative-modehactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenvsync-activenext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplysoc-supplyportscoresenable-active-highgpiopwmsbrightness-levelsdefault-brightness-level