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9?mcbsp4_mux_fck@68ti,composite-mux-clockt ph9?mcbsp4_fckti,composite-clockt9?clockdomainspinmux@a00 ti,omap3-padconfpinctrl-singlep \+aes@480c5000 ti,omap3-aesaespH PPABtxrxprm@48306000 ti,omap3-prmpH0`@ clocks+virt_16_8m_ck fixed-clockY9?osc_sys_ck@d40 ti,mux-clocktp @9?sys_ck@1270ti,divider-clocktpp9?sys_clkout1@d70ti,gate-clocktp pdpll3_x2_ckfixed-factor-clocktdpll3_m2x2_ckfixed-factor-clockt9?dpll4_x2_ckfixed-factor-clocktcorex2_fckfixed-factor-clockt9?wkup_l4_ickfixed-factor-clockt9M?Mcorex2_d3_fckfixed-factor-clockt9?corex2_d5_fckfixed-factor-clockt9?clockdomainscm@48004000 ti,omap3-cmpH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clock9???virt_12m_ck fixed-clock9?virt_13m_ck fixed-clock]@9?virt_19200000_ck fixed-clock$9?virt_26000000_ck fixed-clock9?virt_38_4m_ck fixed-clockI9?dpll4_ck@d00ti,omap3-dpll-per-clocktp D 09?dpll4_m2_ck@d48ti,divider-clockt?p H9?dpll4_m2x2_mul_ckfixed-factor-clockt9 ? dpll4_m2x2_ck@d00ti,gate-clockt p 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@9C?Cgpt11_fckti,composite-clocktBCcore_96m_fckfixed-factor-clocktD9?mmchs2_fck@a00ti,wait-gate-clocktp 9?mmchs1_fck@a00ti,wait-gate-clocktp 9?i2c3_fck@a00ti,wait-gate-clocktp 9?i2c2_fck@a00ti,wait-gate-clocktp 9?i2c1_fck@a00ti,wait-gate-clocktp 9?mcbsp5_gate_fck@a00ti,composite-gate-clockt p 9?mcbsp1_gate_fck@a00ti,composite-gate-clockt p 9?core_48m_fckfixed-factor-clockt/9E?Emcspi4_fck@a00ti,wait-gate-clocktEp 9?mcspi3_fck@a00ti,wait-gate-clocktEp 9?mcspi2_fck@a00ti,wait-gate-clocktEp 9?mcspi1_fck@a00ti,wait-gate-clocktEp 9?uart2_fck@a00ti,wait-gate-clocktEp 9?uart1_fck@a00ti,wait-gate-clocktEp  9?core_12m_fckfixed-factor-clocktF9G?Ghdq_fck@a00ti,wait-gate-clocktGp 9?core_l3_ickfixed-factor-clockt=9H?Hsdrc_ick@a10ti,wait-gate-clocktHp 9?gpmc_fckfixed-factor-clocktHcore_l4_ickfixed-factor-clockt>9I?Immchs2_ick@a10ti,omap3-interface-clocktIp 9?mmchs1_ick@a10ti,omap3-interface-clocktIp 9?hdq_ick@a10ti,omap3-interface-clocktIp 9?mcspi4_ick@a10ti,omap3-interface-clocktIp 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sha11_ick@a14ti,omap3-interface-clockthp des1_ick@a14ti,omap3-interface-clockthp cam_mclk@f00ti,gate-clocktip.cam_ick@f10!ti,omap3-no-wait-interface-clockt>p9?csi2_96m_fck@f00ti,gate-clocktp9?security_l3_ickfixed-factor-clockt=9j?jpka_ick@a14ti,omap3-interface-clocktjp icr_ick@a10ti,omap3-interface-clocktIp des2_ick@a10ti,omap3-interface-clocktIp mspro_ick@a10ti,omap3-interface-clocktIp mailboxes_ick@a10ti,omap3-interface-clocktIp ssi_l4_ickfixed-factor-clockt>9q?qsr1_fck@c00ti,wait-gate-clocktp sr2_fck@c00ti,wait-gate-clocktp sr_l4_ickfixed-factor-clockt>dpll2_fck@40ti,divider-clockt%p@9k?kdpll2_ck@4ti,omap3-dpll-clocktkp$@4Wiq9l?ldpll2_m2_ck@44ti,divider-clocktlpD9m?miva2_ck@0ti,wait-gate-clocktmp9?modem_fck@a00ti,omap3-interface-clocktp 9?sad2d_ick@a10ti,omap3-interface-clockt=p 9?mad2d_ick@a18ti,omap3-interface-clockt=p 9?mspro_fck@a00ti,wait-gate-clocktp ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clocktp 9n?nssi_ssr_div_fck_3430es2@a40ti,composite-divider-clocktp @$9o?ossi_ssr_fck_3430es2ti,composite-clocktno9p?pssi_sst_fck_3430es2fixed-factor-clocktp9?hsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clocktHp 9?ssi_ick_3430es2@a10ti,omap3-ssi-interface-clocktqp 9?usim_gate_fck@c00ti,composite-gate-clocktD p 9|?|sys_d2_ckfixed-factor-clockt9s?somap_96m_d2_fckfixed-factor-clocktD9t?tomap_96m_d4_fckfixed-factor-clocktD9u?uomap_96m_d8_fckfixed-factor-clocktD9v?vomap_96m_d10_fckfixed-factor-clocktD 9w?wdpll5_m2_d4_ckfixed-factor-clocktr9x?xdpll5_m2_d8_ckfixed-factor-clocktr9y?ydpll5_m2_d16_ckfixed-factor-clocktr9z?zdpll5_m2_d20_ckfixed-factor-clocktr9{?{usim_mux_fck@c40ti,composite-mux-clock(tstuvwxyz{p @9}?}usim_fckti,composite-clockt|}usim_ick@c10ti,omap3-interface-clocktMp  9?dpll5_ck@d04ti,omap3-dpll-clocktp  $ L 4Wi9~?~dpll5_m2_ck@d50ti,divider-clockt~p P9r?rsgx_gate_fck@b00ti,composite-gate-clockt%p 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9?dss1_alwon_fck_3430es2@e00ti,dss-gate-clocktp.9?dss_ick_3430es2@e10ti,omap3-dss-interface-clockt>p9?usbhost_120m_fck@1400ti,gate-clocktrp9?usbhost_48m_fck@1400ti,dss-gate-clockt/p9?usbhost_ick@1410ti,omap3-dss-interface-clockt>p9?clockdomainscore_l3_clkdmti,clockdomaintdpll3_clkdmti,clockdomaintdpll1_clkdmti,clockdomaintper_clkdmti,clockdomainhtemu_clkdmti,clockdomaintedpll4_clkdmti,clockdomaintwkup_clkdmti,clockdomain$tdss_clkdmti,clockdomaintcore_l4_clkdmti,clockdomaintcam_clkdmti,clockdomaintiva2_clkdmti,clockdomaintdpll2_clkdmti,clockdomaintld2d_clkdmti,clockdomain tdpll5_clkdmti,clockdomaint~sgx_clkdmti,clockdomaintusbhost_clkdmti,clockdomain tcounter@48320000ti,omap-counter32kpH2  counter_32kinterrupt-controller@48200000ti,omap3-intcpH 9?dma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmapH`  `9?gpio@48310000ti,omap3-gpiopH1gpio1gpio@49050000ti,omap3-gpiopIgpio2gpio@49052000ti,omap3-gpiopI gpio3gpio@49054000ti,omap3-gpiopI@ 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ti,omap3-ssissiokpHHsysgddGgdd_mpu+ tp {ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portpHHtxrx CDssi-port@4805b000ti,omap3-ssi-portpHHtxrx EFpinmux@480025d8 ti,omap3-padconfpinctrl-singlepH%$+isp@480bc000 ti,omap3-isppH H |Gl&ports+bandgap@48002524pH%$ti,omap34xx-bandgap2memory@80000000dmemoryp compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2device_typeregclocksclock-namesclock-latencyoperating-pointsinterruptsti,hwmodsstatusranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-masklinux,phandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extended#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supply#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-securegpmc,num-csgpmc,num-waitpinsmultipointnum-epsram-bitsiommusti,phy-type#thermal-sensor-cells