8,(!ti,am3517-evmti,am3517ti,omap3 +&7TI AM3517 EVM (AM3517/05 TMDSEVM3517)chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/serial@4809e000cpus+cpu@0arm,cortex-a8lcpux|cpupmu@54000000arm,cortex-a8-pmuxTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2iva disableddsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busxh +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-busx + pinmux@30 ti,omap3-padconfpinctrl-singlex08+scm_conf@270sysconsimple-busxp0+ p006pbias_regulator@2b0ti,pbias-omap3ti,pbias-omapx>pbias_mmc_omap2430Epbias_mmc_omap2430Tw@l-06clocks+mcbsp5_mux_fck@68ti,composite-mux-clock|xh06mcbsp5_fckti,composite-clock|06mcbsp1_mux_fck@4ti,composite-mux-clock|x0 6 mcbsp1_fckti,composite-clock| 06mcbsp2_mux_fck@4ti,composite-mux-clock| x0 6 mcbsp2_fckti,composite-clock| 06mcbsp3_mux_fck@68ti,composite-mux-clock| xh06mcbsp3_fckti,composite-clock| 06mcbsp4_mux_fck@68ti,composite-mux-clock| xh06mcbsp4_fckti,composite-clock|06emac_ick@32cti,am35xx-gate-clock|x,0x6xemac_fck@32cti,gate-clock|x, vpfe_ick@32cti,am35xx-gate-clock|x,0y6yvpfe_fck@32cti,gate-clock|x, hsotgusb_ick_am35xx@32cti,am35xx-gate-clock|x,0z6zhsotgusb_fck_am35xx@32cti,gate-clock|x,0{6{hecc_ck@32cti,am35xx-gate-clock|x,0|6|clockdomainspinmux@a00 ti,omap3-padconfpinctrl-singlex \+aes@480c5000 ti,omap3-aesaesxH PPABtxrxprm@48306000 ti,omap3-prmxH0`@ clocks+virt_16_8m_ck fixed-clockY06osc_sys_ck@d40 ti,mux-clock|x @06sys_ck@1270ti,divider-clock|xp06sys_clkout1@d70ti,gate-clock|x pdpll3_x2_ckfixed-factor-clock|dpll3_m2x2_ckfixed-factor-clock|0 6 dpll4_x2_ckfixed-factor-clock|corex2_fckfixed-factor-clock| 0!6!wkup_l4_ickfixed-factor-clock|0P6Pcorex2_d3_fckfixed-factor-clock|!0q6qcorex2_d5_fckfixed-factor-clock|!0r6rclockdomainscm@48004000 ti,omap3-cmxH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clock0B6Bvirt_12m_ck fixed-clock06virt_13m_ck fixed-clock]@06virt_19200000_ck fixed-clock$06virt_26000000_ck fixed-clock06virt_38_4m_ck fixed-clockI06dpll4_ck@d00ti,omap3-dpll-per-clock|x D 006dpll4_m2_ck@d48ti,divider-clock|?x H0"6"dpll4_m2x2_mul_ckfixed-factor-clock|"0#6#dpll4_m2x2_ck@d00ti,gate-clock|#x 0$6$omap_96m_alwon_fckfixed-factor-clock|$0+6+dpll3_ck@d00ti,omap3-dpll-core-clock|x @ 006dpll3_m3_ck@1140ti,divider-clock|x@0%6%dpll3_m3x2_mul_ckfixed-factor-clock|%0&6&dpll3_m3x2_ck@d00ti,gate-clock|& x 0'6'emu_core_alwon_ckfixed-factor-clock|'0d6dsys_altclk fixed-clock0060mcbsp_clks fixed-clock06dpll3_m2_ck@d40ti,divider-clock|x @06core_ckfixed-factor-clock|0(6(dpll1_fck@940ti,divider-clock|(x @0)6)dpll1_ck@904ti,omap3-dpll-clock|)x  $ @ 406dpll1_x2_ckfixed-factor-clock|0*6*dpll1_x2m2_ck@944ti,divider-clock|*x D0>6>cm_96m_fckfixed-factor-clock|+0,6,omap_96m_fck@d40 ti,mux-clock|,x @0G6Gdpll4_m3_ck@e40ti,divider-clock| x@0-6-dpll4_m3x2_mul_ckfixed-factor-clock|-0.6.dpll4_m3x2_ck@d00ti,gate-clock|.x 0/6/omap_54m_fck@d40 ti,mux-clock|/0x @0:6:cm_96m_d2_fckfixed-factor-clock|,0161omap_48m_fck@d40 ti,mux-clock|10x @0262omap_12m_fckfixed-factor-clock|20I6Idpll4_m4_ck@e40ti,divider-clock| x@0363dpll4_m4x2_mul_ckti,fixed-factor-clock|3 %0464dpll4_m4x2_ck@d00ti,gate-clock|4x %0v6vdpll4_m5_ck@f40ti,divider-clock|?x@0565dpll4_m5x2_mul_ckti,fixed-factor-clock|5 %0666dpll4_m5x2_ck@d00ti,gate-clock|6x %dpll4_m6_ck@1140ti,divider-clock|?x@0767dpll4_m6x2_mul_ckfixed-factor-clock|70868dpll4_m6x2_ck@d00ti,gate-clock|8x 0969emu_per_alwon_ckfixed-factor-clock|90e6eclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock|(x p0;6;clkout2_src_mux_ck@d70ti,composite-mux-clock|(,:x p0<6<clkout2_src_ckti,composite-clock|;<0=6=sys_clkout2@d70ti,divider-clock|=@x p8mpu_ckfixed-factor-clock|>0?6?arm_fck@924ti,divider-clock|?x $emu_mpu_alwon_ckfixed-factor-clock|?0f6fl3_ick@a40ti,divider-clock|(x @0@6@l4_ick@a40ti,divider-clock|@x @0A6Arm_ick@c40ti,divider-clock|Ax @gpt10_gate_fck@a00ti,composite-gate-clock| x 0C6Cgpt10_mux_fck@a40ti,composite-mux-clock|Bx @0D6Dgpt10_fckti,composite-clock|CDgpt11_gate_fck@a00ti,composite-gate-clock| x 0E6Egpt11_mux_fck@a40ti,composite-mux-clock|Bx @0F6Fgpt11_fckti,composite-clock|EFcore_96m_fckfixed-factor-clock|G06mmchs2_fck@a00ti,wait-gate-clock|x 06mmchs1_fck@a00ti,wait-gate-clock|x 06i2c3_fck@a00ti,wait-gate-clock|x 06i2c2_fck@a00ti,wait-gate-clock|x 06i2c1_fck@a00ti,wait-gate-clock|x 06mcbsp5_gate_fck@a00ti,composite-gate-clock| x 06mcbsp1_gate_fck@a00ti,composite-gate-clock| x 06core_48m_fckfixed-factor-clock|20H6Hmcspi4_fck@a00ti,wait-gate-clock|Hx 06mcspi3_fck@a00ti,wait-gate-clock|Hx 06mcspi2_fck@a00ti,wait-gate-clock|Hx 06mcspi1_fck@a00ti,wait-gate-clock|Hx 06uart2_fck@a00ti,wait-gate-clock|Hx 06uart1_fck@a00ti,wait-gate-clock|Hx  06core_12m_fckfixed-factor-clock|I0J6Jhdq_fck@a00ti,wait-gate-clock|Jx 06core_l3_ickfixed-factor-clock|@0K6Ksdrc_ick@a10ti,wait-gate-clock|Kx 0w6wgpmc_fckfixed-factor-clock|Kcore_l4_ickfixed-factor-clock|A0L6Lmmchs2_ick@a10ti,omap3-interface-clock|Lx 06mmchs1_ick@a10ti,omap3-interface-clock|Lx 06hdq_ick@a10ti,omap3-interface-clock|Lx 06mcspi4_ick@a10ti,omap3-interface-clock|Lx 06mcspi3_ick@a10ti,omap3-interface-clock|Lx 06mcspi2_ick@a10ti,omap3-interface-clock|Lx 06mcspi1_ick@a10ti,omap3-interface-clock|Lx 06i2c3_ick@a10ti,omap3-interface-clock|Lx 06i2c2_ick@a10ti,omap3-interface-clock|Lx 06i2c1_ick@a10ti,omap3-interface-clock|Lx 06uart2_ick@a10ti,omap3-interface-clock|Lx 06uart1_ick@a10ti,omap3-interface-clock|Lx  06gpt11_ick@a10ti,omap3-interface-clock|Lx  06gpt10_ick@a10ti,omap3-interface-clock|Lx  06mcbsp5_ick@a10ti,omap3-interface-clock|Lx  06mcbsp1_ick@a10ti,omap3-interface-clock|Lx  06omapctrl_ick@a10ti,omap3-interface-clock|Lx 06dss_tv_fck@e00ti,gate-clock|:x06dss_96m_fck@e00ti,gate-clock|Gx06dss2_alwon_fck@e00ti,gate-clock|x06dummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock|x 0M6Mgpt1_mux_fck@c40ti,composite-mux-clock|Bx @0N6Ngpt1_fckti,composite-clock|MNaes2_ick@a10ti,omap3-interface-clock|Lx 06wkup_32k_fckfixed-factor-clock|B0O6Ogpio1_dbck@c00ti,gate-clock|Ox 06sha12_ick@a10ti,omap3-interface-clock|Lx 06wdt2_fck@c00ti,wait-gate-clock|Ox 06wdt2_ick@c10ti,omap3-interface-clock|Px 06wdt1_ick@c10ti,omap3-interface-clock|Px 06gpio1_ick@c10ti,omap3-interface-clock|Px 06omap_32ksync_ick@c10ti,omap3-interface-clock|Px 06gpt12_ick@c10ti,omap3-interface-clock|Px 06gpt1_ick@c10ti,omap3-interface-clock|Px 06per_96m_fckfixed-factor-clock|+0 6 per_48m_fckfixed-factor-clock|20Q6Quart3_fck@1000ti,wait-gate-clock|Qx 0}6}gpt2_gate_fck@1000ti,composite-gate-clock|x0R6Rgpt2_mux_fck@1040ti,composite-mux-clock|Bx@0S6Sgpt2_fckti,composite-clock|RSgpt3_gate_fck@1000ti,composite-gate-clock|x0T6Tgpt3_mux_fck@1040ti,composite-mux-clock|Bx@0U6Ugpt3_fckti,composite-clock|TUgpt4_gate_fck@1000ti,composite-gate-clock|x0V6Vgpt4_mux_fck@1040ti,composite-mux-clock|Bx@0W6Wgpt4_fckti,composite-clock|VWgpt5_gate_fck@1000ti,composite-gate-clock|x0X6Xgpt5_mux_fck@1040ti,composite-mux-clock|Bx@0Y6Ygpt5_fckti,composite-clock|XYgpt6_gate_fck@1000ti,composite-gate-clock|x0Z6Zgpt6_mux_fck@1040ti,composite-mux-clock|Bx@0[6[gpt6_fckti,composite-clock|Z[gpt7_gate_fck@1000ti,composite-gate-clock|x0\6\gpt7_mux_fck@1040ti,composite-mux-clock|Bx@0]6]gpt7_fckti,composite-clock|\]gpt8_gate_fck@1000ti,composite-gate-clock| x0^6^gpt8_mux_fck@1040ti,composite-mux-clock|Bx@0_6_gpt8_fckti,composite-clock|^_gpt9_gate_fck@1000ti,composite-gate-clock| x0`6`gpt9_mux_fck@1040ti,composite-mux-clock|Bx@0a6agpt9_fckti,composite-clock|`aper_32k_alwon_fckfixed-factor-clock|B0b6bgpio6_dbck@1000ti,gate-clock|bx0~6~gpio5_dbck@1000ti,gate-clock|bx06gpio4_dbck@1000ti,gate-clock|bx06gpio3_dbck@1000ti,gate-clock|bx06gpio2_dbck@1000ti,gate-clock|bx 06wdt3_fck@1000ti,wait-gate-clock|bx 06per_l4_ickfixed-factor-clock|A0c6cgpio6_ick@1010ti,omap3-interface-clock|cx06gpio5_ick@1010ti,omap3-interface-clock|cx06gpio4_ick@1010ti,omap3-interface-clock|cx06gpio3_ick@1010ti,omap3-interface-clock|cx06gpio2_ick@1010ti,omap3-interface-clock|cx 06wdt3_ick@1010ti,omap3-interface-clock|cx 06uart3_ick@1010ti,omap3-interface-clock|cx 06uart4_ick@1010ti,omap3-interface-clock|cx06gpt9_ick@1010ti,omap3-interface-clock|cx 06gpt8_ick@1010ti,omap3-interface-clock|cx 06gpt7_ick@1010ti,omap3-interface-clock|cx06gpt6_ick@1010ti,omap3-interface-clock|cx06gpt5_ick@1010ti,omap3-interface-clock|cx06gpt4_ick@1010ti,omap3-interface-clock|cx06gpt3_ick@1010ti,omap3-interface-clock|cx06gpt2_ick@1010ti,omap3-interface-clock|cx06mcbsp2_ick@1010ti,omap3-interface-clock|cx06mcbsp3_ick@1010ti,omap3-interface-clock|cx06mcbsp4_ick@1010ti,omap3-interface-clock|cx06mcbsp2_gate_fck@1000ti,composite-gate-clock|x0 6 mcbsp3_gate_fck@1000ti,composite-gate-clock|x0 6 mcbsp4_gate_fck@1000ti,composite-gate-clock|x06emu_src_mux_ck@1140 ti,mux-clock|defx@0g6gemu_src_ckti,clkdm-gate-clock|g0h6hpclk_fck@1140ti,divider-clock|hx@pclkx2_fck@1140ti,divider-clock|hx@atclk_fck@1140ti,divider-clock|hx@traceclk_src_fck@1140 ti,mux-clock|defx@0i6itraceclk_fck@1140ti,divider-clock|i x@secure_32k_fck fixed-clock0j6jgpt12_fckfixed-factor-clock|jwdt1_fckfixed-factor-clock|jipss_ick@a10ti,am35xx-interface-clock|Kx 06rmii_ck fixed-clock06pclk_ck fixed-clock06uart4_ick_am35xx@a10ti,omap3-interface-clock|Lx uart4_fck_am35xx@a00ti,wait-gate-clock|Hx dpll5_ck@d04ti,omap3-dpll-clock|x  $ L 4N`0k6kdpll5_m2_ck@d50ti,divider-clock|kx P0u6usgx_gate_fck@b00ti,composite-gate-clock|(x 0s6score_d3_ckfixed-factor-clock|(0l6lcore_d4_ckfixed-factor-clock|(0m6mcore_d6_ckfixed-factor-clock|(0n6nomap_192m_alwon_fckfixed-factor-clock|$0o6ocore_d2_ckfixed-factor-clock|(0p6psgx_mux_fck@b40ti,composite-mux-clock |lmn,opqrx @0t6tsgx_fckti,composite-clock|stsgx_ick@b10ti,wait-gate-clock|@x 06cpefuse_fck@a08ti,gate-clock|x 06ts_fck@a08ti,gate-clock|Bx 06usbtll_fck@a08ti,wait-gate-clock|ux 06usbtll_ick@a18ti,omap3-interface-clock|Lx 06mmchs3_ick@a10ti,omap3-interface-clock|Lx 06mmchs3_fck@a00ti,wait-gate-clock|x 06dss1_alwon_fck_3430es2@e00ti,dss-gate-clock|vx%06dss_ick_3430es2@e10ti,omap3-dss-interface-clock|Ax06usbhost_120m_fck@1400ti,gate-clock|ux06usbhost_48m_fck@1400ti,dss-gate-clock|2x06usbhost_ick@1410ti,omap3-dss-interface-clock|Ax06clockdomainscore_l3_clkdmti,clockdomain|wxyz{|dpll3_clkdmti,clockdomain|dpll1_clkdmti,clockdomain|per_clkdmti,clockdomainh|}~emu_clkdmti,clockdomain|hdpll4_clkdmti,clockdomain|wkup_clkdmti,clockdomain |dss_clkdmti,clockdomain|core_l4_clkdmti,clockdomain|dpll5_clkdmti,clockdomain|ksgx_clkdmti,clockdomain|usbhost_clkdmti,clockdomain |counter@48320000ti,omap-counter32kxH2  counter_32kinterrupt-controller@48200000ti,omap3-intcxH 06dma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaxH` hs `06gpio@48310000ti,omap3-gpioxH1gpio1gpio@49050000ti,omap3-gpioxIgpio2gpio@49052000ti,omap3-gpioxI gpio3gpio@49054000ti,omap3-gpioxI@ gpio4gpio@49056000ti,omap3-gpioxI`!gpio5gpio@49058000ti,omap3-gpioxI"gpio6serial@4806a000ti,omap3-uartxH H12txrxuart1lserial@4806c000ti,omap3-uartxHI34txrxuart2lserial@49020000ti,omap3-uartxIJ56txrxuart3li2c@48070000 ti,omap3-i2cxH8txrx+i2c1i2c@48072000 ti,omap3-i2cxH 9txrx+i2c2i2c@48060000 ti,omap3-i2cxH=txrx+i2c3mailbox@48094000ti,omap3-mailboxmailboxxH @ disableddsp   spi@48098000ti,omap2-mcspixH A+mcspi1@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspixH B+mcspi2 +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspixH [+mcspi3 tx0rx0tx1rx1spi@480ba000ti,omap2-mcspixH 0+mcspi4FGtx0rx01w@480b2000 ti,omap3-1wxH :hdq1wmmc@4809c000ti,omap3-hsmmcxH Smmc1#=>txrx0=Immc@480b4000ti,omap3-hsmmcxH @Vmmc2/0txrx disabledmmc@480ad000ti,omap3-hsmmcxH ^mmc3MNtxrx disabledmmu@480bd400Sti,omap2-iommuxH mmu_isp` disabledmmu@5d000000Sti,omap2-iommux]mmu_iva disabledwdt@48314000 ti,omap3-wdtxH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspxH@pmpu ;< zcommontxrxmcbsp1 txrx|fck disabledmcbsp@49022000ti,omap3-mcbspxI I pmpusidetone>?zcommontxrxsidetonemcbsp2mcbsp2_sidetone!"txrx|fckick disabledmcbsp@49024000ti,omap3-mcbspxI@I pmpusidetoneYZzcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrx|fckick disabledmcbsp@49026000ti,omap3-mcbspxI`pmpu 67 zcommontxrxmcbsp4txrx|fck disabledmcbsp@48096000ti,omap3-mcbspxH `pmpu QR zcommontxrxmcbsp5txrx|fck disabledsham@480c3000ti,omap3-shamshamxH 0d1Erxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_corexH smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivaxH  disabledtimer@48318000ti,omap3430-timerxH1%timer1timer@49032000ti,omap3430-timerxI &timer2timer@49034000ti,omap3430-timerxI@'timer3timer@49036000ti,omap3430-timerxI`(timer4timer@49038000ti,omap3430-timerxI)timer5timer@4903a000ti,omap3430-timerxI*timer6timer@4903c000ti,omap3430-timerxI+timer7timer@4903e000ti,omap3430-timerxI,timer8timer@49040000ti,omap3430-timerxI-timer9timer@48086000ti,omap3430-timerxH`.timer10timer@48088000ti,omap3430-timerxH/timer11timer@48304000ti,omap3430-timerxH0@_timer12usbhstll@48062000 ti,usbhs-tllxH N usb_tll_hsusbhshost@48064000ti,usbhs-hostxH@ usb_host_hs+ohci@48064400ti,ohci-omap3xHD Lehci@48064800 ti,ehci-omapxHH Mgpmc@6e000000ti,omap3430-gpmcgpmcxnrxtx+usb_otg_hs@480ab000ti,omap3-musbxH \]zmcdma usb_otg_hs dss@48050000 ti,omap3-dssxH disabled dss_core|fck+dispc@48050400ti,omap3-dispcxH dss_dispc|fckencoder@4804fc00 ti,omap3-dsixHH@H pprotophypll disabled dss_dsi1| fcksys_clkencoder@48050800ti,omap3-rfbixH disabled dss_rfbi|fckickencoder@48050c00ti,omap3-vencxH  disabled dss_venc|fckssi-controller@48058000 ti,omap3-ssissi disabledxHHpsysgddGzgdd_mpu+ssi-port@4805a000ti,omap3-ssi-portxHHptxrx CDssi-port@4805b000ti,omap3-ssi-portxHHptxrx EFam35x_otg_hs@5c040000ti,omap3-musb am35x_otg_hs disabledx\Gzmcethernet@0x5c000000ti,am3517-emac davinci_emacokayx\CDEF> 'Fa zethernet@0x5c030000ti,davinci_mdio davinci_mdiookayx\B@+serial@4809e000ti,omap3-uartuart4 disabledxH T76txrxlpinmux@480025d8 ti,omap3-padconfpinctrl-singlexH%$+memory@80000000lmemoryxvmmcregulator-fixed Evmmc_fixedT2Zl2Z06 compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyinterruptsti,hwmodsstatusranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-masklinux,phandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lock#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extended#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-width#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-securegpmc,num-csgpmc,num-waitpinsmultipointnum-epsram-bitsti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freq